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2020-12-11ARM: dts: at91: sama5d2_icp: fix i2c eeprom compatibleEugen Hristev
The correct compatible for this eeproms is microchip,24aa02e48 The previous compatible string was working up to U-boot 2020.04. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Tested-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
2020-11-26ARM: mach-at91: fix timer.o compile conditionEugen Hristev
The AT91 architecture now has two possible timer blocks, the old PIT timer and the new PIT64B. The timer.c file has an old non DM driver that works for platforms that do not use the ATMEL_PIT_TIMER DM-based driver. Update the Makefile to select this old driver in case neither of the ATMEL_PIT_TIMER and the MCHP_PIT64B_TIMER are selected. Suggested-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-26ARM: at91: armv7: sama7g5 uses CCF clock driverNicolas Ferre
SAMA7G5 uses CCF driver under drivers/clk/at91/ and not the custom older at91 clock.c driver. Remove it from the compilation list and adapt cpu.c arch_cpu_init() to avoid calling at91_clock_init() which is wrong anyway. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2020-11-26ARM: dts: at91: sam9x60: enable slewrate/high drive for sdhci0 pinoutEugen Hristev
Align the pin setup for sdhci0 with linux kernel. This means to have slew rate enable and high drive strength. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-06Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini
- Add a new SMBIOS parser and enable it when booting from coreboot - Fix up various driver names to avoid dtoc warnings - Fully enable ACPI support on Google Chromebook Coral - Add a way to set SMBIOS properties using the devicetree - Update existing boards to use devicetree for SMBIOS using a new default sysinfo driver
2020-11-06arm64: mvebu: Use devicetree for SMBIOS settings on uDPUSimon Glass
Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06odroid-c2: Use devicetree for SMBIOS settingsSimon Glass
Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06imx: Use devicetree for SMBIOS settings on MYiR MYS-6ULXSimon Glass
Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06rockchip: Use devicetree for SMBIOS settingsSimon Glass
Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05Merge tag 'u-boot-imx-20201105' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx for 2021.1 --------------------- - new boards : GE (new B1x5v2), phytec phyCORE-i.MX8MM - converted doc to reST - fixes for verdin-imx8mm (Toradex) - fixes for i.MX thermal driver - mx7ulp: Align the PLL_USB frequency - mx53: primary/secondary bmode Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/741465284
2020-11-02Merge tag 'u-boot-atmel-fixes-2021.01-a' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-atmel First set of u-boot-atmel fixes for 2021.01 cycle: This specific feature set includes the patches for DT required to fix the warnings for newer DTC version (1.6.0+), i2c and spi bus unit address.
2020-11-02ARM: dts: at91: sama5d3xmb_cmp: fix SPI bus unit addressEugen Hristev
w+arch/arm/dts/.at91sam9260ek.dtb.pre.tmp:119.21-123.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1" Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02ARM: dts: at91: sam9260ek: fix SPI bus unit addressEugen Hristev
w+arch/arm/dts/.at91sam9260ek.dtb.pre.tmp:119.21-123.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1" Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02ARM: dts: at91: sama5d3xmb: fix I2C bus unit addressEugen Hristev
w+arch/arm/dts/sama5d3xmb.dtsi:64.25-83.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f0018000/camera@0x30: I2C bus unit address format error, expected "30" Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02ARM: dts: at91: gurnard: fix SPI bus unit addressEugen Hristev
w+arch/arm/dts/.at91sam9g45-gurnard.dtb.pre.tmp:118.21-122.7: Warning (spi_bus_reg): /ahb/apb/spi@fffa4000/mtd_dataflash@0: SPI bus unit address format error, expected "1" Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02ARM: dts: at91: at91sam9g25ek: fix I2C bus unit addressEugen Hristev
w+arch/arm/dts/.at91sam9g25ek.dtb.pre.tmp:28.25-47.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f8010000/camera@0x30: I2C bus unit address format error, expected "30" Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02ARM: dts: at91: at91sam9g20ek_common: fix SPI bus unit addressEugen Hristev
w+arch/arm/dts/at91sam9g20ek_common.dtsi:100.21-104.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1" Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02ARM: dts: at91: at91sam9g20-taurus: fix SPI bus unit addressEugen Hristev
w+arch/arm/dts/.at91sam9g20-taurus.dtb.pre.tmp:79.18-83.4: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/mtd_dataflash@0: SPI bus unit address format error, expected "1" Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02ARM: dts: at91: at91sam9261ek: fix SPI unit address warningEugen Hristev
w+arch/arm/dts/.at91sam9261ek.dtb.pre.tmp:124.15-144.7: Warning (spi_bus_reg): /ahb/apb/spi@fffc8000/tsc2046@0: SPI bus unit address format error, expected "2" Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-02ARM: dts: at91: vinco: fix I2C warning bus unit addressEugen Hristev
w+arch/arm/dts/.at91-vinco.dtb.pre.tmp:131.18-134.7: Warning (i2c_bus_reg): /ahb/apb/i2c@f8024000/rtc@64: I2C bus unit address format error, expected "32" Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-11-01board: ge: b1x5v2: Add GE B1x5v2 and B1x5Pv2Sebastian Reichel
GE B1x5v2 patient monitor series is similar to the CARESCAPE Monitor series (GE Bx50). It consists of a carrier PCB used in combination with a Congatec QMX6 SoM. This adds U-Boot support using device model everywhere and SPL for memory initialization. Proper configuration is provided as 'ge_b1x5v2_defconfig' and the combined image u-boot-with-spi.imx can be flashed directly to 1024 byte offset to /dev/mtdblock0. Alternatively SPL and u-boot.imx can be loaded separately via USB-OTG using e.g. imx_usb. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2020-11-01imx6: allow usage of disable_ldb_di_clock_sources for CONFIG_MX6QDLSebastian Reichel
Allow using disable_ldb_di_clock_sources with just the combined CONFIG_MX6QDL being enabled. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-11-01board: phytec: imx8mm: Add PHYTEC phyCORE-i.MX8MM supportTeresa Remmet
Add support PHYTEC phyCORE-i.MX8MM SOM. Supported features: - 2GB LPDDR4 RAM - 1x 1Gbit Ethernet - eMMC - external SD - debug UART3 - watchdog - i2c eeprom Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
2020-11-01ARM: imx: Add support for the primary/secondary bmode to MX53Marek Vasut
Implement the 'getprisec' subcommand of 'bmode' command for i.MX53 and also the primary/secondary bootmode switching. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2020-11-01dts: Provide LED DTS description for HSC and DDC imx53 devicesLukasz Majewski
Those two LEDs are used to indicate U-Boot's boot stage. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-11-01mx7ulp: clock: Align the PLL_USB frequencyFabio Estevam
The command 'clocks' shows the following output: => clocks PLL_A7_SPLL 528 MHz PLL_A7_APLL 529 MHz PLL_USB 0 MHz Add some extra spaces so that the PLL_USB information gets aligned with the previous reported frequencies. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-11-01mx7ulp: clock: Remove unuseful informationFabio Estevam
The command 'clocks' shows the following output: => clocks PLL_A7_SPLL 528 MHz PLL_A7_APLL 529 MHz PLL_USB 0 MHz .... [do_mx7_showclocks] addr = 0x9FFB61F1 The last line is not useful at all, so just remove it. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-11-01imx: cpu: terminate line with CR if invalid temp sensorTim Harvey
Ensure we terminate the line with a CR if we get an invalid sensor device or reading. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-11-01mx6: peripheral clock from oscillatorJorge Ramirez-Ortiz
In order to be able to run the I2C bus at 400Khz, the chip errata[1] recommends that the peripheral clock runs out of the 24MHz oscillator. Systems running I2C from OP-TEE before Linux executes - for example to access a Secure Element [2] providing the cryptographic support - expect this clock to be configured by the bootloader [3]. [1] IMX6SLCE Rev. 5, 02/2019, ERR007805. [2] OP-TEE: support for NXP SE05X Plug and Trust (patch on the list). [3] OP-TEE: check the imx_i2c.c driver (imx6 patch on the list). Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-10-30Merge tag 'u-boot-rockchip-20201031' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - New PX30 board: Engicam PX30.Core; - Fix USB HID support for rock960; - Remove host endianness dependency for rockchip mkimage; - dts update for rk3288-tinker; - Enable console MUX for some ROCKPi boards; - Add config-based ddr selection for px30;
2020-10-30Merge tag 'dm-pull-30oct20' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-dm of-platdata and dtoc improvements sandbox SPL tests binman support for compressed sections
2020-10-30rockchip: Add Engicam PX30.Core C.TOUCH 2.0Jagan Teki
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. C.TOUCH 2.0 is a general purpose carrier board with capacitive touch interface support. PX30.Core needs to mount on top of this Carrier board for creating complete PX30.Core C.TOUCH 2.0 board. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-10-30arm64: dts: rockchip: px30: Add Engicam C.TOUCH 2.0Jagan Teki
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose carrier board with capacitive touch interface. Genaral features: - TFT 10.1" industrial, 1280x800 LVDS display - Ethernet 10/100 - Wifi/BT - USB Type A/OTG - Audio Out - CAN - LVDS panel connector SOM's like PX30.Core needs to mount on top of this Carrier board for creating complete PX30.Core C.TOUCH 2.0 board. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-10-30rockchip: Add Engicam PX30.Core EDIMM2.2 Starter KitJagan Teki
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board from Engicam. PX30.Core needs to mount on top of this Evaluation board for creating complete PX30.Core EDIMM2.2 Starter Kit. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-10-30rockchip: px30: Add EVB_PX30 Kconfig helpJagan Teki
TARGET_EVB_PX30 can be possible to use other px30 boards. Add the help text for existing EVB, so-that the new boards which are resuing this config option can mention their board help text. This would help to track which boards are using EVB_PX30 config. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-10-30arm64: dts: rockchip: Add Engicam PX30.Core SOMMichael Trimarchi
PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam. General features: - Rockchip PX30 - Up to 2GB DDR4 - eMMC 4 GB expandible - rest of PX30 features PX30.Core needs to mount on top of Engicam baseboards for creating complete platform boards. Possible baseboards are, - EDIMM2.2 - C.TOUCH 2.0 Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-10-30arm64: dts: rockchip: px30: Add Engicam EDIMM2.2 Starter KitJagan Teki
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board. Genaral features: - LCD 7" C.Touch - microSD slot - Ethernet 1Gb - Wifi/BT - 2x LVDS Full HD interfaces - 3x USB 2.0 - 1x USB 3.0 - HDMI Out - Mini PCIe - MIPI CSI - 2x CAN - Audio Out SOM's like PX30.Core needs to mount on top of this Evaluation board for creating complete PX30.Core EDIMM2.2 Starter Kit. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-10-30arm64: dts: rockchip: Add chosen node for ROCK-Pi N8Jagan Teki
Add chosen node in -u-boot.dtsi for ROCK-Pi N8 board. This will help to get serial out messages. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
2020-10-30rockchip: dts: tinker: remove unnecessary nodeStefan Agner
The property reg-shift with the same value is present in the base device tree already. Remove unnecessary node from rk3288-tinker.dts. Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-10-30rockchip: dts: tinker: move i2c node to shared device treeStefan Agner
The I2C EEPROM is present on Tinker Board S as well. Move the i2c node to the shared, U-Boot specific rk3288-tinker-u-boot.dtsi device tree. Cc: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-10-29imx: mx6cuboxi: Disable thermal driver in SPLSimon Glass
This feature is incompatble with of-platdata since it uses the U_BOOT_DEVICE() macro. With of-platdata the only devices permitted are those created by dtoc. The driver is not used in SPL anyway, so exclude it from that build. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-10-29Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- Armada 8k: Add NAND support via PXA3xx NAND driver (Baruch) - Armada 8k: Use ATF serdes init instead of the "old" U-Boot version (Baruch) - Minor update to Octeon TX/TX2 defconfig (Stefan)
2020-10-29Merge tag 'xilinx-for-v2021.01-v2' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.01-v2 common: - Add support for 64bit loadables from SPL xilinx: - Update documentation and record ownership - Enable eeprom board detection based legacy and fru formats - Add support for FRU format microblaze: - Optimize low level ASM code - Enable SPI/I2C - Enable distro boot zynq: - Add support for Zturn V5 zynqmp: - Improve silicon detection code - Enable several kconfig options - Align DT with the latest state - Enabling security commands - Enable and support FPGA loading from SPL - Optimize xilinx_pm_request() calling versal: - Some DTs/Kconfig/defconfig alignments - Add binding header for clock and power zynq-sdhci: - Add support for tap delay programming zynq-spi/zynq-qspi: - Use clock framework for getting clocks xilinx-spi: - Fix some code issues (unused variables) serial: - Check return value from clock functions in pl01x
2020-10-29Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini
- Bug fixes and updates on vid, ls1088a lx2160a and other layerscape platforms. - Add optee_rpmb support for LX2 & Kontron sl28 support
2020-10-29xilinx: Consolidate board_fit_config_name_match() for Xilinx platformsMichal Simek
Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-29arm: dts: armada-cp110-master: update nand-controllerBaruch Siach
Align node properties to kernel dts node. The change of compatible property does not affect any currently supported board. Keep U-Boot specific nand-enable-arbiter, and num-cs for compatibility with the current driver. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29arm: dts: armada-cp110-slave: add missing cps_nandShmuel Hazan
Align node properties to kernel dts node. Keep U-Boot specific nand-enable-arbiter, and num-cs for compatibility with the current driver. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-27arm64: zynqmp: Fix zynqmp mini qspi max frequencyT Karthik Reddy
For zynqmp qspi, frequencies up to 40MHz will work irrespective of feedback clock enabled or disabled. If we want higher than 40Mhz the feedback clock should be enabled. With spi-max-frequency 108MHz it is not working when the feedback clock is disabled. Change it to 40MHz so that it works irrespective of feedback clock enabled or disabled. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: zynqmp: Add support for SHA3 commandT Karthik Reddy
This patch adds support for SHA3 command. It takes data blob as input and generates 48 bytes sha3 hash value. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-27arm64: zynqmp: Add support for RSA commandT Karthik Reddy
This patch adds support for RSA command, performs RSA encrypt & RSA decrypt on data blob of key size. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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