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2024-09-20arm64: zynqmp: Align mini-qspi DT with dt-schemaMichal Simek
fixed-clock can't be described on the bus because it is missing reg property. Also remove additional compatible string for flash. Mini qspi configuration is used with multiple different flashes that's why describing only one is not correct but also not required based on DT schema. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/0e4721eda8d0f23a9d9f0c15cf887f0bba639cd4.1726219714.git.michal.simek@amd.com
2024-09-20arm64: zynqmp: fix i2c mux bus description for m-a2197 platformsMichal Simek
Uncomment reg property for bus 3 in i2c mux. It is better option than removing the whole node. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/f28ff644fd2c6bdf5f2e646f6bc0e1ad0c92e8be.1726219714.git.michal.simek@amd.com
2024-09-20arm64: zynqmp: Fix comment style around gpio line-namesMichal Simek
Just fix description to be aligned with other comments. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/938a2658edf68665ef9e34d2584adacfa83dd01f.1726219714.git.michal.simek@amd.com
2024-09-20arm64: zynqmp: Fix gpio-line-name size for m-a2197 platformsMichal Simek
There were 3 additional empty strings which shouldn't be there. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/33290fcbcd3ef19cae8ef036dca0f6dcc8080d5b.1726219714.git.michal.simek@amd.com
2024-09-20xilinx: Fix axi and mmc node names in mini configurationMichal Simek
amba is not approved node name for simple-bus that's why use axi instead to be aligned with other xilinx boards. Node reference is not changed that's why there is no impact but also mini configuration will never gets to OS that's why nothing should be affected from OS perspective (paths in /proc/ for example). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1b18a69ae47bdcb1a0795af7621d13bfecfc9861.1726219714.git.michal.simek@amd.com
2024-09-20arm64: zynqmp: Align gpio hogs with dt-schemaMichal Simek
As was done in past for zcu102 append -hog to node name to pass dt-schema. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/112e36e2578c84f30c3c038440405069671d2853.1726219714.git.michal.simek@amd.com
2024-09-20arm64: zynqmp: Fix status property for m-a2197 boardsMichal Simek
Status property should be missing or okay or disabled but not just disable. dt-validate is reporting it too. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/bbf62f5911fcb356d1467b3979b4ff3c485124ad.1726219714.git.michal.simek@amd.com
2024-09-20arm64: zynqmp: Define only one revision in zcu106-rev1.0Michal Simek
zcu106 rev1.0 is sw compatible with revA but only one revision should be listed in compatible string that's why remove revA and keep only rev1.0. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c5214b1a01032b88a394104a57624e0d91a22f29.1726221517.git.michal.simek@amd.com
2024-09-20net: gem: Remove undocumented is-internal-pcspma dt flagMichal Simek
Generic understanding/consideration is that phy-mode as sgmi means that the internal PCS(Physical Coding Sublayer) should be enabled by default. Xilinx GEM implementation allows configuration GEM (gmii mode) + PL PCS PMA (sgmii mode, Physical Medum Attachment) but in this case phy-mode should be setup as gmii. The reason for this assumption is that phy-mode should be described based on GEM configuration not based on mode coming out of PHY. Also Linux kernel automatically setting up PCSSEL bit when phy mode is sgmii without a need to specified additional DT propety. All our DTSes with sgmii phy mode have this flag enabled that's why there is no need/reason to just duplicate information. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2ecdbcc4ce692e2f8b3e7054a2abab35f6c03a69.1726213052.git.michal.simek@amd.com
2024-09-20arm64: zynqmp: Remove overlays and add new dtb entries for ZynqMPPrasad Kummari
Remove device tree overlay (DTBO) entries for the ZynqMP target from the Makefile. Add new device tree binaries (DTBs) for the zynqmp-sm-k24-revA and zynqmp-smk-k24-revA configurations. Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20240906070808.1045991-3-prasad.kummari@amd.com
2024-09-20kbuild: cherry-pick kbuild fdtoverlay changes from linuxPrasad Kummari
Linux commits: 15d16d6dadf6 kbuild: Add generic rule to apply fdtoverlay 44f87191d105 kbuild: parameterize the .o part of suffix-search The Linux commit 15d16d6dadf6 adds a generic rule in Makefile.lib to automatically apply fdtoverlay, so that each platform doesn't need to include a complex rule. This also automatically appends DTC_FLAGS_foo_base += -@ to all base files The platform's Makefile only needs to have this now: foo-dtbs := foo_base.dtb foo_overlay1.dtbo foo_overlay2.dtbo dtb-y := foo.dtb Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20240906070808.1045991-2-prasad.kummari@amd.com
2024-09-20arm64: zynqmp: Add missing vc7_xin fixed clock to sc-vpk180-revAMichal Simek
Add missing vc7_xin fixed clock as clock input for some clock generators. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/4904f5e0aab8a0b0c2fcc1912be493d4185e6173.1725881047.git.michal.simek@amd.com
2024-09-20arm: zynqmp: Enable non-invasive CCI-400 PMU debugSean Anderson
Set NIDEN, enabling non-invasive debug for the CCI-400 PMU. Otherwise, the PMU is effectively disabled. Signed-off-by: Sean Anderson <sean.anderson@linux.dev> Reviewed-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20240905171833.325548-3-sean.anderson@linux.dev Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-09-20zynqmp: Disable secure access for boot devicesSean Anderson
Boot devices (QSPI, MMC, NAND, and Ethernet) use secure access for DMA by default. As this causes problems when using the SMMU [1], configure them for normal access instead. [1] https://support.xilinx.com/s/article/72164 Signed-off-by: Sean Anderson <sean.anderson@linux.dev> Link: https://lore.kernel.org/r/20240905171833.325548-2-sean.anderson@linux.dev Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-09-20arm64: zynqmp: Add u-boot command to boot into recovery imagePrasad Kummari
To boot into the firmware recovery tool, the user currently needs to press a button on the board while powering the system up. To simplify this process, a U-Boot command was added to allow booting directly into the recovery tool. For example: ZynqMP> zynqmp reboot <multiboot offset in hex> Co-develop-by: Prasad Kummari <prasad.kummari@amd.com> Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Co-develop-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20240827115529.2931334-1-prasad.kummari@amd.com
2024-09-19imx6q-lxr: Add board supportFabio Estevam
Add support for the Comvetia i.MX6Q LXR2 board, which is uses the Phytec PFLA02 SoM. Based on the original work from Stefano Babic <sbabic@denx.de>. The Phytec PFLA02 devicetrees are taken from kernel 6.11-rc7. The imx6q-lxr.dts has been submitted upstream: https://lore.kernel.org/linux-devicetree/20240913200906.1753458-3-festevam@gmail.com/ After it gets accepted in mainline (most likely in kernel 6.13), the lxr2 board can then be switched to OF_UPSTREAM and these device trees can be removed from U-Boot. Signed-off-by: Fabio Estevam <festevam@denx.de>
2024-09-19imx93_evk: Remove CONFIG_IMX9_LOW_DRIVE_MODE and ld defconfigPeng Fan
Remove unused CONFIG_IMX9_LOW_DRIVE_MODE kconfig and imx93_11x11_evk_ld_defconfig. Remove the ld timing file. The LD mode support will be added back with runtime detection later. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: trdc: introduce trdc_mbc_blk_numPeng Fan
Add trdc_mbc_blk_num to get num blks in a MBC mem slot, then drop the hardcoded value '40' for NIC OCRAM configuration. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: trdc: cleanup codePeng Fan
Replace magic number with meaningful macros. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx: Generalize fixup_thermal_tripsPeng Fan
i.MX8M and i.MX9 have duplicated fixup_thermal_trips, so move it to arch/arm/mach-imx/fdt.c to avoid duplicated code. The critial temperature point for i.MX9 set to "maxc - 5" back to give some margin. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx93: Add Low performance parts 9302/9301 supportYe Li
Add support for iMX93 low performance parts 9302 and 9301 which restrict to low drive voltage only. The parts run A55 max speed at 900Mhz and M33 at 133Mhz, have NPU and A55 core1 (9301) disabled. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: soc: Disable cpu1 for variants that only has one A55 corePeng Fan
Disale CPU1 for i.MX93 variants that only has one A55 core and update cooling maps. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx: Generalize disable_cpu_nodesPeng Fan
disable_cpu_nodes could be reused by i.MX9, so move disable_cpu_nodes out from mach-imx/imx8m/soc.c to mach-imx/fdt.c and update disable_cpu_nodes to make it easy to support different socs. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx8m: soc: Drop disable_pmu_cpu_nodesPeng Fan
i.MX8M use PPI for PMU interrupts, there is no reason to update interrupt-affinity for PMU even interrupt-affinity was wrongly added to device tree before. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: Add 233Mhz DDR PLL frequencyYe Li
To support 1.866GTS LPDDR4x timing script, need to add 233Mhz freq to DDR PLL for second mission point at 933MTS. Otherwise DDR training will fail. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: soc: Mask the wdog reset in src by default on i.mx9Jacky Bai
Normally, the wdog will be used for trigger external PMIC reset through the WDOG_ANY pin. If the PMIC chip has debounce logic for the reset signal, in some corner case the wdog can NOT trigger external PMIC reset if the SoC has been reset internal before the PMIC captures the WDOG_ANY pin reset, so need to keep the WDOG3-5 reset masked in the SRC to let the PMIC to do the reset safely. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: clock: Update clock init function and sequenceYe Li
Since we use SPEED GRADE fuse to set A55 frequency, remove the set_arm_core_low_drive_clk function which has hard coded frequency. And adjust clock_init called sequence and split it to early and late functions. Set the authen register in early function, because CCF driver checks NS bit. Set bus and core clock in late function, because the fuse read and SoC type/rev depend on ELE. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: soc: Add function to get target voltage modeYe Li
Replace the static CONFIG_IMX9_LOW_DRIVE_MODE with runtime target voltage mode by checking the part's SPEED GRADE fuse. SPL will configure to highest A55 speed which is indicated by the SPEED fuse and select corresponding voltage mode. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: soc: Print ELE informationPeng Fan
The boot image includes Edgelock Enclave(ELE) Firmware. Print the information out to let user know which version firmware is being used. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: soc: Change second Ethernet MAC fuse layoutYe Li
The second Ethernet MAC (eQOS) fuse layout is changed since i.MX93 A1 following other i.MX platforms, for example i.MX8MP. Order for A0: MAC1_ADDR[15:0] MAC1_ADDR[31:16] MAC1_ADDR[47:32] MAC2_ADDR[47:32] MAC2_ADDR[15:0] MAC2_ADDR[31:16] Order since A1: MAC1_ADDR[15:0] MAC1_ADDR[31:16] MAC1_ADDR[47:32] MAC2_ADDR[15:0] MAC2_ADDR[31:16] MAC2_ADDR[47:32] Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: soc: Change FSB directly access to fuse APIPeng Fan
To support OSCCA enabled part which has disabled FSB access from SOC, change directly read from FSB to use fuse_read API. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: soc: Print UID in big endian format for EL2GOYe Li
Print UID in big endian format and as one buffer of bytes, so customer can directly use it for EdgeLock 2GO. Before: UID: 0xf6c8ae93 0x0f46b326 0x10d61eb3 0x0583c2d2 Become: UID: 93aec8f626b3460fb31ed610d2c28305 Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: soc: imx9: soc: Align UID endianness with ROMFrank Li
ROM use UID[0] and UID[1] as serial number with big endian when usb serial download. After update this, uuu(>1.6) can use below command to filter out devices when multi boards connected. uuu -ms <serial#> ... [sudo] uuu -lsusb can list known devices with serial# informaiton. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-19imx9: soc: Configure TRDC for M33 TCM accessYe Li
On OSCCA part, M33 TCM is used for ROM PATCH and protected by ELE ROM. So after release TRDC, we need to configure TRDC for M33 TCM, otherwise A55 can't access the TCM. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
2024-09-19imx9: soc: wait ssar when power on power domainPeng Fan
SSAR handshake done means power on finished, not ISO done. so correct the waiting mask. Fixes: 0256577a83b ("imx: imx9: Add MIX power init") Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-09-16Merge tag 'v2024.10-rc5' into nextTom Rini
Prepare v2024.10-rc5
2024-09-13Merge tag 'efi-next-20241024' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-efi into next Pull request efi-next-20241024 UEFI: * Use generated UUIDs in UEFI capsules: - efi: define struct efi_guid - lib: uuid: add UUID v5 support - efi: add a helper to generate dynamic UUIDs - doc: uefi: document dynamic UUID generation - sandbox: switch to dynamic UUIDs - lib: uuid: supporting building as part of host tools - include: export uuid.h - tools: mkeficapsule: use u-boot UUID library - tools: mkeficapsule: support generating dynamic GUIDs - test: lib/uuid: add unit tests for dynamic UUIDs - test: lib/uuid: add tests for UUID version/variant bits * Minor code clean-up - shorten efi_bootmgr_release_uridp_resource() - rename efi_bootmgr_image_return_notify - return the correct error in efi_bootmgr_release_uridp() - Kconfig: clean up the efi configuration status - Use puts() in cout so that console recording works - Put back copyright message in helloworld.c
2024-09-12include: export uuid.hCaleb Connolly
Move this header to include/u-boot/ so that it can be used by external tools. Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-09-11ARM: imx: Enable MMU and dcache very early on i.MX8MMarek Vasut
Enable MMU and caches very early on in the boot process on i.MX8M in U-Boot proper. This allows board_init_f to run with icache and dcache enabled, which saves some 700 milliseconds of boot time on i.MX8M Plus based device. The 'bootstage report' output is below: Before: ``` Timer summary in microseconds (8 records): Mark Elapsed Stage 0 0 reset 961,363 961,363 board_init_f 1,818,874 857,511 board_init_r 1,921,474 102,600 eth_common_init 2,013,702 92,228 eth_initialize 2,015,238 1,536 main_loop Accumulated time: 32,775 dm_r 289,165 dm_f ``` After: ``` Timer summary in microseconds (8 records): Mark Elapsed Stage 0 0 reset 989,466 989,466 board_init_f 1,179,100 189,634 board_init_r 1,281,456 102,356 eth_common_init 1,373,857 92,401 eth_initialize 1,375,396 1,539 main_loop Accumulated time: 12,630 dm_f 32,635 dm_r ``` Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2024-09-10treewide: drop redundant "type string" for SYS_SOC and friendsRasmus Villemoes
The Kconfig symbols SYS_ARCH, SYS_CPU, SYS_SOC, SYS_VENDOR and SYS_BOARD are defined in arch/Kconfig as having type string, and most board files simply amend those definition with suitable default "foo" or default "foo" if BAR stanzas. But some also include a redundant repetition of the type. Homogenize the code base by removing those lines. Generated by find arch/*/ board -name Kconfig | xargs perl -i -g -pe 's/(config SYS_(ARCH|CPU|SOC|VENDOR|BOARD)\n)\s*string\n/\1/gs' with the trailing slash in arch/*/ ensuring that arch/Kconfig itself is not found. This does not change boards which add a prompt string, e.g. string "Board name" because I think those change the semantics of the symbol into being user-settable. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Tom Rini <trini@konsulko.com>
2024-09-10arm: Remove ethernut5 boardTom Rini
As per the maintainers at egnite GmbH, they are no longer interested in supporting this board. Go and remove the platform here. Furthermore, this is the only AT91SAM9XE platform in-tree so remove supporting code for that as well. Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2024-09-09imx8mq-u-boot: Pass FIT offset to fix boot regressionFabio Estevam
Since commit 37e50627efac ("ARM: dts: imx: Convert i.MX8M flash.bin image generation to binman") the imx8mq-evk fails to boot: U-Boot SPL 2024.10-rc4 (Sep 09 2024 - 16:08:22 -0300) PMIC: PFUZE100 ID=0x10 SEC0: RNG instantiated Normal Boot Trying to boot from MMC2 Fix it by passing the offset property for the FIT image, just like it is done on i.MX8MM. Fixes: 37e50627efac ("ARM: dts: imx: Convert i.MX8M flash.bin image generation to binman") Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Marek Vasut <marex@denx.de>
2024-09-09ARM: dts: renesas: Minimize R8A779G0 V4H RPC SPI DT nodeMarek Vasut
The RPC SPI DT node is now part of mainline Linux DT, remove the duplicate content from U-Boot DT extras. The SPI flash DT node name has been changed from "spi-flash@0" to "flash@0", reflect this change in this patch. Retain "bank-width" and "num-cs" DT properties which are used by U-Boot. Retain "spi-rx-bus-width" and "spi-tx-bus-width" DT properties to indicate the bus should always be operated in 1-1-1 mode as the U-Boot RPC SPI driver does not support higher bus width modes yet. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-09-06dts: qcs6490-rb3gen2-u-boot: USB host modeCaleb Connolly
Adjust DTS so USB runs in host mode. The type-c port is the only supported port (since the others need PCIe). Booting from USB is possible with a powered type-c dock. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-09-06dts: qcs6490-rb3gen2-u-boot: add override dtsiCaleb Connolly
For running U-Boot as primary bootloader we must define the memory layout statically. Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-09-06armv8: mmu: add a way to map additional regionsCaleb Connolly
In some cases we might want to map some memory region after enabling caches. Introduce a new helper for this. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-09-06mach-snapdragon: set loadaddrCaleb Connolly
This variable is used by default in some commands, set it to the same as kernel_addr_r. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-09-06mach-snapdragon: populate fallback FDTCaleb Connolly
Set the fdt_addr_r environment variable to a region of LMB allocated memory, and populate it by default with a copy of U-Boots FDT. This will be used for Linux if no other DT is provided. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-09-06mach-snapdragon: allocate fastboot buffer dynamicallyCaleb Connolly
We don't know at build time where a sensible place for this is, allocate it at runtime like the other variables. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-09-06mach-snapdragon: set serial numberCaleb Connolly
In the typical case where we chainload from ABL, the serial number is available in the DT bootargs. Read it out and set the serial# environment variable so that it can be used by fastboot. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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