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CONFIG_LTO enables Link Time Optimizations that helps in reducing binary
size. The config has been validated on all K3 platforms so can be safely
enabled.
Signed-off-by: Anshul Dalal <anshuld@ti.com>
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Aristo Chen <jj251510319013@gmail.com> says:
This series introduces a validation step in mkimage to ensure that all image
names referenced under the /configurations node of a FIT source (ITS) are
actually defined under the /images node.
### Motivation
When using mkimage to build FIT images, it's easy to mistakenly reference
nonexistent image nodes in configurations (e.g., referencing a missing `fdt` or
`firmware` node). Such issues are often not caught until runtime in U-Boot.
This series aims to catch these errors early during FIT image creation by
validating the configuration references in mkimage itself.
Link: https://lore.kernel.org/r/20250610074121.8308-1-aristo.chen@canonical.com
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The phycore-am62x build was broken due to mkimage reporting an undefined
'image "tifsstub-hs"' in the 'loadables' property of the FIT configuration.
This occurred because the `loadables` field referenced `tifsstub-hs`,
`tifsstub-fs`, and `tifsstub-gp`, but no corresponding nodes were defined
under /images.
This patch was inspired by commit 622f826bf025704cbcc4f39252d4a83129a9cabb
("arm: dts: phycore-am62x: Package TIFS Stub"). It resolves the issue by
adding proper Binman nodes for each TIFS variant (`tifsstub-hs`,
`tifsstub-fs`, and `tifsstub-gp`).
Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
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Sughosh Ganu <sughosh.ganu@linaro.org> says:
The LMB module has a bunch for API's which are used for allocating
memory. There are a couple of API's for requesting memory, and two
more for reserving regions of memory. Replace these different API's
with a single one, lmb_alloc_mem(). The type of allocation to be made
is specified through one of the parameters to the function.
Additionally, the two API's for reserving regions of memory,
lmb_reserve() and lmb_alloc_addr() are the same with one
difference. One can reserve any memory region with lmb_reserve(),
while lmb_alloc_addr() actually checks that the memory region being
requested is part of the LMB memory map. Reserving memory that is not
part of the LMB memory map is pretty futile -- the allocation
functions do not allocate memory which has not been added to the LMB
memory map.
This series also removes the functionality allowing for reserving
memory regions outside the LMB memory map. Any request for reserving a
region of memory outside the LMB memory map now returns an -EINVAL
error.
Certain places in the common code using the LMB API's were not
checking the return value of the functions. Checks have been added for
them. There are some calls being made from the architecture/platform
specific code which too do not check the return value. Those have been
kept the same, as I do not have the platform with me to check if it
causes any issues on those platforms.
In addition, there is a patch which refactors code in
lmb_overlaps_region() and lmb_can_reserve_region() so that both
functionalities can be put in a single function, lmb_overlap_checks().
Finally, a new patch has been added which checks the return value of
the lmb allocation function before copying the device-tree to the
allocated address.
Link: https://lore.kernel.org/r/20250617104346.1379981-1-sughosh.ganu@linaro.org
[trini: Rework arch/arm/mach-snapdragon/board.c merge]
Signed-off-by: Tom Rini <trini@konsulko.com>
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The board_late_init() function allocates memory for a bunch of
environment variables, including fdt_addr_r. The device-tree then gets
copied to the memory pointed to by fdt_addr_r. However, the memory
allocation request can fail, in which case the address that is being
written to would not be allocated. Add a check that the memory
allocation has succeeded before copying the device-tree.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
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There currently are two API's for requesting memory from the LMB
module, lmb_alloc() and lmb_alloc_base(). The function which does the
actual allocation is the same. Use the earlier introduced API
lmb_alloc_mem() for both types of allocation requests.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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There currently are multiple allocation API's in the LMB module. There
are a couple of API's for allocating memory(lmb_alloc() and
lmb_alloc_base()), and then there are two for requesting a reservation
for a particular memory region (lmb_reserve() and
lmb_alloc_addr()). Introduce a single API lmb_alloc_mem() which will
cater to all types of allocation requests and replace lmb_reserve()
and lmb_alloc_addr() with the new API.
Moreover, the lmb_reserve() API is pretty similar to the
lmb_alloc_addr() API, with the one difference being that the
lmb_reserve() API allows for reserving any address passed to it --
the address need not be part of the LMB memory map. The
lmb_alloc_addr() does check that the address being requested is
actually part of the LMB memory map.
There is no need to support reserving memory regions which are outside
the LMB memory map. Remove the lmb_reserve() API functionality and use
the functionality provided by lmb_alloc_addr() instead. The
lmb_alloc_addr() will check if the requested address is part of the
LMB memory map and return an error if not.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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into next
This concludes support for the Allwinner A133 SoC, the biggest chunk of
which is the DRAM init code. Also includes support for a devboard using
this SoC, the DT of which got added to the kernel only recently. The
same is true for another H618 devboard, so add the respective devconfig
as well.
Gitlab CI passed, and I booted that briefly on those two boards.
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https://source.denx.de/u-boot/custodians/u-boot-snapdragon into next
This PR introduces 3 new platforms, two from the new Dragonwing IQx
series (QCS615 and QCS8300) as well as the IPQ5424.
Additionally:
* Support for booting downstream Android boot images on some phones is
added
* Capsule update support is expanded to be more generic, determining
which partition U-Boot was flashed to automatically and supporting
many more boards.
* Minor capsule update bugs are fixed
* A watchdog driver is added and gets timeout support
* Autoboot now requires pressing "space" specifically to stop booting as
a workaround for some boards getting rogue key presses which would
cause autoboot to fail
* Documentation is added for the Dragonwing boards
* The RB1/2 now use USB gadget mode rather than host
* A bug is fixed where GPIO reads could return incorrect values
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Expand capsule update support to correctly identify which partition
U-Boot is flashed to (between xbl, uefi, and boot including A/B
variants).
Use qcom_boot_source to determine if we were chainloaded from ABL,
meaning U-Boot is on the boot partition, otherwise we assume uefi if
it's available, finally leaving the xbl partition.
Set a different fw_name based on the target partition to prevent GUID
collisions, since a board may support U-Boot flashed to boot or XBL we
need to differentiate them since the U-Boot binary must be built
differently.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250411-b4-qcom-capsule-update-improvements-v2-2-27f6b2fcc4a9@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
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Keep track of whether we were loaded via ABL or if U-Boot is running as
a first-stage bootloader.
For now we set this based on if we have a valid external FDT or not,
since it isn't possible to chainload U-Boot from ABL without there being
an external FDT.
This will be used to inform the capsule update logic which partition
U-Boot is flashed to.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250411-b4-qcom-capsule-update-improvements-v2-1-27f6b2fcc4a9@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
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In order to unzipped kernel from androidboot img, extra memory for
loadaddr is needed. So once fastboot is enabled fastboot memory also
share with loadaddr.
That can balance with memory constrain soc and android usecase.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: George Chan <gchan9527@gmail.com>
Link: https://lore.kernel.org/r/20250518-android-boot-v3-3-02c8768e131f@gmail.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
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Enable the workaround for whole snapdragon family.
Suggested-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: George Chan <gchan9527@gmail.com>
Link: https://lore.kernel.org/r/20250518-android-boot-v3-2-02c8768e131f@gmail.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
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Added the memory entry to bootup.
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250521035324.1182833-2-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
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Added the memory entry to bootup.
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-3-quic_bselvana@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
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The default DIP switch configuration on RB1/2 is to enable flashing
support via USB type-c port either using QDL or fastboot. It's just
cumbersome to get the host mode working in U-Boot via DIP switch toggle
when you need the flashing capability using the type-c port.
So instead lets enable fastboot in U-Boot for RB1/2 boards which is
more useful in the default board DIP switch configuration. This let's
us to drop dr_mode DT fixup.
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250516130854.606067-1-sumit.garg@kernel.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
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The Allwinner A100 SoC has been around for a while, mostly on cheap
tablets, but didn't generate much interest in the community so far.
There were some efforts by two Allwinner employees in 2020, which led
to basic upstream Linux support for that SoC, although this momentum
dried up pretty quickly, leaving a lot of peripherals unsupported.
The A100 was silently replaced with the seemingly identical Allwinner
A133, which is reportedly a better bin of the A100. So far we assume
that both are compatible from a software perspective. There are some
more devices with the A133 out there now, so people are working on
filling the gaps, and adding U-Boot (and TF-A) support.
Based on the just added pinctrl, clock and DRAM support, this adds the
missing bits, mostly addresses and values for the SPL.
The A133 seems to be an predecessor to the H6, so we can share a lot of
code with that (and the H616 code), and just need to adjust some details.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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This adds preliminary support for the DRAM controller in the Allwinner
A100/A133 SoCs.
This is work in progress, and has rough edges, but works on at least
three different boards. It contains support for DDR4 and LPDDR4.
Signed-off-by: Cody Eksal <masterr3c0rd@epochal.quest>
[Andre: formatting fixes, adapt to mainline, drop unused parameters,
remove struct struct sunxi_mctl_com_reg, hardcode MR registers,
switch to mctl_check_pattern(), remove simple DRAM check]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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Prepare v2025.07-rc5
With this merge, tighten up the LTO_FLAGS removal we added to not
trigger on ARMv7 (which is Thumb-2 and should be fine).
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Add initial support for the IPQ5424 MMC based RDP platforms.
Define memory layout statically.
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-3-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
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Marek Vasut <marek.vasut+renesas@mailbox.org> says:
Rename the environment related variables and add ENV_ prefix, so that
all configuration options which are related to environment would have
an CONFIG_ENV_ prefix. No functional change.
Link: https://lore.kernel.org/r/20250609192701.20260-1-marek.vasut+renesas@mailbox.org
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Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.
Use ENV_MMC_EMMC_HW_PARTITION to clarify this is the eMMC hardware
partition selector, not a software partition table entry selector.
Retain the ENV_MMC_ prefix to make it easier to search for all the
SD/MMC related ENV options. Update the help text accordingly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.
Use ENV_MMC_DEVICE_INDEX to clarify this is the SD/MMC device
index, a number, as enumerated by U-Boot. Update the help text
accordingly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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Rename the variable and add ENV_ prefix, so that all configuration
options which are related to environment would have an CONFIG_ENV_
prefix. No functional change.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2025.10 cycle:
This feature set includes the addition of new sam9x7 SoC and a new board
named sam9x7-curiosity. There is also new support for sam9x60 compatible
at91 watchdog.
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According to include/sysreset.h the reset_cpu() function does not take any args
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Reviewed-by: Tom Rini <trini@konsulko.com>
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into next
- Assorted cleanups and R-Car Gen4 watchdog driver
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Add board specific functions for sam9x75 curiosity
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
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Since the SoC and board DT are already available in dts/upstream,
add the difference from upstream DTS to at91-sam9x75_curiosity-u-boot.dtsi
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
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Add new Microchip sam9x7 SoC based on an ARM926.
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
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Enable watchdog node on SAM9X60-Curiosity board.
A default timeout of 16s is added which is the maximum supported value,
also matching Linux driver's behavior.
Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
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Add the watchdog timer node for the sam9x60 SoC's.
Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
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SAM9X60 has a slightly different watchdog implementation:
- Timer value moved into a new register WLR
- Some MR register fields have their position changed
This patch add SAM9X60 support, also adds a compatible
for SAMA5D4 which is the same as existing SAM9260.
Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Stefan Roese <sr@denx.de>
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Use the name "mr" since we are referring to timer mode register.
Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Stefan Roese <sr@denx.de>
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at91_wdt struct is only used by spl, remove this reference and the struct
itself.
Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Stefan Roese <sr@denx.de>
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Moteen Shah <m-shah@ti.com> says:
This patch series adds the functionality to print the DM firmware
version being used. Before requesting TISCI for the DM version we
first check if the DM split mode capability exists, if yes, we proceed
onto making the call to TISCI for retrieving the version information.
DM split mode capability indicates that the DM is a separate binary
altogether and has its own versioning information similar to TIFS.
Boot Logs: https://gist.github.com/Jamm02/37864f605445944a0c0caf426e0aba50
Link: https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/general/core.html#tisci-msg-query-fw-caps
Link: https://lore.kernel.org/r/20250609081434.1000377-1-m-shah@ti.com
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Beleswar Padhi <b-padhi@ti.com> says:
This series adds remoteproc support on MCU R5F in Split mode.
During boot, ROM can bring up the boot R5F cores in either lockstep or
split mode based on X509 certificate flags. If booted in lockstep mode,
the MCU R5F cores will run first the R5 SPL, and then once A72 comes up,
will run the Device Manager (DM) firmware. But if booted in split mode, core
0 will run DM firmware and second core sits in WFI. Shut it down so that
other firmwares can later be loaded on them.
The shutdown of MCU R5 Core 1 is invoked at A72 SPL init, as by that
time Device Manager (DM) is up and running on R5 Core 0. The shutdown
of MCU R5 Core 1 is handled by Device Manager itself.
Test logs:
https://gist.github.com/3V3RYONE/ee8e3cb9aa5f4c5c00b059b9c14bfa98
Link: https://lore.kernel.org/r/20250609081429.1724643-1-b-padhi@ti.com
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Print DM firmware's version in the boot up process of K3 devices,
having DM capability(DM as a separate binary).
Signed-off-by: Moteen Shah <m-shah@ti.com>
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Add a function to print version of the DM firmware in use.
The function queries the firmware capabilities first and if
DM split mode bit is set, sends a request to TISCI for
retrieving the version information.
The DM split mode bit indicates that DM is a separate binary
altogether and hence it will have its own versioning.
Signed-off-by: Moteen Shah <m-shah@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
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During boot, ROM can bring up the MCU R5F cores in either lockstep or
split mode based on X509 certificate flags. If booted in split mode,
core 0 will run DM firmware and second core sits in WFI. Add support to
shut down core 1 so that other firmwares can later be loaded on them.
The shutdown of MCU R5 Core 1 is invoked at A72 SPL init, as by that
time Device Manager (DM) is up and running on R5 Core 0. The shutdown
request of Core 1 is handled by Device Manager itself.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
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Currently the MCU R5 processor ids and device ids are only defined for
R5 SPL Stage. Expose these ids always so that A72 SPL can utilize this
information to shutdown MCU R5 Core 1 when booted in Split mode.
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
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The bootph-* tags are now part of mainline Linux DTs as commits:
f1a1268572cc ("ARM: dts: renesas: rcar-gen2: Add boot phase tags")
399f14ff6625 ("arm64: dts: renesas: rcar: Add boot phase tags")
624b2a23d46a ("arm64: dts: renesas: rzg2: Add boot phase tags")
Drop local duplicates of the same tags, as well as duplicate
property assignments which are part of the core DTs themselves.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/26728
- Add support for imx28 BTT boards.
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The btt[c3] devices are based on imx287 SoC.
U-Boot SPL 2025.04-01081-g07e086681d26 (Apr 16 2025 - 12:24:36 +0200)
Trying to boot from MMC1
U-Boot 2025.04-01081-g07e086681d26 (Apr 16 2025 - 12:24:36 +0200)
CPU: Freescale i.MX28 rev1.2 at 454 MHz
BOOT: SSP SPI #3, master, 3V3 NOR
Model: BTT3
Board: LWE BTT SoM HW rev 0
DRAM: 256 MiB
Core: 86 devices, 15 uclasses, devicetree: separate
MMC: MXS MMC: 0
Loading Environment from SPIFlash... SF: Detected is25lp128 with page
size 256 Bytes, erase size 64 KiB, total 16 MiB
OK
In: serial@80074000
Out: serial@80074000
Err: serial@80074000
Net: eth0: ethernet@800f0000
Hit any key to stop autoboot: 0
Signed-off-by: Lukasz Majewski <lukma@denx.de>
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https://source.denx.de/u-boot/custodians/u-boot-dfu into next
u-boot-dfu-next-20250616
CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/26704
Usb gadget:
- Fix ti_musb driver in gadget mode (with DM_USB_GADGET)
DFU:
- mmc/scsi backends when using 10 or more partitions
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Writing to eMMC on RK3528 is affected with the same or a similar issue
as on RK3588, where eMMC must init to HS200 at least once to fully work.
Trying to write u-boot-rockchip.bin to eMMC fails with:
=> mmc write $fileaddr 40 5000
MMC write: dev # 0, block # 64, count 20480 ... mmc write failed
0 blocks written: ERROR
For U-Boot to enable HS200 mode the mmc-hs200-1_8v prop must be defined
in the device tree. Linux does not seem to be affected and is able to
detect and use HS200 without this prop.
Enable use of HS200 and fix eMMC write on RK3528 by adding the missing
mmc-hs200-1_8v prop for affected boards:
=> mmc write $fileaddr 40 5000
MMC write: dev # 0, block # 64, count 20480 ... 20480 blocks written: OK
Fixes: b112a44531cb ("board: rockchip: Add minimal generic RK3528 board")
Fixes: ccbddf645310 ("board: rockchip: Add Radxa E20C")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
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6.15 + winbond"
Christian Marangi <ansuelsmth@gmail.com> says:
This small series sync linux/bitfield.h from Linux 6.15 and fix all
the compilation error due to a change in the header include.
The sync is needed to make it easier to support the winbond changes.
The changes are CI test with [1]
[1] https://github.com/u-boot/u-boot/pull/777
Link: https://lore.kernel.org/r/20250607211133.2005-1-ansuelsmth@gmail.com
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The GENMASK/GENMASK_ULL macro requires inclusion of linux/bitops.h
header. It does currently work as bitfield.h includes it indirectly
but this will change when bitfield.h will be synced with new Linux
version.
Also raw printf require linux/bug.h header (also currently included
indirectly by bitfield.h)
Explicitly include the headers to fix future compilation error.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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E Shattow <e@freeshell.de> says:
Make consistent use of lowercase hexadecimal prefix '0x' throughout U-Boot.
There are a few remaining uses of uppercase 'X' to denote hexadecimal prefix
or placeholder in documentation and error messages.
External devicetree-rebasing dts/upstream and the generated code of
xilinx/zynq are ignored for the series.
Link: https://lore.kernel.org/r/20250606224558.1117422-1-e@freeshell.de
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Use consistent lowercase hex prefix style in arch/*
Signed-off-by: E Shattow <e@freeshell.de>
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