| Age | Commit message (Expand) | Author |
|---|---|---|
| 2013-11-09 | mips32: detect L1 cache sizes if they're not defined | Paul Burton |
| 2013-07-24 | MIPS: mips32/cache.S: use v1 register for indirect function calls | Gabor Juhos |
| 2013-07-24 | MIPS: mips32/cache.S: store cache line size in t8 register | Gabor Juhos |
| 2013-07-24 | MIPS: mips32/cache.S: save return address in t9 register | Gabor Juhos |
| 2013-07-24 | MIPS: mips32/cache.S: remove superfluous register assignment | Gabor Juhos |
| 2013-07-24 | Add GPL-2.0+ SPDX-License-Identifier to source files | Wolfgang Denk |
| 2012-10-16 | MIPS: don't use camel-case style | Zhi-zhou Zhang |
| 2012-04-02 | MIPS: fix inconsistency in config option for cache operation mode | Daniel Schwierzeck |
| 2011-05-07 | MIPS: Coding style cleanups on common assembly files | Shinya Kuribayashi |
| 2011-05-07 | MIPS: Remove mips_cache_lock() feature | Shinya Kuribayashi |
| 2011-04-02 | MIPS: Move content of arch/mips/cpu to arch/mips/cpu/mips32 | Daniel Schwierzeck |
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index : u-boot-toradex.git | |
| U-Boot bootloader for Apalis and Colibri modules | Toradex |
| summaryrefslogtreecommitdiff |