| Age | Commit message (Expand) | Author |
|---|---|---|
| 2025-09-19 | dts: th1520: Switch to upstream devicetree | Yao Zi |
| 2025-07-17 | riscv: cpu: th1520: Limit upper RAM boundary to 4 GiB | Yao Zi |
| 2025-07-03 | riscv: cpu: th1520: Enable pinctrl by default | Yao Zi |
| 2025-07-03 | riscv: cpu: th1520: Add a routine to bring up secondary cores | Yao Zi |
| 2025-07-03 | riscv: cpu: th1520: Setup CPU feature CSRs in harts_early_init | Yao Zi |
| 2025-06-09 | riscv: cpu: th1520: Support cache enabling/disabling in M mode only | Yao Zi |
| 2025-06-09 | riscv: cpu: th1520: Build spl.c for SPL only | Yao Zi |
| 2025-05-21 | riscv: cpu: th1520: Select clock driver | Yao Zi |
| 2025-05-21 | riscv: cpu: th1520: Initialize IOPMPs in SPL | Yao Zi |
| 2025-05-21 | riscv: cpu: Add TH1520 CPU support | Yao Zi |
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index : u-boot-toradex.git | |
| U-Boot bootloader for Apalis and Colibri modules | Toradex |
| summaryrefslogtreecommitdiff |