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2020-12-22sandbox: spi: Drop unused sandbox_spi_parse_spec functionOvidiu Panait
Commit 1289e96797bf ("sandbox: spi: Drop command-line SPI option") dropped support for specifying SPI devices on the command line, removing the only user of sandbox_spi_parse_spec(). Remove the function too. Fixes: 1289e96797bf ("sandbox: spi: Drop command-line SPI option") Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-22sandbox: implement invalidate_icache_all()Heinrich Schuchardt
Before executing code that we have loaded from a file we need to flush the data cache and invalidate the instruction flash. Implement functions flush_cache() and invalidate_icache_all(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-22sandbox: implement runtime system resetHeinrich Schuchardt
Implement a reset function that we can call after ExitBootServices(), when all driver model devices are gone. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-18dm: Drop the unused arg in uclass_find_device_by_seq()Simon Glass
Now that there is only one sequence number (rather than both requested and assigned ones) we can simplify this function. Also update its caller to simplify the logic. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18dm: test: Add a test for DM_UC_FLAG_NO_AUTO_SEQSimon Glass
Check that this flag operates as expected. This patch is not earlier in this series since is uses the new behaviour of dev_seq(). Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18dm: Switch over to use new sequence number for dev_seq()Simon Glass
Update this function to use the new sequence number and fix up the test that deals with this. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18x86: Drop unnecessary mp_init logicSimon Glass
Now that sequence numbers are set up when devices are bound, this code is not needed. Also, we should use dev_seq() instead of req_seq. Update the whole file accordingly. Also fix up APL cpu while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18dm: Avoid accessing seq directlySimon Glass
At present various drivers etc. access the device's 'seq' member directly. This makes it harder to change the meaning of that member. Change access to go through a function instead. The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18linker_lists: Fix alignment issueSimon Glass
The linker script uses alphabetic sorting to group the different linker lists together. Each group has its own struct and potentially its own alignment. But when the linker packs the structs together it cannot ensure that a linker list starts on the expected alignment boundary. For example, if the first list has a struct size of 8 and we place 3 of them in the image, that means that the next struct will start at offset 0x18 from the start of the linker_list section. If the next struct has a size of 16 then it will start at an 8-byte aligned offset, but not a 16-byte aligned offset. With sandbox on x86_64, a reference to a linker list item using ll_entry_get() can force alignment of that particular linker_list item, if it is in the same file as the linker_list item is declared. Consider this example, where struct driver is 0x80 bytes: ll_entry_declare(struct driver, fred, driver) ... void *p = ll_entry_get(struct driver, fred, driver) If these two lines of code are in the same file, then the entry is forced to be aligned at the 'struct driver' alignment, which is 16 bytes. If the second line of code is in a different file, then no action is taken, since the compiler cannot update the alignment of the linker_list item. In the first case, an 8-byte 'fill' region is added: .u_boot_list_2_driver_2_testbus_drv 0x0000000000270018 0x80 test/built-in.o 0x0000000000270018 _u_boot_list_2_driver_2_testbus_drv .u_boot_list_2_driver_2_testfdt1_drv 0x0000000000270098 0x80 test/built-in.o 0x0000000000270098 _u_boot_list_2_driver_2_testfdt1_drv *fill* 0x0000000000270118 0x8 .u_boot_list_2_driver_2_testfdt_drv 0x0000000000270120 0x80 test/built-in.o 0x0000000000270120 _u_boot_list_2_driver_2_testfdt_drv .u_boot_list_2_driver_2_testprobe_drv 0x00000000002701a0 0x80 test/built-in.o 0x00000000002701a0 _u_boot_list_2_driver_2_testprobe_drv With this, the linker_list no-longer works since items after testfdt1_drv are not at the expected address. Ideally we would have a way to tell gcc not to align structs in this way. It is not clear how we could do this, and in any case it would require us to adjust every struct used by the linker_list feature. One possible fix is to force each separate linker_list to start on the largest possible boundary that can be required by the compiler. However that does not seem to work on x86_64, which uses 16-byte alignment in this case but needs 32-byte alignment. So add a Kconfig option to handle this. Set the default value to 4 so as to avoid changing platforms that don't need it. Update the ll_entry_start() accordingly. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass
Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Update 'auto' declarations to be on one lineSimon Glass
Fix up the code style for those declarations that should now fit onto one line, which is all of them that currently do not. This is needed for dtoc to detect the structs correctly, at present. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass
This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass
Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass
We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: Remove uses of device_bind_offset()Simon Glass
This function is not needed since the standard device_bind() can be used instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: core: Rename device_bind() to device_bind_offset()Simon Glass
This function is not necessary anymore, since device_bind_ofnode() does the same thing and works with both flattree and livetree. Rename it to indicate that it is special. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13test: unit test for exception commandHeinrich Schuchardt
Test that an exception SIGILL is answered by a reset on the sandbox if CONFIG_SANDBOX_CRASH_RESET=y or by exiting to the OS otherwise. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-13sandbox: add handler for exceptionsHeinrich Schuchardt
Add a handler for SIGILL, SIGBUS, SIGSEGV. When an exception occurs print the program counter and the loaded UEFI binaries and reset the system if CONFIG_SANDBOX_CRASH_RESET=y or exit to the OS otherwise. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-12-04bootm: Support string substitution in bootargsSimon Glass
In some cases it is necessary to pass parameters to Linux so that it will boot correctly. For example, the rootdev parameter is often used to specify the root device. However the root device may change depending on whence U-Boot loads the kernel. At present it is necessary to build up the command line by adding device strings to it one by one. It is often more convenient to provide a template for bootargs, with U-Boot doing the substitution from other environment variables. Add a way to substitute strings in the bootargs variable. This allows things like "rootdev=${rootdev}" to be used in bootargs, with the ${rootdev} substitution providing the UUID of the root device. For example, to substitute the GUID of the kernel partition: setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1 kern_guid=${uuid}" part uuid mmc 2:2 uuid bootm This is particularly useful when the command line from another place. For example, Chrome OS stores the command line next to the kernel itself. It depends on the kernel version being used as well as the hardware features, so it is extremely difficult to devise a U-Boot script that works on all boards and kernel versions. With this feature, the command line can be read from disk and used directly, with a few substitutions set up. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04x86: zimage: Add silent-console processingSimon Glass
At present zimage does its own command-line processing and does not support the 'silent console' feature. There doesn't seem to be any good reason for this. Add support for silent console to zimage. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04bootm: Add tests for fixup_silent_linux()Simon Glass
This function currently has no tests. Export it so that we can implement a simple test on sandbox. Use IS_ENABLED() to remove the unused code, instead #ifdef. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04board: sl28: add OP-TEE Trusted OS support (bl32)Michael Walle
Add support to load the OP-TEE Trusted OS by the SPL. Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-04board: sl28: add ATF support (bl31)Michael Walle
Add support to load the bl31 part of the ARM Trusted Firmware by the SPL. Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-04board: sl28: remove u-boot from loadable DT nodeMichael Walle
It is not needed. Remove it. Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-04armv8: layerscape: don't initialize GIC in SPLMichael Walle
The BL31 expects the GIC to be uninitialized. Thus, if we are loading the BL31 by the SPL we must not initialize it. If u-boot is loaded by the SPL directly, it will initialize the GIC again (in the same lowlevel_init()). This was tested on a custom board with SPL loading the BL31 and jumping to u-boot as BL33 as well as loading u-boot directly by the SPL. In case the ATF BL1/BL2 is used, this patch won't change anything, because no SPL is used at all. Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-04treewide: use CONFIG_IS_ENABLED() for ARMV8_SEC_FIRMWARE_SUPPORTMichael Walle
There is SPL_ARMV8_SEC_FIRMWARE_SUPPORT and ARMV8_SEC_FIRMWARE_SUPPORT. Thus use CONFIG_IS_ENABLED() instead of the simple #ifdef. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Michal Simek <michal.simek@xilinx.com>
2020-12-01IPQ40xx: clk: add USB clock handlingRobert Marko
USB clocks were completely forgotten as driver would always return 0 even if clock ID was unknown. This behaviour changed with "IPQ40xx: clk: dont always return 0" and this will now causes the USB-s to fail probing as clock enable will return -EINVAL. So to fix that lets add all of the USB clocks to the driver. Fixes: 430e1dcf ("IPQ40xx: Add USB nodes") Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-12-01IPQ40xx: clk: dont always return 0Robert Marko
Currently the driver will go through the clock ID-s and set/enable them as needed. But if the ID is unknown it will fall through the switch case to the default case which will always return 0. This is not correct and default cases should return a error code since clock ID is unknown. So lets return -EINVAL instead. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-12-01IPQ40xx: clk: drop breaks in switch caseRobert Marko
There is no point in having break statements in the switch case as there is already a return before break. So lets drop them from the driver. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-12-01IPQ40xx: clk: use dev_read_addr()Robert Marko
Lets convert the driver to use dev_read_addr() instead of the devfdt_get_addr(). While we are here, lets also alphabetise the includes. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-11-28riscv: sifive/fu540: kconfig: Enable support for Opencores I2C controllerPragnesh Patel
Enable support for SiFive FU540 Opencores I2C master controller. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Rick Chen <rick@andestech.com>
2020-11-25remoteproc: stm32: use reset for hold bootPatrick Delaunay
Use the reset function to handle the hold boot bit in RCC with device tree handle with MCU_HOLD_BOOT identifier. This generic reset allows to remove the two specific properties: - st,syscfg-holdboot - st,syscfg-tz This patch prepares alignment with kernel device tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Cc: Fabien DESSENNE <fabien.dessenne@st.com> Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-11-25SPL: stm32mp1: fix spl_mmc_boot_partition not definedRichard Genoud
spl_mmc_boot_partition is only defined when CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is defined. Signed-off-by: Richard Genoud <richard.genoud@posteo.net> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25ARM: dts: stm32: Drop QSPI CS2 on DHCOMMarek Vasut
The QSPI CS2 is not used on DHCOM, remove the pinmux and flash@1. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25ARM: dts: stm32: Fix uSD card-detect GPIO on DHCOMMarek Vasut
The uSD slot card-detect GPIO is connected to PG1, fix it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25ARM: dts: stm32: Add DHCOM based PicoITX boardMarek Vasut
Add DT for DH PicoITX unit, which is a bare-bones carrier board for the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom board-to-board expansion connector. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25arm: stm32mp: correct the ALIGN macro usagePatrick Delaunay
Correct the ALIGN macro usage in mmu_set_region_dcache_behaviour call: the address must use ALIGN_DOWN and size can use ALIGN macro. With STM32_SYSRAM_BASE=0x2FFC0000 and MMU_SECTION_SIZE=0x100000 for STM32MP15x the computed address was 30000000 instead of 2ff00000. Fixes: 43fe9d2fda24 ("stm32mp1: mmu_set_region_dcache_behaviour") Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25ARM: dts: stm32: Fix typo in stm32h7-u-boot.dtsiPatrice Chotard
Fix typo "firsct" Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25ARM: dts: stm32: Fix timer initialization for stm32 MCU's boardPatrice Chotard
Commit 4b2be78ab66c ("time: Fix get_ticks being non-monotonic") puts in evidence that get_ticks is called before timer initialization. Fix it by initializing timer before relocation. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25ARM: dts: stm32: DT sync with kernel v5.10-rc1 for MCU's boardsPatrice Chotard
Device tree alignment with kernel v5.10-rc1. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25ARM: dts: sync armv7-m.dtsi with kernel v5.10-rc1Patrice Chotard
Since kernel v4.8-rc1, commit 05b23ebc2bd9 ("ARM: dts: armv7-m: remove skeleton.dtsi include"), skeleton.dtsi file is no more included. This synchronization is needed to avoid to get 2 memory node in DTB file if, in DTS file, memory node is declared with the correct syntax as following: memory@90000000 { device_type = "memory"; reg = <0x90000000 0x800000>; }; Then in DTB, we will have the 2 memory nodes, which is incorrect and cause misbehavior during DT parsing by U-boot: memory { device_type = "memory"; reg = <0x00 0x00>; }; memory@90000000 { device_type = "memory"; reg = <0x90000000 0x800000>; }; Issue found when synchronizing MCU's STM32 DT from kernel v5.10-rc1. When using fdtdec_setup_mem_size_base() or fdtdec_setup_memory_banksize() API, first above memory node is found (with reg = <0x00 0x00>), so gd->ram_size, gd->ram_base, gd->bd->bi_dram[bank].start and gd->bd->bi_dram[bank].size are all set to 0 which avoid boards to boot. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-22pinctrl: renesas: r8a77951: Add R8A774E1 PFC supportBiju Das
Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (r8a77951), however it doesn't have several automotive specific peripherals. Add a r8a77951 specific pin groups/functions along with common pin groups/functions for supporting both r8a77951 and r8a774e1 SoC. PFC changes are synced from mainline linux-5.9 commit bbf5c979011a ("Linux 5.9"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-11-22pinctrl: renesas: r8a77965: Add R8A774B1 PFC supportBiju Das
Renesas RZ/G2N (r8a774b1) is pin compatible with R-Car M3-N (r8a77965), however it doesn't have several automotive specific peripherals. Add a r8a77965 specific pin groups/functions along with common pin groups/functions for supporting both r8a77965 and r8a774b1 SoC. PFC changes are synced from mainline linux-5.9 commit bbf5c979011a ("Linux 5.9"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-11-20arm64: zynqmp: Get rid of unused macrosMichal Simek
There is no reason to have these macros. But record offsets of missing register in the structure for future use. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-20microblaze: Enable GCC garbage collector for full U-BootMichal Simek
GCC's garbage collector works for Microblaze for quite a long time but none has enabled it. The same change has be done for example by commit fac4790491f6 ("arc: Eliminate unused code and data with GCC's garbage collector"). Before: text data bss dec hex filename 588760 33592 39192 661544 a1828 u-boot After: text data bss dec hex filename 504504 32164 38608 575276 8c72c u-boot Which saves almost 15% of memory footprint. Also group symbols/functions to proper section. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-11-17sunxi: dts: sync Allwinner V3s-related DTs from Linux 5.10-rc1Icenowy Zheng
This commit imports device tree files that are related to Allwinner V3 series from Linux commit 3650b228f83a ("Linux 5.10-rc1"). Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17sunxi: allow to use AXP20[39] attached to I2C0 on V3 seriesIcenowy Zheng
The reference design of Allwinner V3 series uses an AXP203 or AXP209 PMIC attached to the I2C0 bus of the SoC, although the first community-available V3s board, Lichee Pi Zero, omitted it. Allow to introduce support for the PMIC on boards with it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17sunxi: add V3/S3 supportIcenowy Zheng
Allwinner V3/Sochip S3 uses the same die with Allwinner V3s/S3L, but V3 comes with no co-packaged DDR (DDR3 is usually used externally), and S3L comes with co-packaged DDR3. Add support for Allwinner V3/S3 chips by add SoC names to original V3s choice, and allow to select DDR3. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-11-17sunxi: DT: A64: update device tree filesSamuel Holland
Import updated device trees from Linux tag v5.9. This picks up new hardware (PinePhone, PineTab); and it drops the U-Boot specific DTSI files for the Pinebook and the Teres-I, since the ANX6345 bridge is now supported upstream. A couple of headers needed updates for recently-added hardware support. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>