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2022-12-18Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
This cleans up each board's defconfig, and fixes the serial console on some Olimex board. Also we lose another legacy config variable. The rest are minor cleanups, that actually shouldn't change anything in the build. Passed the gitlab CI, plus briefly tested on Pine64-LTS, LicheePi Nano, and BananaPi M1.
2022-12-14sunxi: board: annotate #endif linesAndre Przywara
The legacy Allwinner code is cluttered with #ifdef's, some of them even nested, which makes the code hard to read and error prone. Eventually we will get rid of most of them, but for now let's at least annotate the #endif lines with the corresponding symbol the bracket started with. Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-12-14x86: cosmetic: Fix a typo in the reserve_arch() commentsBin Meng
It should be fsp_continue(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-14x86: Fix i8259 ifdef include guardAlistair Delva
When building U-Boot with clang, it notices that the i8259.h include guard does not work correctly due to a typo. Fix it. Signed-off-by: Alistair Delva <adelva@google.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Nick Desaulniers <ndesaulniers@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-12-08Merge tag 'u-boot-stm32-20221207' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm - Drop MMCI interrupt-names in STM32H743, STM32MP15 and STM322MP13 DT DHSOM: - Enable assorted ST specific commands - Add version variable - Add boot counter STM32MP13: - Add sdmmc cd-gpios for STM32MP135F-DK - Add clock & reset support STM32 ADC: - Split channel init into several routines - Add support of generic channels binding
2022-12-08Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini
- Kautuk's semihosting patch: move semihosting library from arm directory to common place and add RISC-V support - Zong's Kconfig patch: use "imply" instead of "select" to allow user to decide if SPL_SEPARATE_BSS should be selected
2022-12-08Merge tag 'u-boot-at91-fixes-2023.01-b' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-at91 Second set of u-boot-at91 fixes for the 2023.01 cycle: This is a single tiny fix that allows the correct name for one pin on sama7g5 device. People with DT coming from Linux will have build errors without this if they add NAND device.
2022-12-08riscv: use imply instead of select for SPL_SEPARATE_BSSZong Li
Use imply instead of select, then it can still be disabled by board-specific defconfig, or be set to n manually. Signed-off-by: Zong Li <zong.li@sifive.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Bin Meng <bmeng@tinylab.org>
2022-12-08arch/riscv: add semihosting support for RISC-VKautuk Consul
We add RISC-V semihosting based serial console for JTAG based early debugging. The RISC-V semihosting specification is available at: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Kautuk Consul <kconsul@ventanamicro.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-12-08lib: Add common semihosting libraryKautuk Consul
We factor out the arch-independent parts of the ARM semihosting implementation as a common library so that it can be shared with RISC-V. Signed-off-by: Kautuk Consul <kconsul@ventanamicro.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-12-07ARM: dts: stm32: Drop MMCI interrupt-namesMarek Vasut
The pl18x MMCI driver does not use the interrupt-names property, the binding document has been updated to recommend this property be unused, remove it. Backport of Marek's Linux patch: https://lore.kernel.org/linux-arm-kernel/20221013221242.218808-3-marex@denx.de/ Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-12-07ARM: dts: stm32: add sdmmc cd-gpios for STM32MP135F-DKYann Gautier
On STM32MP135F-DK, the SD card detect GPIO is GPIOH4. Backport of the Linux patch: https://lore.kernel.org/linux-arm-kernel/20220921160334.3227138-1-yann.gautier@foss.st.com/ Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-12-07arm: dts: stm32mp13: add support of RCC driverGabriel Fernandez
Adds support of Clock and Reset drivers for STM32MP13 platform. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-12-05sandbox: fix sound driverHeinrich Schuchardt
In the callback function we have to use memcpy(). Otherwise we add the new samples on top of what is stored in the stream buffer. If we don't have enough data, zero out the rest of the stream buffer. Our sampling frequency is 48000. Let the batch size for the callback function be 960. If we play a multiple of 20 ms, this will always be a full batch. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05test: test sandbox sound driver more rigorouslyHeinrich Schuchardt
Consider unexpected values for frequency: * negative frequency * zero frequency * frequency exceeding sampling frequency As in these cases the sum of the samples is zero also check the count of the samples. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05ARM: zynq: Add missing twd timer for mini configurationsMichal Simek
The commit b7e0750d8872 ("zynq: Convert arm twd timer to DM driver") switched timer to DM but missing to add nodes to all mini configurations. Based on it missing timer end up in non functional system where any delay doesn't work. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2020fc7e3d4760e890265485b3c7e18eb1caf8be.1669724598.git.michal.simek@amd.com
2022-12-05arm64: zynqmp: Do not enable IPI by defaultMichal Simek
ZynqMP mini configurations are not using IPI driver and enabling this is adding additional ~1200 Bytes (depends on configuration). This ends up in situation that there is no enough space in OCM for relocation that's why disable this driver for all mini configurations. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c71bab3927cb71ae517d9c21f59f3d5cf0caf712.1669734580.git.michal.simek@amd.com
2022-12-05arm64: zynqmp: Do not include psu_init to U-Boot by defaultMichal Simek
The commit ed35de617013 ("Convert CONFIG_ZYNQMP_PSU_INIT_ENABLED to Kconfig") converted CONFIG_ZYNQMP_PSU_INIT_ENABLED symbol and enabled it by default which is not correct configuration. Intention of this config was to have it enabled by default for SPL and provide an option to users to also do low level initialization directly from U-Boot. That's why it is necessary to define second symbol with SPL marking in it and properly use symbols depends on usage in Makefile. Also disable ZYNQMP_PSU_INIT_ENABLED from boards which enables it by default. CONFIG_SPL_ZYNQMP_PSU_INIT_ENABLED is enabled by default when SPL is enabled. Reported-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d5fcbd66b05bf0d7ef594e66464ee23b48c5e4cc.1669969083.git.michal.simek@amd.com
2022-12-05arm64: zynqmp: dynamically mark r5 cores as usedLukas Funke
When Linux boot takes over control of the pmu (by signaling PM_INIT_FINALIZE via ipi), pmu will switch off 'unused' rpu cores. The Xilinx zynqmp fsbl prevents switching off those cores by marking rpu cores as 'used' when loading code partitions to those cores. The current u-boot SPL is missing this behaviour, which results in halting rpu cores during Linux boot. This commit mimics the xilinx zynqmp fsbl behavior by marking r5 cores as used when they are released during boot. Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com> Signed-off-by: Lukas Funke <lukas.funke-oss@weidmueller.com> Link: https://lore.kernel.org/r/20221028121547.26464-2-lukas.funke-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-12-02am335x-sancloud-bbe: Add -u-boot.dtsi filesPaul Barker
The SanCloud BBE requires the same dtb nodes to be present in the SPL as the AM335x EVM. The SanCloud BBE Lite also requires the SPI flash node and all dependencies to be present in the SPL to support SPI boot. Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2022-12-02am335x-sancloud-bbe-lite: SPI flash is JEDEC compatiblePaul Barker
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2022-12-02am335x-evm: Enable required dtb nodes in SPLPaul Barker
For successful boot when CONFIG_SPL_OF_CONTROL=y, we need to ensure that the board EEPROM on i2c0, the uart0 serial port and the relevant boot device (mmc1 or mmc2) can be accessed in the SPL. We also need to preserve the parent nodes for each required dtb node. Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2022-12-02ARM: dts: at91: sama7g5: fix signal name of pin PD8Mihai Sain
The signal name of pin PD8 with function D is A22_NANDCLE as it is defined in the datasheet. Fixes: 558378a4cd ("ARM: mach-at91: add support for new SoC sama7g5") Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
2022-11-24arm: mach-k3: fix spelling mistake "entended" -> "extended"Bryan Brattlof
the macro for the boot data location from rom is misspelled. fix it Signed-off-by: Bryan Brattlof <bb@ti.com>
2022-11-24ram: ast2600: Align the RL and WL settingDylan Hung
Use macro to represent the RL and WL setting to ensure the PHY and controller setting are aligned. Review-by: Ryan Chen <ryan_chen@aspeedtech.com> Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
2022-11-23Merge tag 'u-boot-amlogic-20221122' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-amlogic - Implement setbrg op to meson serial device - Re-add the old PHY reset binding for nanopi-k2
2022-11-22arm64: dts: meson: nanopi-k2: readd PHY reset propertiesChristian Hewitt
The sync of device-tree/bindings in 11a48a5a18c6 ("Linux 5.6-rc2") causes Ethernet to break on some GXBB boards; the PHY seems to need proper reset timing to function in u-boot and Linux. Re-add the old PHY reset binding for dwmac until we support new bindings in the PHY node. This borrows the same fix applied to the Odroid C2 board [0]. [0] https://lists.denx.de/pipermail/u-boot/2021-April/446658.html Fixes: dd5f2351e99a ("arm64: dts: meson: sync dt and bindings from v5.6-rc2") Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Link: https://lore.kernel.org/r/20221025143205.14470-1-christianshewitt@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2022-11-22arm64: versal: Add octal spi flash mini u-boot configurationAshok Reddy Soma
Add configuration file for mini u-boot configuration which runs on a smaller footprint from on chip memory(OCM). This configuration has required CONFIG's enabled to support octal spi flash and uses DCC terminal for console output. Add required dts for octal spi flash mini u-boot configuration. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20221116141155.14788-4-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-22arm64: versal: Add qspi flash mini u-boot configurationAshok Reddy Soma
Add configuration file for mini u-boot configuration which runs on a smaller footprint from on chip memory(OCM). This configuration has required CONFIG's enabled to support qspi flash and uses DCC terminal for console output. Add required dts files for qspi mini configuration. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20221116141155.14788-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-22soc: xilinx: versal-net: Add soc_xilinx_versal_net driverMichal Simek
Add soc_xilinx_versal_net driver to identify the family & revision of versal-net SoC. Add Kconfig option CONFIG_SOC_XILINX_VERSAL_NET to enable/disable this driver. To enable this driver by default, add this config to xilinx_versal_net_virt_defconfig file. This driver will be probed using platdata U_BOOT_DEVICE structure which is specified in mach-versal-net/cpu.c. Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/613d6bcffd9070f62cf348079ed16c120f8fc56f.1668612993.git.michal.simek@amd.com
2022-11-22arm64: zynqmp: Describe TI phy as ethernet-phy-id with reset on zcu106Michal Simek
zcu106 also connects ethernet phy reset via tca6416 chip as is done on other evaluation boards. That's why describe this connection to make sure that ethernet phy is reset before it's use. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/21ccd672b799b5858021f6059098a1247c311fae.1668596358.git.michal.simek@amd.com
2022-11-22xilinx: versal-net: Fix incorrect platform name in KconfigMichal Simek
Fix incorrect name used in entry description. Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-22ARM: zynq: DT: Enable all FCLKs by defaultChristian Kohn
The fclk-enable property is set to 0 which disables all FCLKs. Enable all FCLKs so they can be used as clock sources in the programmable logic. Signed-off-by: Christian Kohn <christian.kohn@xilinx.com> Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b1308dc1f14f8eb24662019f7376c959e5e763b8.1665567031.git.michal.simek@amd.com
2022-11-22xilinx: common: Remove zynq_board_read_rom_ethaddr()Venkatesh Yadav Abbarapu
Removing the zynq_board_read_rom_ethaddr() function as xlnx,eeprom is not used anymore. As all board dts to use nvmem alias instead of xlnx,eeprom. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20221017094818.17996-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-21Revert "imx: imx8: apalis: switch to binman"Stefano Babic
This reverts commit b8072ae848b73e89a73ba5b535324e4dc2793f37. Signed-off-by: Stefano Babic <sbabic@denx.de> Reported-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-11-21arm32: Fix relocation of env_addr if POSITION_INDEPENDENT=yPali Rohár
Apply commit 534f0fbd6520 ("arm64: Fix relocation of env_addr if POSITION_INDEPENDENT=y") also for 32-bit ARM. This change fixes crashing of U-Boot on ARMv7 (Omap3 / Cortex-A8) Nokia N900 phone (real HW). Note that qemu emulator of this board with same u-boot.bin binary has not triggered this crash. Crash happened after U-Boot printed following debug lines to serial console: initcall: 0001ea8c (relocated to 8fe0aa8c) Loading Environment from <NULL>... Using default environment Destroy Hash Table: 8fe25a98 table = 00000000 Create Hash Table: N=387 Signed-off-by: Pali Rohár <pali@kernel.org>
2022-11-15riscv: clarify meaning of CONFIG_SBI_V02Heinrich Schuchardt
Describe that CONFIG_SBI_V02=y does not mean SBI specification v0.2 but v0.2 or later. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Rick Chen <rick@andestech.com>
2022-11-15riscv: Fix detecting FPU support in standard extensionYu Chien Peter Lin
We should check the string until it hits underscore, in case it searches multi-letter extensions. For example, "rv64imac_xandes" will be treated as D extension support since there is a "d" in "andes", resulting illegal instruction caused by initializing FCSR. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Samuel Holland <samuel@sholland.org>
2022-11-15riscv: dts: fix the mpfs's reference clock frequencyConor Dooley
The initial devicetree for PolarFire SoC incorrectly created a fixed frequency clock in the devicetree to represent the msspll, but the msspll is not a fixed frequency clock. The actual reference clock on a board is either 125 or 100 MHz, 125 MHz in the case of the icicle kit. Swap the incorrect representation of the msspll out for the actual reference clock. Fixes: dd4ee416a6 ("riscv: dts: Add device tree for Microchip Icicle Kit") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
2022-11-14Merge tag 'u-boot-imx-20221114' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx For 2022.01 ----------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/14083 - Fix UART - moved to binman (MX8 boards) - Toradex: sync DTS with Linux - Gateworks: fixes - New boards : MSC SM2S iMX8MP
2022-11-12imx8-u-boot: Fix SPL guard optionFabio Estevam
We should guard the SPL nodes against CONFIG_SPL_BUILD to fix the following build error when the blobs are absent: binman: Fail open first container file mx8qm-ahab-container.img Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-11-10global: Migrate CONFIG_HPS* symbols to the CFG namespaceTom Rini
Migrate all of CONFIG_HPS* to the CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespaceTom Rini
Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10global: Migrate CONFIG_SYS_MPC8* symbols to the CFG_SYS namespaceTom Rini
Migrate all of COFIG_SYS_MPC* to the CFG_SYS namespace. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-11-10Convert CONFIG_SYS_NONCACHED_MEMORY to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_NONCACHED_MEMORY To do this we introduce CONFIG_SYS_HAS_NONCACHED_MEMORY as a bool to gate if we are going to have noncached_... functions available and then continue to use CONFIG_SYS_NONCACHED_MEMORY to store the size of said cache. We make this new option depend on both the architectures which implement support and the drivers which make use of it. Cc: Tom Warren <twarren@nvidia.com> Cc: Mingming lee <mingming.lee@mediatek.com> Cc: "Ying-Chun Liu (PaulLiu)" <paul.liu@linaro.org> Cc: Alban Bedel <alban.bedel@avionic-design.de> Cc: Stephen Warren <swarren@nvidia.com> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10mediatek: Include <linux/sizes.h> where neededTom Rini
These files reference SZ_ macros without including <linux/sizes.h>, correct this. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10powerpc: Migrate SYS_L3_SIZE to KconfigTom Rini
Introduce three options, one for each observed L3 cache size, and have the size select'd as needed. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10powerpc: Migrate SYS_L2_SIZE to KconfigTom Rini
Introduce two options, one for each observed L2 cache size, and have the size select'd as needed. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-10Convert CONFIG_SYS_INIT_RAM_LOCK to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_INIT_RAM_LOCK Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-11-09Convert mx8 u-boot.dtsi to CONFIG_TEXT_BASEStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Fabio Estevam <festevam@denx.de>
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