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2025-06-19arm/airoha: reset_cpu() does not take any paramsMikhail Kshevetskiy
According to include/sysreset.h the reset_cpu() function does not take any args Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Reviewed-by: Tom Rini <trini@konsulko.com>
2025-06-15arm: dts: rockchip: Fix eMMC write on RK3528Jonas Karlman
Writing to eMMC on RK3528 is affected with the same or a similar issue as on RK3588, where eMMC must init to HS200 at least once to fully work. Trying to write u-boot-rockchip.bin to eMMC fails with: => mmc write $fileaddr 40 5000 MMC write: dev # 0, block # 64, count 20480 ... mmc write failed 0 blocks written: ERROR For U-Boot to enable HS200 mode the mmc-hs200-1_8v prop must be defined in the device tree. Linux does not seem to be affected and is able to detect and use HS200 without this prop. Enable use of HS200 and fix eMMC write on RK3528 by adding the missing mmc-hs200-1_8v prop for affected boards: => mmc write $fileaddr 40 5000 MMC write: dev # 0, block # 64, count 20480 ... 20480 blocks written: OK Fixes: b112a44531cb ("board: rockchip: Add minimal generic RK3528 board") Fixes: ccbddf645310 ("board: rockchip: Add Radxa E20C") Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2025-06-13sandbox: solve undefined reference to pthread_kill symbolRaymond Mao
This patch is to solve the sandbox building error: $ make O=build-sandbox -s sandbox_defconfig $ make O=build-sandbox -s -j2 /usr/bin/ld: /tmp/u-boot.27rzOu.ltrans58.ltrans.o: undefined reference to symbol 'pthread_kill@@GLIBC_2.2.5' /usr/bin/ld: /lib/x86_64-linux-gnu/libpthread.so.0: error adding symbols: DSO missing from command line collect2: error: ld returned 1 exit status [...] Fixes: b989f9ed9fe1 ("test: lib: add initjmp() test") Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-12imx91: Drop OF_UPSTREAMPeng Fan
i.MX91 device tree still not landed in linux kernel, so drop OF_UPSTREAM and move the device tree files to arch/arm/dts Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
2025-06-10arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board supportMarek Vasut
Add Retronix R-Car V4H Sparrow Hawk board based on Renesas R-Car V4H ES3.0 (R8A779G3) SoC. This is a single-board computer with single gigabit ethernet, DSI-to-eDP bridge, DSI and two CSI2 interfaces, audio codec, two CANFD ports, micro SD card slot, USB PD supply, USB 3.0 ports, M.2 Key-M slot for NVMe SSD, debug UART and JTAG. DT is imported from Linux next commit: a719915e76f2 ("arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board support") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-06-09Merge patch series "arm: armv7: fix a bug that prevents CONFIG_BLOBLIST and ↵Tom Rini
CONFIG_POSITION_INDEPENDENT to be enabled together" Yang Xiwen <forbidden405@outlook.com> says: This patchset also enables CONFIG_POSITION_INDEPENDENT for qemu boards to avoid similar issues to happen again in the future. Link: https://lore.kernel.org/r/20250531-pie_blob_fix-v1-0-7b4a37987dbc@outlook.com
2025-06-09arm: qemu: Add imply CONFIG_POSITION_INDEPENDENTYang Xiwen
Add 'imply CONFIG_POSITION_INDEPENTDENT' for QEMU arm arch. This allows qemu arm boards to load u-boot.bin at any address. It is skipped by default when u-boot is loaded by either --bios or --kernel. To load u-boot.bin at a different address, one can use u-boot chain-loading or qemu loader device[1]. [1] https://www.qemu.org/docs/master/system/generic-loader.html Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2025-06-09arm: armv7: restore section to .text after saved_argsYang Xiwen
when CONFIG_BLOBLIST is enabled, the section is switched to .data but is not switched back to .text. It makes all the code below placed in .data section, also breaks CONFIG_POSITION_INDEPENDENT. Fix it by adding `.section .text` to switch the section back to .text. Fixes: 5103e69344d6 ("arm: armv7: save boot arguments") Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2025-06-06rockchip: rk3399-nanopi-4: Enable IO-domain driver in SPLJustin Klaassen
The NanoPi RK3399 boards support UHS-I (up to SDR104) SD cards, however using any of these 1.8v modes results in a boot failure in SPL upon soft reboot. The issue is that the "vcc_sdio" regulator is left at 1.8v on reboot and the corresponding GPIO defaults to 3.3v. This prevents the SD card from being reinitialized and read successfully. This change enables the RK8XX regulators and Rockchip IO-domain drivers in SPL, which initializes "vcc_sdio" regulator to 3.0v and configures the GPIO for the correct level on boot. Signed-off-by: Justin Klaassen <justin@tidylabs.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-06-06rockchip: rk3399-nanopi-4: Allow MMC driver to control SD regulatorsJustin Klaassen
This change removes the "regulator-always-on" property from the "vcc3v0_sd" (vmmc-supply) and "vcc_sdio" (vqmmc-supply) regulators, which otherwise prevents the MMC driver from being able to power cycle the SD card as part of the initialization procedure. It also removes the "regulator-boot-on" from the "vcc_sdio" regulator, which could theoretically damage a SD card that is already initialized in a low voltage mode. Signed-off-by: Justin Klaassen <justin@tidylabs.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-06-06rockchip: px30: Fix hard dependency to DEBUG_UART_BOARD_INITLukasz Czechowski
Because DEBUG_UART_BOARD_INIT depends on DEBUG_UART, hard dependency to DEBUG_UART_BOARD_INIT in ROCKCHIP_PX30 can cause warnings if DEBUG_UART is disabled. The DEBUG_UART_BOARD_INIT is already implied by ARCH_ROCKCHIP entry. Remove hard dependency from ROCKCHIP_PX30, so that it will be consistent with other rockchip boards. Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-06-06rockchip: px30: Weaken dependency TPL/SPL serialLukasz Czechowski
Allow to disable serial console in TPL and SPL. Weak dependency to SPL_SERIAL and TPL_SERIAL is also used in other Rockchip boards. Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-06-06arm: uniphier: Change _debug_uart_putc function to inlineLukasz Czechowski
Update the definition of _debug_uart_putc to static inline. This matches the instructions in include/debug_uart.h and provides consistency with implementations for other platforms. Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-06-04mach-k3: am62ax: enable caches for the SPL stageAnshul Dalal
board_init_f for the am62a is missing the call to spl_enable_cache which exists for all other am62 platforms (check am625_init.c & am62p5_init.c). This allows the usage of caches while loading and parsing the u-boot.img FIT resulting in ~2x speedup in the A53 SPL stage. Signed-off-by: Anshul Dalal <anshuld@ti.com>
2025-06-03Merge tag 'qcom-more-for-2025.07' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-snapdragon More Qualcomm fixes for 2025.07 * Adjust fdtfile logic to support more boards * Support linux,code variable in qcom-pmic button driver * Minor CLK API adjustments and apq8096/msm8916 fixes * vbus regulator register fixes * dragonboard410c KASLR support and other fixes
2025-06-02arm/dts/qemu-sbsa: Fix interruptPatrick Rudolph
Change the vcpumntirq in the GICv3 node from SPI to PPI. Prevents Linux from complaining: '[Firmware Bug]: CPU interface incapable of MMIO access' Fixes: 6d722894fd48 "board: emulation: Add QEMU sbsa support" Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2025-06-02mach-snapdragon: Update fdtfile logic to work for RB1 and RB2Sumit Garg
RB1 and RB2 have three root compatibles where the last one can't be used to decode fdtfile name (qcm* vs qrb*). So rather just rely on the first compatible to retrieve the SoC name. Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250505124333.12344-1-sumit.garg@kernel.org Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-02Revert "riscv: Select appropriate image type"Mayuresh Chitale
This reverts commit 027a316828528da95a77d20632370b1bc2823f0b as discussed in [1]. [1] https://lists.denx.de/pipermail/u-boot/2025-May/590841.html Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-06-02Revert "booti/bootm: riscv: Verify image arch type"Mayuresh Chitale
This reverts commit 37b0b22d8b7bbed6aa95b6daed06dcbf4a66f211 as discussed in [1]. [1] https://lists.denx.de/pipermail/u-boot/2025-May/590841.html Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-25x86: efi_loader: Ensure the SMBIOS tables are sent via EFISimon Glass
The EFI-loader code has not been fully converted to use bloblist, so relies on the SMBIOS-table address being set in global_data. Set this up in write_tables() so that the SMBIOS tables are actually available. Enable the command for x86 QEMU so that the SMBIOS tests actually run. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 83ce35d6ebb ("emulation: Use bloblist to hold tables") Reported-by: Niklas Sombert <niklas.sombert@uni-duesseldorf.de> Tested-by: Niklas Sombert <niklas.sombert@uni-duesseldorf.de> Tested-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-05-23board: total_Compute: enable bloblist for SPL handoffJayanth Dodderi Chidanand
Add bloblist support to total_comput platform for passing data from TF-A using the firmware handoff framework. Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
2025-05-22Merge tag 'u-boot-imx-master-20250522' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/26275 - Fix boot regression on imx8mn_bsh_smm_s2/s2pro. - Fix reset on imx6ulz_smm_m2. - Adjust DDR initialization on imx6ulz_smm_m2. - Fix CAAM startup error.
2025-05-21imx: spl_imx_romapi: support raw NAND sectorDario Binacchi
Commit 2a00d73d081a ("spl: mmc: Try to clean up raw-mode options") breaks the boot of the BSH SMM S2 board. As stated in the dropped comment, "Some boards use this value even though MMC is not enabled in SPL, for example imx8mn_bsh_smm_s2". Support load of the U-Boot image from raw NAND sector. Fixes: 2a00d73d081a ("spl: mmc: Try to clean up raw-mode options") Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2025-05-21ARM: dts: imx93-phycore: Migrate to OF_UPSTREAMPrimoz Fiser
Migrate to OF_UPSTREAM for phyCORE-i.MX93 since board can use upstream Linux kernel device-tree for phyBOARD-Segin-i.MX93. Signed-off-by: Primoz Fiser <primoz.fiser@norik.com> Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com> Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
2025-05-21arm: dts: imx6ulz-bsh-smm-m2: Fix reset using wdt-reboot driverMichael Trimarchi
commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") introduced a regression that 'reset' command unable to reset imx6ulz based BSH module's modules in the u-boot. BSH module's imx6, imx6ulz-bsh-smm-m2.dts Fixes: 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2025-05-21arm: dts: imx6ulz-bsh-smm-m2-u-boot: Drop soc nodeMichael Trimarchi
The node is specified on the parent architecture u-boot.dtsi file Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2025-05-21arm: imx: imx8m: soc: replace ifdef by IS_ENABLED()Dario Binacchi
Standardize on using the IS_ENABLED macro. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-21arm: imx: imx8m: soc: fix the macro nameMichael Trimarchi
The function arch_spl_mmc_get_uboot_raw_sector() was never compiled, even when the option CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION was enabled. So rename the macro SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION to CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION. Fixes: 2a00d73d081a ("spl: mmc: Try to clean up raw-mode options") Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-05-21riscv: dts: th1520: Complete clock treeYao Zi
Describe the newly-supported clock controller of TH1520 in SoC devicetree, replace dummy clocks with the controller-supplied ones and add correct clocks for GPIO controllers. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-21riscv: cpu: th1520: Select clock driverYao Zi
The clock driver is essential for TH1520 SoCs to operate. Select the driver in SoC Kconfig entry. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-21riscv: cpu: th1520: Initialize IOPMPs in SPLYao Zi
TH1520 SoC ships several IOPMPs protecting various on-chip peripherals. They must be configured before accessing the peripherals. Let's initialize them in SPL harts_early_init(). Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-21board: thead: licheepi4a: Enable SPL supportYao Zi
Adjust Kconfig and defconfig and add SPL initialization code for Lichee Pi 4A. Then enable SPL support which we've added for TH1520 SoC earlier. The board devicetree is changed to use TH1520 binman configuration to generate bootable images. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-21riscv: dts: th1520: Add binman configurationYao Zi
Add binman configuration for TH1520 SoC, whose BROM loads the image combined into SRAM and directly jumps to it. The configuration creates u-boot-with-spl.bin where the SPL code locates at the start and the DDR firmware is shipped. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-21riscv: dts: th1520: Add DRAM controllerYao Zi
Describe DRAM controller integrated in TH1520 SoC and preserve it in SPL devicetree blob. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-21riscv: dts: lichee-module-4a: Preserve memory node for SPLYao Zi
Memory node is necessary for TH1520 SPL to configure size and base address of DRAM. Let's preserve it in SPL devicetree blob. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-21riscv: dts: th1520: Preserve necessary devices for SPLYao Zi
SPL for TH1520 requires CPU and boot UART nodes to function. Preserve them in SPL devicetree blob with bootph-pre-ram property. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-21riscv: cpu: Add TH1520 CPU supportYao Zi
Introduce the SoC-specific code and corresponding Kconfig entries for TH1520 SoC. Following features are implemented for TH1520, - Cache enable/disable through customized CSR - Invalidation of customized PMP entries - DRAM driver probing for SPL Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-21riscv: lib: Split out support for T-Head cache management operationsYao Zi
Designed before a standard set of cache management operations defined in RISC-V, earlier T-Head cores like C906 and C910 provide CMO through the customized extension XTheadCMO, which has been used in the CV1800B port of U-Boot. This patch splits XTheadCMO-related code into a generic module, allowing SoCs shipping T-Head cores to share the code. Link: https://github.com/XUANTIE-RV/thead-extension-spec Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-21riscv: dts: jh7110: override syscrg assigned clock rates with defaultsE Shattow
JH7110 drivers are missing support for CPU frequency scaling, so override upstream device-tree to use default clock rates for syscrg. This override duplicates a portion of jh7110-common-u-boot.dtsi file planned for removal. Signed-off-by: E Shattow <e@freeshell.de> Reviewed-by: Leo Liang <ycliang@andestech.com>
2025-05-21riscv: dts: jh7110: remove redundant parent nodesE Shattow
- use upstream alias name for cpu and timer nodes - remove bootph-pre-ram hint from parent nodes - drop S7 cpu core "okay" status Signed-off-by: E Shattow <e@freeshell.de> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-21riscv: starfive: jh7110: move uart0 clock frequency to config headerE Shattow
Move unnecessary clock frequency assignment out of device-tree and into the board config header so that the ns16550 serial driver can successfully init during SPL after failing to resolve the parent clock from upstream dts. The serial driver will then resolve clock frequency from device-tree node parent clock at init during Main app as it is expected by upstream. Signed-off-by: E Shattow <e@freeshell.de> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-21riscv: insn-def.h: Fix header guardMayuresh Chitale
Fix the erroneous header guard for insn-def.h to reflect the correct header name. Fixes: bfc8ca3f7f6 ("riscv: Add support for defining instructions") Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-21riscv: Access gd with inline assembly when building with LTO or ClangYao Zi
Similar to AArch64's case, Clang may wrongly fold accesses to gd pointer which is defined with register qualifier into constants, breaking various components. This patch defines gd as a macro when building with Clang or LTO, which expands to get_gd() that accesses gp pointer in assembly, making RISC-V ports function properly and preparing for introduction of LTO in the future. Board initialization code is also adapted for non-assignable gd. Reported-by: Nathaniel Hourt <I@nathaniel.land> Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-21riscv: dts: binman.dtsi: Drop filename property for proper U-BootYao Zi
Drop filename property for proper U-Boot entry since binman takes "u-boot-nodtb.bin" as the default filename for u-boot-nodtb entries. This follows efe9c12322b ("riscv: dts: binman.dtsi: Switch to u-boot-nodtb entry for proper U-Boot") to clean binman.dtsi up. Signed-off-by: Yao Zi <ziyao@disroot.org> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-21booti/bootm: riscv: Verify image arch typeMayuresh Chitale
Unlike ARM and X86, booting 32-bit images on 64-bit CPUs is currently not supported for Risc-V. Hence, for bootm, disallow booting a FIT or a legacy image that was built for an arch type which is different than the current arch and for booti, set the arch type to be the same as the current arch. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2025-05-21riscv: Select appropriate image typeMayuresh Chitale
Select between the 32-bit or 64-bit arch type for the image headers depending on how the build is configured. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-05-16arm: kirkwood: Convert to DM_SERIAL for Synology DS109 boardTony Dinh
Enable DM_SERIAL for Marvell Kirkwood Synology DS109. Note that this patch depends on: https://patchwork.ozlabs.org/project/uboot/patch/20250505220853.23679-1-mibodhi@gmail.com/ Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2025-05-16arm: kirkwood: Convert to DM_SERIAL for Kirkwood boardsTony Dinh
Enable DM_SERIAL for Marvell Kirkwood boards that have not been converted. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Stefan Roese <sr@denx.de>
2025-05-12ARM: dts: imx: Add flexspi (fspi) to imxrt1170 and it's evk.Jonathan Currier
Signed-off-by: Jonathan Currier <dullfire@yahoo.com>
2025-05-09x86: Correct usage of FSP_VERSION2Tom Rini
As the code is today, we get a warning about "select" statements on "choice" options not doing anything. In this case, we move to having a "default FSP_VERSION2 if INTEL_APOLLOLAKE" in order to get the desired outcome. Signed-off-by: Tom Rini <trini@konsulko.com>