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2021-06-18arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPLGrzegorz Szymaszek
Enable the SDMMC2 device tree node, as well as the pins it uses, in U-Boot SPL. Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR modeGrzegorz Szymaszek
Enable the SDMMC2 eMMC high-speed DDR mode as it is done in the corresponding Linux kernel device tree. Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supplyGrzegorz Szymaszek
Set the SDMMC2 VQMMC supply to vdd (buck3). Note that in the corresponding Linux kernel device tree, the supply is set to v3v3 (buck4), which is wrong. Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanesGrzegorz Szymaszek
Add the “sdmmc2_d47_pins_d” pins to the SDMMC2 pinctrls. Increase the bus width from four to eight. Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 propertiesGrzegorz Szymaszek
The SDMMC2 interface hosts an eMMC. Replace the interface properties that would only apply to SD cards—“broken-cd” and “disable-wp”—with relevant ones: “non-removable”, “no-sd” and “no-sdio”. Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-17Merge tag 'u-boot-atmel-2021.10-a' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-atmel into next First set of u-boot-atmel features for the 2021.10 cycle: This feature set converts the boards pm9261 and pm9263 Ethernet support to DM; enables hash command for all SAM boards; fixes the NAND pmecc bit-flips correction; adds Falcon boot for sama5d3_xplained board; and other minor adjustments.
2021-06-17k210: dts: Set PLL1 to the same rate as PLL0Sean Anderson
Linux has had some stability issues when using AISRAM with a different frequency from SRAM. Mirror their change here now that we relocate into AISRAM. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-06-11ARM: dts: k3: Add cfg register space for ringacc and udmapVignesh Raghavendra
R5 SPL needs access to cfg space of Rings and UDMAP, therefore add RING CFG, TCHAN CFG and RCHAN CFG address ranges. Note that these registers are present within respective IPs but are not populated in Linux DT nodes (as they are configured via TISCI APIs) and hence are added to -u-boot.dtsi for now. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210607141753.28796-6-vigneshr@ti.com
2021-06-11ARM: dts: j72xx-r5-common-proc-board: Add DM firmware nodeVignesh Raghavendra
Add DM firmware node which will provide DM services during R5 SPL stage. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210607141753.28796-5-vigneshr@ti.com
2021-06-11arm: dts: k3-j72xx: correct MCU timer1 frequencyTero Kristo
MCU timer1 is used as the tick timer for MCU R5 SPL, and the clock-frequency defined in DT appears to be incorrect at the moment. Actual clock source for the timer is MCU_SYSCLK0 / 4 which is 250MHz. Earlier setup of 25MHz went unnoticed, as there was a separate issue with omap-timer, which caused an error to the clock by a factor of 8 with j7 devices. This problem surfaced once the omap-timer was fixed. Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11arm: mach-k3: j721e_init: Force early probe of clk-k3 driverDave Gerlach
Force the clk-k3 driver to probe early during R5 SPL boot to ensure the default system clock configuration is completed. Many other drivers assume a default state of the clock tree and it is currently possible for them to probe before clk-k3 depending on the exact system configuration. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Reported-by: Keerthy <j-keerthy@ti.com> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11arm: mach-k3: sysfw-loader: pass boardcfg to sciserverTero Kristo
Copy the contents of the board config loaded from sysfw.itb into an EXTBOOT shared memory buffer that gets passed to sciserver. This only needs to be done if EXTBOOT area has not been populated by ROM code yet. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11arm: mach-k3: common: Drop main r5 startDave Gerlach
Only start-up the non-linux remote cores if we are running in legacy boot mode. HSM rearch is not yet supporting this. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11arm: mach-k3: do board config for PM only if supportedTero Kristo
If the raw PM support is built in, we are operating in the split firmware approach mode where PM support is not available. In this case, skip the board config for this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11arm: mach-k3: add support for detecting firmware images from FITTero Kristo
Add callback routines for parsing the firmware info from FIT image, and use the data to boot up ATF and the MCU R5 firmware. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11arm: mach-k3: Add platform data for j721e and j7200Dave Gerlach
Add platform clock and powerdomain data for J721e and J7200. This data is used by the corresponding drivers to register all the required device clocks and powerdomains. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11tools: k3_fit_atf: add DM binary to the FIT imageTero Kristo
Add DM (device manager) firmware image to the fit image that is loaded by R5 SPL. This is needed with the HSM rearch where the firmware allocation has been changed slightly. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11common: fit: Update board_fit_image_post_process() to pass fit and node_offsetLokesh Vutla
board_fit_image_post_process() passes only start and size of the image, but type of the image is not passed. So pass fit and node_offset, to derive information about image to be processed. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11arm: mach-k3: introduce new config option for sysfw splitTero Kristo
On J7 family of SoCs (J721E and J7200), sysfw is being split to be run under two cores, TIFS portion on DMSC core, and DM firmware under MCU R5. As MCU R5 is also used to run one phase of the bootloader, we must prevent access from here towards sysfw services. To support this, add new config option which can be used to detect presence of RM/PM sysfw services. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-09arm: dts: sync rtc node of am335x boards with Linux 5.9-rc7Dario Binacchi
There have been some changes to the am335x-<board> DTs related to the rtc node, so let's re-syncs them with Linux. Signed-off-by: Dario Binacchi <dariobin@libero.it> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210602203805.11494-7-dariobin@libero.it
2021-06-09arm: dts: k3-am64-main: Update the location of ATF in SRAM and increase its ↵Aswath Govindraju
max size Due to a limitation for USB DFU boot mode, SPL load address has to be less than or equal to 0x70001000. So, load address of SPL and ATF have been moved to 0x70000000 and 0x701a0000 respectively. Also, the maximum size of ATF has been increased to 0x1c000 [1]. Therefore, update ATF's location and maximum size accordingly in the device tree file. [1] - https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/commit/?id=2fb5312f61a7de8b7a70e1639199c4f14a10b6f9 Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-10-a-govindraju@ti.com
2021-06-09configs: am64x_evm_*_defconfig: Rearrange the components in SRAM to satisfy ↵Aswath Govindraju
the limitations for USB DFU boot mode For USB DFU boot mode there is a limitation on the load address of boot images that they have to be less than 0x70001000. Therefore, move the SPL_TEXT_BASE address to 0x70000000. Currently ATF is being loaded at 0x70000000, if the SPL is being loaded at 0x70000000 then ATF would overwrite SPL image when loaded. Therefore, move the location of ATF to a latter location in SRAM, past the SPL image. Also rearrange the EEPROM and BSS data on top of ATF. Given below is the placement of various data sections in SRAM ┌──────────────────────────────────────┐0x70000000 │ │ │ │ │ │ │ SPL IMAGE (Max size 1.5 MB) │ │ │ │ │ │ │ ├──────────────────────────────────────┤0x7017FFFF │ │ │ SPL STACK │ │ │ ├──────────────────────────────────────┤0x70192727 │ GLOBAL DATA(216 B) │ ├──────────────────────────────────────┤0x701927FF │ │ │ INITIAL HEAP (32 KB) │ │ │ ├──────────────────────────────────────┤0x7019A7FF │ │ │ BSS (20 KB) │ ├──────────────────────────────────────┤0x7019F7FF │ EEPROM DATA (2 KB) │ ├──────────────────────────────────────┤0x7019FFFF │ │ │ │ │ ATF (123 KB) │ │ │ │ │ ├──────────────────────────────────────┤0x701BEBFB │ BOOT PARAMETER INDEX TABLE (5124 B)│ ├──────────────────────────────────────┤0x701BFFFF │ │ │SYSFW FIREWALLED DUE TO A BUG (128 KB)│ │ │ ├──────────────────────────────────────┤0x701DFFFF │ │ │ DMSC CODE AREA (128 KB) │ │ │ └──────────────────────────────────────┘0x701FFFFF Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-9-a-govindraju@ti.com
2021-06-09arm: dts: k3-am642-evm-u-boot: Add U-Boot tags and fix the dr_mode to ↵Aswath Govindraju
peripheral for USB subsystem Add U-Boot tags and fix the dr_mode as peripheral in U-Boot to support DFU by default. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-8-a-govindraju@ti.com
2021-06-09arm: dts: k3-am642-*-evm: Add USB supportAswath Govindraju
AM64 EVM board has a micro USB 2.0 AB connector and the USB0_VBUS is connected with a resistor divider in between. USB0_DRVVBUS pin is muxed between USB0_DRVVBUS and GPIO1_79 signals. Add the corresponding properties and set the pinmux mode for USB subsystem in the evm dts file. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-7-a-govindraju@ti.com
2021-06-09arm: dts: k3-am64-main: Add USB DT nodesAswath Govindraju
Add DT node for the single USB subsystem in main dtsi file. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-6-a-govindraju@ti.com
2021-06-09arm: mach-k3: am642_init: Do USB fixups to facilitate host and device boot modesAswath Govindraju
U-Boot either supports USB host or device mode for a node at a time in the device tree nodes. To support both host and dfu bootmodes, dr_mode is set to "peripheral" by default and then fixed based on the mode selected by the boot mode config dip switches on the board. This needs to happen before the cdns3 generic layer binds the usb device to a host or a device driver. Therefore, use fdtdec_setup_board() implementation to fixup the device tree property. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-4-a-govindraju@ti.com
2021-06-09arm: mach-k3: am642_init: Add support for USB boot modeAswath Govindraju
Add support for identifying USB host and device boot modes Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-3-a-govindraju@ti.com
2021-06-09tools: k3_fit_atf: Add support for providing ATF load address using a ↵Aswath Govindraju
Kconfig symbol Add support for providing ATF load address with a Kconfig symbol. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-2-a-govindraju@ti.com
2021-06-09arm: dts: k3-j7200: ddr: Update to 0.5.0 version of DDR for LPDDR 2666MTsKevin Scholz
Update the ddr settings to use the DDR reg config tool rev 0.5.0. This enables 2666MTs LPDDR configuration on J7200. Signed-off-by: Kevin Scholz <k-scholz@ti.com> Signed-off-by: Praneeth Bajjuri <praneeth@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20210603131453.11414-1-praneeth@ti.com
2021-06-07stm32mp: don't map the reserved region with no-map propertyPatrick Delaunay
No more map the reserved region with "no-map" property by marking the corresponding TLB entries with invalid entry (=0) to avoid speculative access. The device tree parsing done in lmb_init_and_reserve() takes a long time when it is executed without data cache, so it is called in enable_caches() before to disable it. This patch fixes an issue where predictive read access on secure DDR OP-TEE reserved area are caught by firewall. Series-cc: marex Series-cc: pch Series-cc: marek.bykowski@gmail.com Series-cc: Ard Biesheuvel <ardb@kernel.org> Series-cc: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-06-07stm32mp: Increase the reserved memory in board_get_usable_ram_topPatrick Delaunay
Add 8M for the U-Boot reserved memory (display, fdt, gd, ...) mapped cacheable before relocation. Without this patch the device tree, located before the MALLOC area is not tagged cacheable just after relocation, before mmu reconfiguration. This patch reduces the duration for device tree parsing in lmb_init_and_reserve. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-06-07Revert "sama5d3: Fix Galois Field Table offsets"Tudor Ambarus
This reverts commit 786f888b743e9b83c9095cb9b5548ebe2e29afc5. Looks like the datasheet at https://ww1.microchip.com/downloads/en/DeviceDoc/SAMA5D3-Series-Data-sheet-DS60001609b.pdf is wrong, and the testing was poorly done, because the PMECC did not raise any error, but also didn't correct any bitflips. Restoring the offsets as they were before, makes the PMECC on sama5d3x capable of correcting bitflips. Fixes: 786f888b74 ("sama5d3: Fix Galois Field Table offsets") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-06-05sandbox: correct determination of the text baseHeinrich Schuchardt
os_find_text_base() assumes that first line of /proc/self/maps holds information about the text. Hence we must call the function before calling os_malloc() which calls mmap(0x10000000,). Failure to do so has led to incorrect values for pc_reloc when an exception was reported => exception undefined Illegal instruction pc = 0x5628d82e9d3c, pc_reloc = 0x5628c82e9d3c as well as incorrect output of the bdinfo command => bdinfo relocaddr = 0x0000000007858000 reloc off = 0x0000000010000000 Fixes: b308d9fd18fa ("sandbox: Avoid using malloc() for system state") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-04arm: a37xx: pci: Increase PCIe MEM size from 16 MiB to 127 MiBPali Rohár
For some configurations with more PCIe cards and PCIe bridges, 16 MiB of PCIe MEM space may not be enough. Since TF-A already allocates a 128 MiB CPU window for PCIe, and since IO port space is only 64 KiB in total, use all the remaining space (64 + 32 + 16 + 8 + 4 + 2 + 1 = 127 MiB) for PCIe MEM. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() functionPali Rohár
Current version of this function uses a lot of incorrect assumptions about the `ranges` DT property: * parent(#address-cells) == 2 * #size-cells == 2 * number of entries == 2 * address size of first entry == 0x1000000 * second child address entry == base + 0x1000000 Trying to increase PCIe MEM space to more than 16 MiB leads to an overlap with PCIe IO space, and trying to define additional MEM space (as a third entry in the `ranges` DT property) causes U-Boot to crash when booting the kernel. ## Flattened Device Tree blob at 04f00000 Booting using the fdt blob at 0x4f00000 Loading Device Tree to 000000001fb01000, end 000000001fb08f12 ... OK ERROR: board-specific fdt fixup failed: <unknown error> - must RESET the board to recover. Fix a3700_fdt_fix_pcie_regions() to properly parse and update all addresses in the `ranges` property according to https://elinux.org/Device_Tree_Usage#PCI_Address_Translation Now it is possible to increase PCIe MEM space from 16 MiB to maximal value of 127 MiB. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Fixes: cb2ddb291ee6 ("arm64: mvebu: a37xx: add device-tree fixer for PCIe regions") Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04arm: a37xx: pci: Find PCIe controller node by compatible instead of pathPali Rohár
Find PCIe DT node by compatible string instead of retrieving it by using hardcoded DT path. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04arm: a37xx: pci: Fix DT compatible string to Linux' DT compatiblePali Rohár
Change DT compatible string for A3700 PCIe from 'marvell,armada-37xx-pcie' to 'marvell,armada-3700-pcie' to make U-Boot A3700 PCIe DT node compatible with Linux' DT node. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-05-31Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini
- SiFive FU740 and Unmatched support
2021-05-31riscv: cpu: fu740: clear feature disable CSRGreen Wan
Clear feature disable CSR to turn on all features of hart. The detail is specified at section, 'SiFive Feature Disable CSR', in user manual https://sifive.cdn.prismic.io/sifive/aee0dd4c-d156-496e-a6c4-db0cf54bbe68_sifive_U74MC_rtl_full_20G1.03.00_manual.pdf Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-31board: sifive: add HiFive Unmatched board supportGreen Wan
Add defconfig and board support for HiFive Unmatched. Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-31riscv: dts: add SiFive Unmatched board supportGreen Wan
Add dts files for SiFive Unmatched board. Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-31riscv: dts: add fu740 supportGreen Wan
Add dts support for fu740. The HiFive Unmatched support is based on fu740 cpu and drivers in following patch set. Signed-off-by: Green Wan <green.wan@sifive.com> [greentime.hu: set fu740 speed to 1.2GHz] Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-31drivers: clk: add fu740 supportGreen Wan
Add fu740 support. One abstract layer is added for supporting multiple chips such as fu540 and fu740. Signed-off-by: Green Wan <green.wan@sifive.com>
2021-05-31riscv: cpu: fu740: Add support for cpu fu740Green Wan
Add SiFive fu740 cpu to support RISC-V arch Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-31sunxi: Bring back SD card as MMC device 0Andre Przywara
Commit 2243d19e5618 ("mmc: mmc-uclass: Use dev_seq() to read aliases node's index") now actually enforces U-Boot's device enumeration policy, where explicitly named devices come first, then any other non-named devices follow, without filling gaps. For quite a while we have had an "mmc1 = &mmc2;" alias in our sunxi-u-boot.dtsi, which now leads to the problem that the SD card (which was always mmc device 0) now gets to be number 2. This breaks quite some boot scripts, including our own distro boot commands, and some other features looking at $mmc_bootdev, also fastboot. Just add an explicit mmc0 alias in the very same file to fix this and restore the old behaviour. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reported-by: Samuel Holland <samuel@sholland.org> Tested-by: Simon Baatz <gmbnomis@gmail.com>
2021-05-28arm: dts: stm32mp157c-odyssey-som: enable the RNG1Grzegorz Szymaszek
Enable the true random number generator. It can be used, for example, to generate partition UUIDs when partitioning with the gpt command. The generator is already enabled in the device trees of several other STM32MP1‐based boards, like DKx or DHCOM. Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-05-27Merge tag 'ti-v2021.07-rc4' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-ti - Fix reset for AM64 platforms - Enable networking PHY driver for AM64 - Fix default R5F cluster setting in J7
2021-05-27arm: dts: k3-am642-sk: Add sysreset controller nodeSuman Anna
The AM64x SoC uses a central Device Management and Security Controller (DMSC) processor that manages all the low-level device controls including the system-wide SoC reset. The system-wide reset is managed through the system reset driver. Add a sysreset controller node as a child of the dmsc node to enable the "reset" command from U-Boot prompt for the K3 AM642 SK. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-27arm: dts: k3-am642-evm: Add sysreset controller nodeSuman Anna
The AM64x SoC uses a central Device Management and Security Controller (DMSC) processor that manages all the low-level device controls including the system-wide SoC reset. The system-wide reset is managed through the system reset driver. Add a sysreset controller node as a child of the dmsc node to enable the "reset" command from U-Boot prompt for the K3 AM642 EVM. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-27arm: dts: k3-j721e: Fix up MAIN R5FSS cluster mode back to Split-modeSuman Anna
The default U-Boot environment variables and design are all set up for both the MAIN R5FSS clusters to be in Split-mode. This is the setting in v2021.01 U-Boot and the dt nodes are synched with the kernel binding property names in commit 468ec2f3ef8f ("remoteproc: k3_r5: Sync to upstreamed kernel DT property names") merged in v2021.04-rc2. The modes for both the clusters got switched back to LockStep mode by mistake in commit 70e167495ab2 ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot") also in v2021.04-rc2. This throws the following warning messages when early-booting the cores using default env variables, k3_r5f_rproc r5f at 5d00000: Invalid op: Trying to start secondary core 7 in lockstep mode Load Remote Processor 3 with data at addr=0x82000000 98484 bytes: Failed! k3_r5f_rproc r5f at 5f00000: Invalid op: Trying to start secondary core 9 in lockstep mode Load Remote Processor 5 with data at addr=0x82000000 98484 bytes: Failed! Fix this by switching back both the clusters to the expected Split-mode. Make this mode change in the u-boot specific dtsi file to avoid such sync overrides in the future until the kernel dts is also switched to Split-mode by default. Fixes: 70e167495ab2 ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot") Reported-by: Minas Hambardzumyan <minas@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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