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2021-06-09arm: dts: sync rtc node of am335x boards with Linux 5.9-rc7Dario Binacchi
There have been some changes to the am335x-<board> DTs related to the rtc node, so let's re-syncs them with Linux. Signed-off-by: Dario Binacchi <dariobin@libero.it> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210602203805.11494-7-dariobin@libero.it
2021-06-09arm: dts: k3-am64-main: Update the location of ATF in SRAM and increase its ↵Aswath Govindraju
max size Due to a limitation for USB DFU boot mode, SPL load address has to be less than or equal to 0x70001000. So, load address of SPL and ATF have been moved to 0x70000000 and 0x701a0000 respectively. Also, the maximum size of ATF has been increased to 0x1c000 [1]. Therefore, update ATF's location and maximum size accordingly in the device tree file. [1] - https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/commit/?id=2fb5312f61a7de8b7a70e1639199c4f14a10b6f9 Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-10-a-govindraju@ti.com
2021-06-09configs: am64x_evm_*_defconfig: Rearrange the components in SRAM to satisfy ↵Aswath Govindraju
the limitations for USB DFU boot mode For USB DFU boot mode there is a limitation on the load address of boot images that they have to be less than 0x70001000. Therefore, move the SPL_TEXT_BASE address to 0x70000000. Currently ATF is being loaded at 0x70000000, if the SPL is being loaded at 0x70000000 then ATF would overwrite SPL image when loaded. Therefore, move the location of ATF to a latter location in SRAM, past the SPL image. Also rearrange the EEPROM and BSS data on top of ATF. Given below is the placement of various data sections in SRAM ┌──────────────────────────────────────┐0x70000000 │ │ │ │ │ │ │ SPL IMAGE (Max size 1.5 MB) │ │ │ │ │ │ │ ├──────────────────────────────────────┤0x7017FFFF │ │ │ SPL STACK │ │ │ ├──────────────────────────────────────┤0x70192727 │ GLOBAL DATA(216 B) │ ├──────────────────────────────────────┤0x701927FF │ │ │ INITIAL HEAP (32 KB) │ │ │ ├──────────────────────────────────────┤0x7019A7FF │ │ │ BSS (20 KB) │ ├──────────────────────────────────────┤0x7019F7FF │ EEPROM DATA (2 KB) │ ├──────────────────────────────────────┤0x7019FFFF │ │ │ │ │ ATF (123 KB) │ │ │ │ │ ├──────────────────────────────────────┤0x701BEBFB │ BOOT PARAMETER INDEX TABLE (5124 B)│ ├──────────────────────────────────────┤0x701BFFFF │ │ │SYSFW FIREWALLED DUE TO A BUG (128 KB)│ │ │ ├──────────────────────────────────────┤0x701DFFFF │ │ │ DMSC CODE AREA (128 KB) │ │ │ └──────────────────────────────────────┘0x701FFFFF Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-9-a-govindraju@ti.com
2021-06-09arm: dts: k3-am642-evm-u-boot: Add U-Boot tags and fix the dr_mode to ↵Aswath Govindraju
peripheral for USB subsystem Add U-Boot tags and fix the dr_mode as peripheral in U-Boot to support DFU by default. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-8-a-govindraju@ti.com
2021-06-09arm: dts: k3-am642-*-evm: Add USB supportAswath Govindraju
AM64 EVM board has a micro USB 2.0 AB connector and the USB0_VBUS is connected with a resistor divider in between. USB0_DRVVBUS pin is muxed between USB0_DRVVBUS and GPIO1_79 signals. Add the corresponding properties and set the pinmux mode for USB subsystem in the evm dts file. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-7-a-govindraju@ti.com
2021-06-09arm: dts: k3-am64-main: Add USB DT nodesAswath Govindraju
Add DT node for the single USB subsystem in main dtsi file. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-6-a-govindraju@ti.com
2021-06-09arm: mach-k3: am642_init: Do USB fixups to facilitate host and device boot modesAswath Govindraju
U-Boot either supports USB host or device mode for a node at a time in the device tree nodes. To support both host and dfu bootmodes, dr_mode is set to "peripheral" by default and then fixed based on the mode selected by the boot mode config dip switches on the board. This needs to happen before the cdns3 generic layer binds the usb device to a host or a device driver. Therefore, use fdtdec_setup_board() implementation to fixup the device tree property. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-4-a-govindraju@ti.com
2021-06-09arm: mach-k3: am642_init: Add support for USB boot modeAswath Govindraju
Add support for identifying USB host and device boot modes Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-3-a-govindraju@ti.com
2021-06-09tools: k3_fit_atf: Add support for providing ATF load address using a ↵Aswath Govindraju
Kconfig symbol Add support for providing ATF load address with a Kconfig symbol. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20210604163043.12811-2-a-govindraju@ti.com
2021-06-09arm: dts: k3-j7200: ddr: Update to 0.5.0 version of DDR for LPDDR 2666MTsKevin Scholz
Update the ddr settings to use the DDR reg config tool rev 0.5.0. This enables 2666MTs LPDDR configuration on J7200. Signed-off-by: Kevin Scholz <k-scholz@ti.com> Signed-off-by: Praneeth Bajjuri <praneeth@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Suman Anna <s-anna@ti.com> Link: https://lore.kernel.org/r/20210603131453.11414-1-praneeth@ti.com
2021-06-09mx7d: Add Storopack's SMEGW01 boardFabio Estevam
Add support for Storopack's SMEGW01 board, which is an IoT gateway based on the i.MX7D SoC. Based on the original U-Boot work done by Phytec. Signed-off-by: Fabio Estevam <festevam@denx.de>
2021-06-09imx: Add SeeedStudio NPI-IMX6ULL SupportNavin Sankar Velliangiri
CPU: Freescale i.MX6ULL rev1.1 792 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 49C Reset cause: POR Model: Seeed NPi iMX6ULL Dev Board with NAND Board: Seeed NPi i.MX6ULL Dev Board DRAM: 512 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial@2020000 Out: serial@2020000 Err: serial@2020000 Net: FEC0 Working: - Eth0 - MMC/SD - NAND - UART 1 - USB host Signed-off-by: Navin Sankar Velliangiri <navin@linumiz.com> Note: Changes in v2: * removed unnecessary space in imx6ull-seeed-npi-imx6ull-dev-board.dts file. * Used SZ_2M for CONFIG_SYS_MALLOC_LEN size allocation.
2021-06-09imx: support for conga-QMX8 boardOliver Graute
Add i.MX8QM qmx8 congatec board support U-Boot 2021.07-rc3-00528-gc9a966d9dd (May 31 2021 - 15:21:25 +0200) CPU: NXP i.MX8QM RevB A53 at 1200 MHz Model: Congatec QMX8 Qseven series Board: conga-QMX8 Build: SCFW 494c97f3, SECO-FW d63fdb21, ATF 09c5cc9 Boot: SD2 DRAM: 6 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial@5a060000 Out: serial@5a060000 Err: serial@5a060000 switch to partitions #0, OK mmc2 is current device Net: Error: ethernet@5b040000 address not set. No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com>
2021-06-09arm: imx: imx8mm: correct unrecognized fracpll frequencyAndrey Zhizhikin
Frequency requested by ddrphy_init_set_dfi_clk from fracpll uses MHZ() macro, which expands the value provided to the Hz range without taking into account the precise Hz setting. This causes the frequency of 266 MHz not ot be found in the imx8mm_fracpll_tbl, since it is entered there with a precise Hz value. This in turn causes the boot hang in SPL, as proper DDR fracpll frequency cannot be determined. Correct the value in imx8mm_fracpll_tbl to match the one expanded by MHZ(266) macro, rounding it down to MHz range only. Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ye Li <ye.li@nxp.com> Fixes: 825ab6b406 ("driver: ddr: Refine the ddr init driver on imx8m") Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-06-09imx: ventana: enable dm support for PCI and FEC ethernetTim Harvey
Enable driver model support for FEC ethernet which allows us to remove the iomux and board_eth_init function. Replace the toggling of the ethernet phy reset with dt configuration. Enable driver model support for PCI which allows us to remove the eth1000_initialize() call. Additionally enable PCI_INIT_R to scan for PCI devices on init such as the e1000 that is present on the GW552x. Convert board_pci_fixup to use dm callback and remove pcidisable env variable which is not supported for DM_PCI and thus leave PCI always enabled during init. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-06-09arm: imx: imx8mm: clock: make debug output more descriptiveAndrey Zhizhikin
Clock initialization functionality has ambitious debug messages, which are printed out when failures are triggered during execution: - Separate frequency table lookup functions have the the same output that makes it impossible to understand which function failed and produced the output - PLL decoding routine has a generic debug statement printed, which does not state the actual value failed to be found Extend the output for both cases with prefixing table lookup functions output with function name, and report the failed value in PLL decoding routine. Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-06-09Add EV-iMX280-NANO-X-MB boardOleh Kravchenko
A simple prototyping board with one microSD port, one Ethernet port, 2 USB ports, I2C, SPI, GPIO, and UART interfaces. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Stefano Babic <sbabic@denx.de>
2021-06-09Add out4.ru O4-iMX-NANO boardOleh Kravchenko
Board designed for quick prototyping and has one microSD port, 2 Ethernet ports, 2 USB ports, I2C, SPI, CAN, RS-485, GPIO, UART interfaces, and 2 RGB LEDs. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Stefano Babic <sbabic@denx.de>
2021-06-09ARM: dts: imxrt1050-evk: enable usbotg1 node as hostGiulio Benetti
Enable usbotg1 port node as host usb. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: add usbotg1, usbphy1 and usbmisc nodesGiulio Benetti
Usb is now supported so add all required nodes for it in imxrt1050. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09usb: ehci-mx6: add support for i.MXRTGiulio Benetti
Add support for usb1 and usb2 present on i.IMXRT. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: IMXRT: introduce is_imxrt*() macros and get_cpu_rev()Giulio Benetti
We need those macros to instruct drivers on how to behave for SoC specific quirks, so let's add it as done for other i.MX SoCs. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020: add gpio5 node to this SoCGiulio Benetti
i.MXRT1020 supports gpio5, so let's add a node for it. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk: move all u-boot, dm-spl to ↵Giulio Benetti
imxrt1020-evk-u-boot.dtsi file At the moment a lot of u-boot,dm-spl properties are present in board .dts file but this is not correct since u-boot,dm-spl property is u-boot specific and must be listed into the separate imrt1020-evk-u-boot.dtsi file. So let's move every u-boot,dm-spl property present in imxrt1020-evk.dts to imxrt1020-evk-u-boot.dtsi file. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: move all u-boot, dm-spl to ↵Giulio Benetti
imxrt1050-evk-u-boot.dtsi file At the moment a lot of u-boot,dm-spl properties are present in board .dts file but this is not correct since u-boot,dm-spl property is u-boot specific and must be listed into the separate imrt1050-evk-u-boot.dtsi file. So let's move every u-boot,dm-spl property present in imxrt1050-evk.dts to imxrt1050-evk-u-boot.dtsi file. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: remove u-boot,dm-splGiulio Benetti
We don't need lcdif to be enable in SPL, so let's remove u-boot,dm-spl. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: set lcdif clocks according to mxsfb driverGiulio Benetti
Lcdif needs both "pix" and "axi" clocks to be enabled so let's add them to lcdif node. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: move lcdif assigned clock to dtsiGiulio Benetti
Since we assume pll5 is the default lcdif clock source let's move assigned-clocks(-parents) properties to .dtsi file. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: add device_type = "memory" to memory nodeGiulio Benetti
Now device_type = "memory" is mandatory to allow u-boot to read memory node, so let's add it to memory node. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk-u-boot: make gpt1 present for SPLGiulio Benetti
Timer needs to be already enabled in spl, so let's add its node to spl dtb. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: set gpt1 as tick-timer for u-bootGiulio Benetti
Let's set gpt1 as u-boot timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: enable gpt1 timerGiulio Benetti
Enable gpt1 timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: add gpt1 nodeGiulio Benetti
Add gpt1 node for using it as timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: add node label to oscGiulio Benetti
Let's add node label to osc to be used as clock source for other nodes. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk: add device_type = "memory" to memory nodeGiulio Benetti
Now device_type = "memory" is mandatory to allow u-boot to read memory node, so let's add it to memory node. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk-u-boot: make gpt1 present for SPLGiulio Benetti
Timer needs to be already enabled in spl, so let's add its node to spl dtb. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk: set gpt1 as tick-timer for u-bootGiulio Benetti
Let's set gpt1 as u-boot timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk: enable gpt1 timerGiulio Benetti
Enable gpt1 timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020: add gpt1 nodeGiulio Benetti
Add gpt1 node for using it as timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020: add node label to oscGiulio Benetti
Let's add node label to osc to be used as clock source for other nodes. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09arm: imxrt: soc: make mpu regions genericGiulio Benetti
This mpu handling works for every i.MXRT SoC that we have, so let's generalize imxrt1050_region_config to imxrt_region_config. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-07stm32mp: don't map the reserved region with no-map propertyPatrick Delaunay
No more map the reserved region with "no-map" property by marking the corresponding TLB entries with invalid entry (=0) to avoid speculative access. The device tree parsing done in lmb_init_and_reserve() takes a long time when it is executed without data cache, so it is called in enable_caches() before to disable it. This patch fixes an issue where predictive read access on secure DDR OP-TEE reserved area are caught by firewall. Series-cc: marex Series-cc: pch Series-cc: marek.bykowski@gmail.com Series-cc: Ard Biesheuvel <ardb@kernel.org> Series-cc: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-06-07stm32mp: Increase the reserved memory in board_get_usable_ram_topPatrick Delaunay
Add 8M for the U-Boot reserved memory (display, fdt, gd, ...) mapped cacheable before relocation. Without this patch the device tree, located before the MALLOC area is not tagged cacheable just after relocation, before mmu reconfiguration. This patch reduces the duration for device tree parsing in lmb_init_and_reserve. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-06-07Revert "sama5d3: Fix Galois Field Table offsets"Tudor Ambarus
This reverts commit 786f888b743e9b83c9095cb9b5548ebe2e29afc5. Looks like the datasheet at https://ww1.microchip.com/downloads/en/DeviceDoc/SAMA5D3-Series-Data-sheet-DS60001609b.pdf is wrong, and the testing was poorly done, because the PMECC did not raise any error, but also didn't correct any bitflips. Restoring the offsets as they were before, makes the PMECC on sama5d3x capable of correcting bitflips. Fixes: 786f888b74 ("sama5d3: Fix Galois Field Table offsets") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-06-05sandbox: correct determination of the text baseHeinrich Schuchardt
os_find_text_base() assumes that first line of /proc/self/maps holds information about the text. Hence we must call the function before calling os_malloc() which calls mmap(0x10000000,). Failure to do so has led to incorrect values for pc_reloc when an exception was reported => exception undefined Illegal instruction pc = 0x5628d82e9d3c, pc_reloc = 0x5628c82e9d3c as well as incorrect output of the bdinfo command => bdinfo relocaddr = 0x0000000007858000 reloc off = 0x0000000010000000 Fixes: b308d9fd18fa ("sandbox: Avoid using malloc() for system state") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-04arm: a37xx: pci: Increase PCIe MEM size from 16 MiB to 127 MiBPali Rohár
For some configurations with more PCIe cards and PCIe bridges, 16 MiB of PCIe MEM space may not be enough. Since TF-A already allocates a 128 MiB CPU window for PCIe, and since IO port space is only 64 KiB in total, use all the remaining space (64 + 32 + 16 + 8 + 4 + 2 + 1 = 127 MiB) for PCIe MEM. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() functionPali Rohár
Current version of this function uses a lot of incorrect assumptions about the `ranges` DT property: * parent(#address-cells) == 2 * #size-cells == 2 * number of entries == 2 * address size of first entry == 0x1000000 * second child address entry == base + 0x1000000 Trying to increase PCIe MEM space to more than 16 MiB leads to an overlap with PCIe IO space, and trying to define additional MEM space (as a third entry in the `ranges` DT property) causes U-Boot to crash when booting the kernel. ## Flattened Device Tree blob at 04f00000 Booting using the fdt blob at 0x4f00000 Loading Device Tree to 000000001fb01000, end 000000001fb08f12 ... OK ERROR: board-specific fdt fixup failed: <unknown error> - must RESET the board to recover. Fix a3700_fdt_fix_pcie_regions() to properly parse and update all addresses in the `ranges` property according to https://elinux.org/Device_Tree_Usage#PCI_Address_Translation Now it is possible to increase PCIe MEM space from 16 MiB to maximal value of 127 MiB. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Fixes: cb2ddb291ee6 ("arm64: mvebu: a37xx: add device-tree fixer for PCIe regions") Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04arm: a37xx: pci: Find PCIe controller node by compatible instead of pathPali Rohár
Find PCIe DT node by compatible string instead of retrieving it by using hardcoded DT path. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04arm: a37xx: pci: Fix DT compatible string to Linux' DT compatiblePali Rohár
Change DT compatible string for A3700 PCIe from 'marvell,armada-37xx-pcie' to 'marvell,armada-3700-pcie' to make U-Boot A3700 PCIe DT node compatible with Linux' DT node. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-05-31Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini
- SiFive FU740 and Unmatched support
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