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2022-08-20arm: Remove edminiv2 boardTom Rini
This board is not converted to use CONFIG_DM, well passed the migration deadline. Remove it. Cc: Simon Guinot <simon.guinot@sequanux.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20arm64: explicitly disable pointer authentication instructionsRasmus Villemoes
The Yocto project builds their aarch64 cross-compiler with the configure knob --enable-standard-branch-protection, which means that their gcc behaves as if -mbranch-protection=standard is passed; the default (lacking that configure knob) is -mbranch-protection=none. This means that when building U-Boot using the Yocto toolchain, most functions end up containing paciasp/autiasp/bti instructions. However, since U-Boot is not an ordinary userspace application, there's no OS kernel which has set up the required authentication keys, so these instructions do nothing at all (even on arm64 hardware that does have the pointer authentication capability). They do however make the image larger. It is theoretically possible for U-Boot to make use of the pointer authentication protection - cf. the linux kernel's CONFIG_ARM64_PTR_AUTH_KERNEL - but it is far from trivial, and it's hard to see just what threat model it would protect against in a bootloader context. Regardless, we certainly have none of the required infrastructure now, so explicitly pass -mbranch-protection=none to ensure those useless instructions do not get emitted. For a toolchain not configured with --enable-standard-branch-protection, this changes nothing. For the Yocto toolchain, this reduces the size of both SPL and U-Boot proper by about 3% for my imx8mp target. If you don't have a Yocto toolchain, the effect can easily be reproduced by applying this patch and changing =none to =standard. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-20Restore pcm051_rev3_defconfig configMatwey V. Kornilov
pcm051_rev3_defconfig config (Phytec Wega board) has been dropped in 64efd11d ("arm: Remove pcm051 board") due to expired migration deadlines. Here, pcm051_rev3_defconfig support is reintroduced. Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-08-20Nokia RX-51: Move board required options from defconfig to KconfigPali Rohár
Some of config options are board specific and should be set in into their default values automatically. So move them from defconfig file to Kconfig definitions to ensure that possible user custom defconfig files would have these required options also enabled. Signed-off-by: Pali Rohár <pali@kernel.org>
2022-08-20Nokia RX-51: Use U-Boot generic position independent codePali Rohár
Switch from custom board specific fixup/copy code to U-Boot generic position independent code provided by config option POSITION_INDEPENDENT. This also slightly decrease size of u-boot.bin binary (by 52 bytes). Note that option POSITION_INDEPENDENT increase size but not more than custom board fixup/copy code which is being deleted (as it is not needed anymore). Signed-off-by: Pali Rohár <pali@kernel.org>
2022-08-20arm: Set default MACH_TYPE in KconfigPali Rohár
For boards which requires correct MACH_TYPE, set their correct default values directly in Kconfig. Signed-off-by: Pali Rohár <pali@kernel.org>
2022-08-16ls1021atwr: caam: Enable Uboot validaion in SPL.Gaurav Jain
caam driver model enabled in spl for secure boot. fsl_rsa_mod_exp driver enabled in spl for validating uboot image. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
2022-08-12arm: Remove snapper9260 boardTom Rini
This board is behind on several mandatory DM migrations and is missing OF_CONTROL support that makes other conversions impossible. Remove it. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-08-12ppc: Remove ids8313 boardTom Rini
This board is behind on several mandatory DM migrations and is missing OF_CONTROL support that makes other conversions impossible. Remove it. Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Heiko Schocher <hs@denx.de>
2022-08-12Convert CONFIG_SYS_FSL_QMAN_V3 et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_FSL_NGPIXIS CONFIG_SYS_FSL_QMAN_V3 CONFIG_SYS_FSL_RAID_ENGINE CONFIG_SYS_FSL_RMU CONFIG_SYS_FSL_SINGLE_SOURCE_CLK CONFIG_SYS_FSL_SRIO_LIODN CONFIG_SYS_FSL_TBCLK_DIV CONFIG_SYS_FSL_USB1_PHY_ENABLE CONFIG_SYS_FSL_USB2_PHY_ENABLE CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12Convert CONFIG_SYS_FSL_PCIE_COMPAT to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_FSL_PCIE_COMPAT To do this, introduce a choice and option for each of the strings used and set CONFIG_SYS_FSL_PCIE_COMPAT based on that. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12Convert CONFIG_SYS_FSL_NUM_CC_PLLS to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_FSL_NUM_CC_PLLS Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12Convert CONFIG_SYS_FSL_MAX_NUM_OF_SEC to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_FSL_MAX_NUM_OF_SEC Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12Remove CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR et alTom Rini
This removes the following symbols: CONFIG_SYS_FSL_DSPI_BE CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET CONFIG_SYS_FSL_DSP_DDR_ADDR CONFIG_SYS_FSL_DSP_M2_RAM_ADDR CONFIG_SYS_FSL_DSP_M3_RAM_ADDR CONFIG_SYS_FSL_ERRATUM_A008751 CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT CONFIG_SYS_FSL_ESDHC_NUM CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET CONFIG_SYS_FSL_ISBC_VER CONFIG_SYS_FSL_QSPI_LE CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR CONFIG_SYS_FSL_SRDS_NUM_PLLS CONFIG_SYS_FSL_WDOG_BE CONFIG_SYS_GP1DIR CONFIG_SYS_GP1ODR CONFIG_SYS_GP2DIR CONFIG_SYS_GP2ODR CONFIG_SYS_HALT_BEFOR_RAM_JUMP CONFIG_SYS_HMI_BASE FSL_QSPI_FLASH_NUM FSL_QSPI_FLASH_SIZE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to KconfigTom Rini
We can determine which of these we need given CPU_BIG_ENDIAN being enabled or not, so move that logic to Kconfig from config.mk. Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12Convert CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS And we remove the entries from the README for a number of already converted items. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-12bootstd: Add vbe bootmeth into sandboxSimon Glass
Update sandbox to include the VBE bootmeth. Update a few existing tests to take account of this change, specifically that the new bootmeth now appears when scanning. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12bootstd: Allow EFI bootmgr to support an invalid bootflowSimon Glass
For most testing we don't want this bootmeth to actually do anything. For the one test where we do, add a test hook to obtain the correct behaviour. This will allow us to bind the device always, rather than just doing it for this test. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12video: Rename structs and functions to avoid VBESimon Glass
Rename these to VESA, itself an abbreviation, to avoid a conflict with Verified Boot for Embedded. Rename this to avoid referencing VBE. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-12video: Renname vbe.h to vesa.hSimon Glass
We want to use VBE to mean Verfiied Boot for Embedded in U-Boot. Rename the existing VBE (Vesa BIOS extensions) to allow this. Verified Boot for Embedded is documented doc/develop/vbe.rst Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-11riscv: ae350: Fix XIP config boot failureLeo Yu-Chi Liang
The booting flow is SPL -> OpenSBI -> U-Boot. The boot hart may change after OpenSBI and may not always be hart0, so wrap the related branch instruction with M-MODE. Current DTB setup for XIP is not valid. There is no chance for CONFIG_SYS_FDT_BASE, the DTB address used in XIP mode, to be returned. Fix this. Fixes: 2e8d2f88439d ("riscv: Remove OF_PRIOR_STAGE from RISC-V boards") Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-08-11riscv: cpu: set gp before board_init_f_init_reserveNikita Shubin
Restore global pointer before board_init_f_init_reserve call, as "a0" can be set in harts_early_init call and we end up with invalid global pointer. Signed-off-by: Nikita Shubin <n.shubin@yadro.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2022-08-10common: Drop display_options.h from common headerSimon Glass
Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-08-09Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- mvebu/turris_omina: Misc fixes and improvements (Pali & Marek) - mvebu: spl: Always fallback to BootROM boot method (Pali) - mvebu: Cleanup u-boot,dm-pre-reloc code (Pali) - gpio: Remove mvgpio driver (Chris) - SBx81LIFKW/SBx81LIFXCAT disable KIRKWOOD_GPIO (Chris) - misc: atsha204a: Don't check for error when waking up the device (Pali)
2022-08-09Merge tag 'u-boot-amlogic-20220809' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-amlogic - fixup error on efuse commands return - add documentation on boot flow
2022-08-09ARM: kirkwood: SBx81LIFKW: remove direct access of GPIO registersChris Packham
Replace code that accessed the GPIO registers directly with code that makes use of the LED_GPIO driver. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09arm: mvebu: armada-38x-controlcenterdc.dts: Move u-boot, dm-pre-reloc to ↵Pali Rohár
-u-boot.dtsi Move U-Boot specific device tree property u-boot,dm-pre-reloc into U-Boot specific device tree include file armada-38x-controlcenterdc-u-boot.dtsi. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09arm: mvebu: armada-xp-theadorable.dts: Move u-boot, dm-pre-reloc to -u-boot.dtsiPali Rohár
Move U-Boot specific device tree property u-boot,dm-pre-reloc into U-Boot specific device tree include file armada-xp-theadorable-u-boot.dtsi. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
2022-08-09arm: mvebu: Remove redundant u-boot, dm-pre-reloc from all 32-bit Armada SoCsPali Rohár
Replace it by including of mvebu-u-boot.dtsi file. When board does not use -u-boot.dtsi then mvebu-u-boot.dtsi is included automatically by makefile scripts/Makefile.lib. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
2022-08-09arm: mvebu: Introduce mvebu-u-boot.dtsi for 32-bit Armada SoCsPali Rohár
Set u-boot,dm-pre-reloc for /soc/, /soc/internal-regs/ and &uart0 nodes as it is required on every 32-bit Armada SoCs. And set also u-boot,dm-pre-reloc for &spi0 when going to boot from SPI because otherwise SPL SPI drivers do not load. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
2022-08-09arm: mvebu: dts: Build only arch-compatible dts filesPali Rohár
64-bit Armada DTS files are not build correctly during compilation of 32-bit Armada boards and vice versa. So fix makefile build system to compile only those dts files which are compatible for the current build (64-bit Armada DTS files only for 64-bit builds and 32-bit Armada DTS files only for 32-bit builds). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-09arm: mvebu: spl: Always fallback to BootROM boot methodPali Rohár
BootROM boot method should always work so always add it as fallback method to spl_boot_list. In case U-Boot SPI driver fails it is better to try using BootROM than hanging as by default only one boot method is specified. Signed-off-by: Pali Rohár <pali@kernel.org> Tested-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2022-08-08ARM: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pinsKunihiko Hayashi
UniPhier LD20, PXs2 and PXs3 boards have ethernet phy that has RX/TX delays of RGMII interface using pull-ups on the RXDLY and TXDLY pins. So should set the phy-mode to "rgmii-id" to show that RX/TX delays are enabled. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-08net: mpc8xx_fec: Migrate to DM_ETHChristophe Leroy
Migrate mpc8xx_fec driver to DM_ETH. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2022-08-08ARM: meson: fixup error on efuse commands returnJerome Brunet
All `sm efuseread/efusewrite` commands exit with an error, even if the fuse have actually been dealt with correctly. This is because the smc call return the size it actually processed but this result is checked against 0. Return failure in do_efuse_read/write if the return value of meson_sm_read/write_efuse() is not the requested size. Fixes: 52195ba5f579 ("ARM: amlogic: add sm efuse write support and cmd for read/write efuse") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220804144138.33809-1-jbrunet@baylibre.com
2022-08-04Convert CONFIG_SYS_FSL_CORES_PER_CLUSTER to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_FSL_CORES_PER_CLUSTER As part of this, correct the dependencies on SYS_FSL_THREADS_PER_CORE. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04Convert CONFIG_FSL_MEMAC et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_FSL_MEMAC CONFIG_SYS_MEMAC_LITTLE_ENDIAN Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04Convert CONFIG_SYS_FSL_CCSR_GUR_BE et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_FSL_CCSR_GUR_BE CONFIG_SYS_FSL_CCSR_SCFG_BE CONFIG_SYS_FSL_ESDHC_BE CONFIG_SYS_FSL_IFC_BE CONFIG_SYS_FSL_PEX_LUT_BE CONFIG_SYS_FSL_CCSR_GUR_LE CONFIG_SYS_FSL_CCSR_SCFG_LE CONFIG_SYS_FSL_ESDHC_LE CONFIG_SYS_FSL_IFC_LE CONFIG_SYS_FSL_PEX_LUT_LE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04Convert CONFIG_FSL_CORENET to KconfigTom Rini
This converts the following to Kconfig: CONFIG_FSL_CORENET Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04Convert CONFIG_SYS_FMAN_V3 to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_FMAN_V3 Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04sh: Remove unused code in arch/sh/lib/bootm.cTom Rini
There are no callers of the hexdump function that is guarded by CONFIG_SYS_DEBUG, so remove the section. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-08-04arm: mach-k3: security: Remove certificate if detected on GP deviceAndrew Davis
If the device is a GP and we detect a signing certificate then remove it. It would fail to authenticate otherwise as the device is GP and has no secure authentication services in SYSFW. This shouldn't happen often as trying to boot signed images on GP devices doesn't make much sense, but if we run into a signed image we should at least try to ignore the certificate and boot the image anyway. This could help with users of GP devices who only have HS images available. If this does happen, print a nice big warning. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-08-04arm: mach-k3: security: Bypass image signing at runtime for GP devicesAndrew Davis
We can skip the image authentication check at runtime if the device is GP. This reduces the delta between GP and HS U-Boot builds. End goal is to re-unify the two build types into one build that can run on all device types. Signed-off-by: Andrew Davis <afd@ti.com>
2022-08-04arm: mach-k3: security: Allow signing bypass if type is HS-FSAndrew Davis
On HS-FS devices signing boot images is optional. To ease use we check if we are HS-FS and if no certificate is attached to the image we skip the authentication step with a warning that this will fail when the device is set to security enforcing. Signed-off-by: Andrew Davis <afd@ti.com>
2022-08-04arm: mach-k3: Add support for device type detectionAndrew Davis
K3 SoCs are available in a number of device types such as GP, HS-FS, EMU, etc. Like OMAP SoCs we can detect this at runtime and should print this out as part of the SoC information line. We add this as part of the common.c file as it will be used to also modify our security state early in the device boot. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-08-04mx7ulp_com: fix incorrect select for SPL optionsQuentin Schulz
SPL_GPIO_SUPPORT is named SPL_GPIO since commit 83061dbd1c89 ("Rename GPIO_SUPPORT to GPIO"), SPL_MMC_SUPPORT is named SPL_MMC since commit 103c5f180694 ("mmc: Rename MMC_SUPPORT to MMC"), SPL_SERIAL_SUPPORT is named SPL_SERIAL since commit 2a7360666871 ("serial: Rename SERIAL_SUPPORT to SERIAL") so let's select the correct Kconfig options. Fixes: 8b71576f3842 ("mx7ulp_com: add support for SPL") Cc: Quentin Schulz <foss+uboot@0leil.net> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2022-08-04ARM: dts: npcm7xx: add npcm750 full function nodeJim Liu
add npcm750 BMC full function node Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-07-31Merge tag 'fsl-qoriq-2022-7-29' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq mpc85xx: support for generating QorIQ pre-PBL eSDHC boot sector p1_p2_rdb_pc: Remove I-flag from second L2 SRAM mapping p1_p2_rdb_pc: Fix parsing inverted bits from boot input data p1_p2_rdb_pc: Simplify SPL offset macros
2022-07-29arm: mvebu: turris_omnia: Fix mpp26 pin name and commentMarek Behún
There is a bug in Turris Omnia's schematics, whereupon the MPP[26] pin, which is routed to CN11 pin header, is documented as SPI CS1, but MPP[26] pin does not support this function. Instead it controls chip select 2 if in "spi0" mode. Fix the name of the pin node in pinctrl node and fix the comment in SPI node. Signed-off-by: Marek Behún <kabel@kernel.org>
2022-07-29arm: mvebu: Synchronize armada-385-turris-omnia with Linux v5.20Pali Rohár
* Add SPDX-License-Identifier * Add SFP and LED nodes * Fix PHY nad NOR nodes * Remove duplicates from u-boot.dtsi file Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-05 17:55:51 +0000