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2025-07-17venice: lpddr4_timing_imx8mm: add 4gb single die supportTim Harvey
Add dram support for the MT53E1G32D2FW-046 RevC part which is a single die 32Gbit density part vs RevA/B which were dual-die parts: - use a previously unused EEPROM byte to denote a variant of the base config to be patched - add a dram description string - return the board struct from eeprom_init and pass it to the spl_dram_init function so that it has access to the EEPROM - move ddr_init into the spl_dram_init so that it can be patched in the per-soc init function Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2025-05-30board: venice: move soc-specific dram config into soc-specific filesTim Harvey
Move the determination of the dram timings into the soc-specific files. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-02-19board: gateworks: venice: add imx8mn-gw7902 supportTim Harvey
The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring: - LPDDR4 DRAM - eMMC FLASH - Gateworks System Controller - LTE CAT M1 modem - USB 2.0 HUB - M.2 Socket with USB2.0, PCIe, and dual-SIM - IMX8M FEC - PCIe based GbE - RS232/RS485/RS422 serial transceiver - GPS - CAN bus - WiFi / Bluetooth - MIPI header (DSI/CSI/GPIO/PWM/I2S) - PMIC To add support for the i.MX8M Nano GW7902: - Add imx8mn-venice dts/defconfig/include - Add imx8mn-gw7902 dts - Add imx8mn-2gb lpddr4 dram configs - Add misc support for IMX8M Nano SoC - rename imx8mm-venice.c to venice.c as it is no longer imx8mm specific - update README with differences for IMX8MN vs IMX8MM Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>