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path: root/cpu/mpc85xx/release.S
AgeCommit message (Expand)Author
2010-04-13ppc: Move cpu/$CPU to arch/ppc/cpu/$CPUPeter Tyser
2010-04-0785xx: Set HID1[mbdd] on e500v2 rev5.0 or greaterSandeep Gopalpet
2010-04-0785xx: Add defines for BUCSR bits to make code more readableKumar Gala
2010-03-3085xx: Fix enabling of L1 cache parity on secondary coresKumar Gala
2010-01-05ppc/85xx: Map boot page guarded for MP bootKumar Gala
2010-01-0585xx: Add support for e500mc cache stashingKumar Gala
2009-10-31ppc/85xx: Fix misc L2 cache enabling bugDave Liu
2009-10-2785xx: MP Boot Page Translation updatePeter Tyser
2009-09-24ppc/85xx: Fix enabling of L2 cacheKumar Gala
2009-09-0885xx: Add support for setting IVORs to fixed offset defaultsKumar Gala
2009-08-288xxx: Removed CONFIG_NUM_CPUS from 85xx/86xxPoonam Aggrwal
2009-03-3085xx: Add support for additional e500mc featuresKumar Gala
2008-12-19Set IVPR to kenrel entry point in second core boot pageHaiying Wang
2008-10-2485xx: Add basic e500mc core supportKumar Gala
2008-09-0985xx: Ensure timebase is zero on secondary coresKumar Gala
2008-08-1285xx: Rename CONFIG_NR_CPUS to CONFIG_NUM_CPUSKumar Gala
2008-04-2985xx: Additional fixes and cleanup of MP codeKumar Gala
2008-03-2685xx: Update multicore boot mechanism to ePAPR v0.81 specKumar Gala
2008-03-2685xx: Added support for multicore boot mechanismKumar Gala
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