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path: root/drivers/clk
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2021-04-08clk: mpfs_clk: Enable DM_FLAG_PRE_RELOC flagBin Meng
This driver is needed in the pre-relocation phase as the serial driver depends on it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com> Tested-by: Padmarao Begari <padmarao.begari@microchip.com>
2021-04-06clk: Return -ENOSYS when system call is not availableSimon Glass
Update clk_composite_set_parent() to use -ENOSYS, which is the correct error code for U-Boot. Also rearrange the code so that the error condition is clearly indicated and the function runs to the end in the normal case, since this is the common style in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-04-06clk: Update drivers to use -EINVALSimon Glass
At present some drivers use -ENOSUPP to indicate that an unknown or unsupported clock is used. Most use -EINVAL, indicating an invalid value, so convert everything to that. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2021-03-31Merge tag 'xilinx-for-v2021.07' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.07 net: - Fix gem PCS support spi: - Small trivial fixes zynq: - Enable time/timer commands - Update bitmain platform - Several DT changes zynqmp: - Update clock driver - mini config alignments - Add/update psu_init for zcu208/zcu216/zc1275 - Several DT changes - Enable efi debug command (also for Versal)
2021-03-30clk: zynqmp: Fix clk dump valuesT Karthik Reddy
With "clk dump" command, few clocks are showing up incorrect values and some clocks are displayed as "unknown". Add missing clocks to zynqmp clock driver to display proper clocks rates. Implement a simple way to get clock source, instead of calling functions. Change existing functions to this simple mechanism. Fix gem clock name "gem_rx" to "gem_tx" which was incorrect. Change dbf_fpd & dbf_lpd clk names to dbg_fpd & dbg_lpd. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
2021-03-26dm: Rename device_get_by_driver_info_idx()Simon Glass
This function finds a device by its driver_info index. With of-platdata-inst we do not use driver_info, but instead instantiate udevice records at build-time. However the semantics of using the function are the same in each case: the caller provides an index and gets back a device. So rename the function to device_get_by_ofplat_idx(), so that it can be used for both situations. The caller does not really need to worry about the details. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26clk: sandbox: Create a special fixed-rate driverSimon Glass
Create a version of this driver for sandbox so that it can use the of-platdata struct. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26clk: fixed-rate: Export driver parts for OF_PLATDATA_INSTSimon Glass
We need to allow SoCs to create their own drivers for this so that they can use their own of-platdata structs. To minimise code duplication, export the driver operations and the ofdata_to_plat() setup function. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26clk: sandbox: Move priv/plat data to a header fileSimon Glass
At present the structs used by this driver are not accessible outside it, so cannot be used with OF_PLATDATA_INST. Move them to a header file to fix this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-11clk: stm32mp1: gets root clocks from fdtEtienne Carriere
This change makes stm32mp1 clock driver to get the root clocks reference from the device node in the FDT rather than fetching straight these clocks by their name. Driver now stores the clock reference and use it to know if a root clock is present, get its rate or gets its related udevice reference. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-02-23Merge tag 'xilinx-for-v2021.04-rc3' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
2021-02-23clk: versal: Add support to enable clocksT Karthik Reddy
Add clock enable functionality in versal clock driver to enable clocks from peripheral drivers using clk_ops. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23clk: zynqmp: Add support to enable clocksT Karthik Reddy
Add clock enable functionality in zynqmp clock driver to enable clocks from peripheral drivers using clk_ops. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23clk: zynq: Add dummy clock enable functionMichal Simek
A lot of Xilinx drivers are checking -ENOSYS which means that clock driver doesn't have enable function. Remove this checking from drivers and create dummy enable function as was done for clk_fixed_rate driver by commit 6bf6d81c1112 ("clk: fixed_rate: add dummy enable() function"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-22clk: ti: improve debug messages for clkctrl driverDario Binacchi
The previous version printed the same debug message for both the enable and disable routines without highlighting whether you were enabling or disabling the module. It is now clear whether you are enabling or disabling the module. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-02-15Merge branch '2021-02-02-drop-asm_global_data-when-unused'Tom Rini
- Merge the patch to take <asm/global_data.h> out of <common.h>
2021-02-11clk: at91: compat: partially revert "dm: Remove uses of device_bind_offset()"Eugen Hristev
Revert changes in at91 compat.c that cause u-boot to fail booting on sama5d4_xplained and sama5d2_xplained Log below: <debug_uart> No serial driver found Could not initialize timer (err -19) Could not initialize timer (err -19) Could not initialize timer (err -19) Could not initialize timer (err -19) Could not initialize timer (err -19) Could not initialize timer (err -19) Could not initialize timer (err -19) Could not initialize timer (err -19) Fixes: a2703ce10c ("dm: Remove uses of device_bind_offset()") Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-09clk: stm32mp1: add support of I2C6_KPatrick Delaunay
Add support of missing I2C6_K with bit 3 of RCC_MC_APB5ENSETR = I2C6EN: I2C6 peripheral clocks enable. This patch allows customer to use I2C6 in SPL or in U-Boot as other I2C instance, already support in clk driver. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-30clk: x86: Correct the driver nameSimon Glass
The current driver name does not match its compatible string, so of-platdata does not work correctly. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-30clk: Add debugging for return valuesSimon Glass
Use the log_msg_ret() mechanism to get error-return information when clocks fail to probe, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-25Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
- New Allwinner H616 SoC support (sans Ethernet & USB) - H6 DT update - Tanix TX6 TV box support - OrangePi 3 support - OrangePi Zero2 (H616) support
2021-01-25clk: sunxi: Add support for H616 clocksJernej Skrabec
This commit introduces DM H616 clock driver. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-25Merge tag 'mips-pull-2021-01-24' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-mips - MIPS: add support for Mediatek MT7620 SoCs
2021-01-24clk: add clock driver for MediaTek MT7620 SoCWeijie Gao
This patch adds a clock driver for MediaTek MT7620 SoC. This driver provides clock gate control as well as getting clock frequency for CPU/SYS/XTAL and some peripherals. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-23clk: imx: Add ECSPI to iMX8MNMarek Vasut
Add ECSPI clock entries to iMX8MN clock driver. Only make those entries available in case SPI support in U-Boot is enabled at all to conserve space, esp. in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2021-01-18clk: aspeed: Add AST2600 clock supportRyan Chen
This patch adds the clock control driver for the AST2600 SoC. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
2021-01-18clk: mediatek: Add MT8183 clock driverFabien Parent
Add the topckgen, apmixedsys and infracfg clock driver for the MT8183 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-01-18clk: Add Microchip PolarFire SoC clock driverPadmarao Begari
Add clock driver code for the Microchip PolarFire SoC. This driver handles reset and clock control of the Microchip PolarFire SoC device. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Tested-by: Bin Meng <bin.meng@windriver.com>
2021-01-15dm: fix build errors generated by last mergesDario Binacchi
Something was wrong in the merge process into the mainline. Some added patches access driver structure fields and functions that have been modified by previous patches. The patch renames: - dev_get_platdata to dev_get_plat - dev_get_uclass_platdata to dev_get_uclass_plat - ofdata_to_platdata to of_to_plat - plat_data_alloc_size to plat_auto - priv_auto_alloc_size to priv_auto - video_uc_platdata to video_uc_plat Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-13Merge tag 'u-boot-stm32-20210113' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - Enable logging features for stm32mp15 boards - Update MAINTAINERS emails for STI and STM32 - Activate OF_LIVE for ST stm32mp15 boards - Switch to MCO2 for PHY 50 MHz clock for DHCOM boards - Correction in stm32prog command on uart: always flush DFU on start command - Update USB-C power detection algorithm on DK boards
2021-01-13Merge tag 'u-boot-amlogic-20210112' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - sync amlogic GX & AXG DT to Linux 5.10 - Add new MESON_EE driver support for GXBB & AXG - Add support for Libretech-CC v2, Wetek Core2, Beelink GT-King/Pro boards - add driver for TDO tl070wsh30 panel driver - meson: isolate loading of socinfo - Add soc_rev to environment - Enable G12A support for saradc - Add correct mmcdev on VIM3(L) & Odroid-N2(C4) - Read MAC from fuses for VIM3 & VIM3L boards
2021-01-13clk: clk_stm32h7: migrate trace to dev and log macroPatrick Delaunay
Change debug and pr_ macro to dev macro and define LOG_CATEGORY. Remove the "%s:" __func__ header as it is managed by dev macro (dev->name is displayed) or log macro (CONFIG_LOGF_FUNC). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13clk: clk_stm32f: migrate trace to dev and log macroPatrick Delaunay
Change debug and pr_ macro to dev macro and define LOG_CATEGORY. Remove the "%s:" __func__ header as it is managed by dev macro (dev->name is displayed) or log macro (CONFIG_LOGF_FUNC). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-13clk: stm32mp1: migrate trace to dev and log macroPatrick Delaunay
Change debug and pr_ macro to dev macro and define LOG_CATEGORY. Remove the "%s:" __func__ header as it is managed by dev macro (dev->name is displayed) or log macro (CONFIG_LOGF_FUNC). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2021-01-12clk: move clk-ti-sci driver to 'ti' directoryDario Binacchi
The patch moves the clk-ti-sci.c file to the 'ti' directory along with all the other TI's drivers, and renames it clk-sci.c. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12clk: ti: omap4: add clock manager driverDario Binacchi
This minimal driver is only used to bind child devices. For DT binding details see Linux doc: - Documentation/devicetree/bindings/arm/omap/prcm.txt Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12clk: ti: add support for clkctrl clocksDario Binacchi
Until now the clkctrl clocks have been enabled/disabled through platform routines. Thanks to this patch they can be enabled and configured directly by the probed devices that need to use them. For DT binding details see Linux doc: - Documentation/devicetree/bindings/clock/ti-clkctrl.txt Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12clk: ti: add gate clock driverDario Binacchi
The patch adds support for TI gate clock binding. The code is based on the drivers/clk/ti/gate.c driver of the Linux kernel version 5.9-rc7. For DT binding details see: - Documentation/devicetree/bindings/clock/ti/gate.txt Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12clk: ti: add divider clock driverDario Binacchi
The patch adds support for TI divider clock binding. The driver uses routines provided by the common clock framework (ccf). The code is based on the drivers/clk/ti/divider.c driver of the Linux kernel version 5.9-rc7. For DT binding details see: - Documentation/devicetree/bindings/clock/ti/divider.txt Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12clk: ti: am33xx: add DPLL clock driversDario Binacchi
The digital phase-locked loop (DPLL) provides all interface clocks and functional clocks to the processor of the AM33xx device. The AM33xx device integrates five different DPLLs: * Core DPLL * Per DPLL * LCD DPLL * DDR DPLL * MPU DPLL The patch adds support for the compatible strings: * "ti,am3-dpll-core-clock" * "ti,am3-dpll-no-gate-clock" * "ti,am3-dpll-no-gate-j-type-clock" * "ti,am3-dpll-x2-clock" The code is loosely based on the drivers/clk/ti/dpll.c drivers of the Linux kernel version 5.9-rc7. For DT binding details see: - Documentation/devicetree/bindings/clock/ti/dpll.txt Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12clk: ti: add mux clock driverDario Binacchi
The driver manages a register-mapped multiplexer with multiple input clock signals or parents, one of which can be selected as output. It uses routines provided by the common clock framework (ccf). The code is based on the drivers/clk/ti/mux.c driver of the Linux kernel version 5.9-rc7. For DT binding details see: - Documentation/devicetree/bindings/clock/ti/mux.txt Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-01-12clk: add clk_round_rate()Dario Binacchi
It returns the rate which will be set if you ask clk_set_rate() to set that rate. It provides a way to query exactly what rate you'll get if you call clk_set_rate() with that same argument. So essentially, clk_round_rate() and clk_set_rate() are equivalent except the former does not modify the clock hardware in any way. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-01-12clk: export generic routinesDario Binacchi
Export routines that can be used by other drivers avoiding duplicating code. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-11clk: meson: add minimal driver for g12a-ao clocksMarek Szyprowski
Add minimal driver AO clocks on meson G12A family. Only ADC related clocks are supported. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-05Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextTom Rini
Driver model: make some udevice fields private Driver model: Rename U_BOOT_DEVICE et al. dtoc: Tidy up and add more tests ns16550 code clean-up x86 and sandbox minor fixes for of-platdata dtoc prepration for adding build-time instantiation
2021-01-05Merge tag 'v2021.01-rc5' into nextTom Rini
Prepare v2021.01-rc5 Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-05dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()Simon Glass
In the spirit of using the same base name for all of these related macros, rename this to have the operation at the end. This is not widely used so the impact is fairly small. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05dm: core: Access device ofnode through functionsSimon Glass
At present ofnode is present in the device even if it is never used. With of-platdata this field is not used, so can be removed. In preparation for this, change the access to go through inline functions. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05dm: core: Use dev_has_ofnode() instead of dev_of_valid()Simon Glass
We have two functions which do the same thing. Standardise on dev_has_ofnode() since there is no such thing as an 'invalid' ofnode in normal operation: it is either null or missing. Also move the functions into one place. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-18 23:01:22 +0000