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path: root/drivers/net
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2021-02-15image: Adjust the workings of fit_check_format()Simon Glass
At present this function does not accept a size for the FIT. This means that it must be read from the FIT itself, introducing potential security risk. Update the function to include a size parameter, which can be invalid, in which case fit_check_format() calculates it. For now no callers pass the size, but this can be updated later. Also adjust the return value to an error code so that all the different types of problems can be distinguished by the user. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Bruce Monroe <bruce.monroe@intel.com> Reported-by: Arie Haenel <arie.haenel@intel.com> Reported-by: Julien Lenoir <julien.lenoir@intel.com>
2021-02-15Merge branch '2021-02-02-drop-asm_global_data-when-unused'Tom Rini
- Merge the patch to take <asm/global_data.h> out of <common.h>
2021-02-15sh: Remove sh7757lcr boardTom Rini
This board has not been converted to CONFIG_DM by the deadline of v2020.01 and is missing other conversions which depend on this as well. Remove it. As this is the last SH4A board, remove that support as well. Cc: Marek Vasut <marek.vasut+renesas@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-15sh: Remove r7780mp boardTom Rini
This board has not been converted to CONFIG_DM by the deadline of v2020.01 and is missing other conversions which depend on this as well. Remove it. Patch-cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Patch-cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-11net: gem: unregister mdio bus if probe failsMichael Walle
If probe fails, the mdio bus isn't unregistered. Fix it. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-08net: eqos: Reduce the MDIO wait timeYe Li
Current MDIO wait time is too long, which introduce long delay when PHY negotiation register checking. Reduce it to 10us Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fugang Duan <Fugang.duan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-08net: memac_phy: add a timeout to MDIO operationsIoana Ciornei
We have encountered circumstances when a board design does not include pull-up resistors on the external MDIO buses which are not used. This leads to the MDIO data line not being pulled-up, thus the MDIO controller will always see the line as busy. Without a timeout in the MDIO bus driver, the execution is stuck in an infinite loop when any access is initiated on that external bus. Add a timeout in the driver so that we are protected in this circumstance. This is similar to what is being done in the Linux xgmac_mdio driver. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Madalin Bucur <madalin.bucur@oss.nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-03net: ftmac100: Cast priv->iobase with uintptr_tBin Meng
priv->iobase was declared as phys_addr_t which is now a 64-bit address. In a 32-bit build, this causes the following warning seen when building ftmac100.c: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Cast priv->iobase with uintptr_t. Signed-off-by: Bin Meng <bin.meng@windriver.com>
2021-02-02common: Drop asm/global_data.h from common headerSimon Glass
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-31net: sun8i-emac: Determine pinmux based on SoC, not EMAC typeAndre Przywara
The pinmux choice for the RMII/RGMII pins the EMAC is connected to is not dependent on the EMAC IP, but on the SoC it is integrated in. Deriving the pinmux from the DT compatible string (as we do at the moment) will thus cause problems with certain EMAC IP / SoC combinations. To avoid this exact issue with the H616, let's use our Kconfig MACH symbols to choose the correct pinmux setup. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
2021-01-31net: sun8i-emac: Always clear syscon EPHY registerAndre Przywara
At the moment we only consider the EPHY register for those SoCs were we actually have an internal PHY to configure. However even other SoCs have this register, an expect the EPHY select bit to be cleared for proper operation with an external PHY. Rework sun8i_emac_set_syscon_ephy() to be called regardless of the EMAC model, and clear the H3_EPHY_SELECT bit if no internal PHY is used. We get away without it so far because SoCs like the A64 clear this bit on reset, but we need to explicitly clear it on the H616, for instance. The Linux driver does so as well. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Tested-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
2021-01-27net: phy: micrel: Try default PHY ofnode firstMarek Vasut
The phydev structure has a PHY OF node pointer in it, use that OF node first when looking up PHY OF node properties, since that is likely the correct PHY OF node pointer. If the pointer is not valid, which is the case e.g. on legacy DTs, fall back to parsing MAC ethernet-phy subnode. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Ramon Fried <rfried.dev@gmail.com>
2021-01-27net: phy: ca_phy: Add driver for CAxxxx SoCsAbbie Chang
Add phy driver support for MACs embedded inside Cortina Access SoCs Signed-off-by: Abbie Chang <abbie.chang@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Tom Rini <trini@konsulko.com> CC: Aaron Tseng <aaron.tseng@cortina-access.com> Moved out PHY specific code out of Cortina NI Ethernet driver and into a Cortina Access PHY interface driver
2021-01-27net: cortina_ni: Add eth support for Cortina Access CAxxxx SoCsAaron Tseng
Add Cortina Access Ethernet device driver for CAxxxx SoCs. This driver supports both legacy and DM_ETH network models. Signed-off-by: Aaron Tseng <aaron.tseng@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> Signed-off-by: Abbie Chang <abbie.chang@cortina-access.com> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Abbie Chang <abbie.chang@Cortina-Access.com> CC: Tom Rini <trini@konsulko.com>
2021-01-27net: e1000: Add missing address translationsStefan Roese
Add some missing address translations from virtual address in local DRAM to physical address, which is needed for the DMA transactions to work correctly. This issue was detected while testing the e1000 driver on the MIPS Octeon III platform, which needs address translation. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com>
2021-01-27net: e1000: Use virt_to_phys() instead of pci_virt_to_mem()Stefan Roese
Using (dm_)pci_virt_to_mem() is incorrect to translate the virtual address in local DRAM to a physical address. The correct macro here is virt_to_phys() so switch to using this macro. As virt_to_bus() is now not used any more, this patch also removes both definitions (DM and non-DM). This issue was detected while testing the e1000 driver on the MIPS Octeon III platform, which needs address translation. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com>
2021-01-27net: e1000: Remove unused bus_to_phys() macroStefan Roese
bus_to_phys() is defined but not referenced at all. This patch removes it completely. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com>
2021-01-25Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
- New Allwinner H616 SoC support (sans Ethernet & USB) - H6 DT update - Tanix TX6 TV box support - OrangePi 3 support - OrangePi Zero2 (H616) support
2021-01-25net: sun8i-emac: Allow all RGMII PHY modesAndre Przywara
So far all GBit users of the sun8i-emac driver were using the "rgmii" PHY mode, even though this turns out to be wrong. It just worked because the PHY driver doesn't do the proper setup (yet). In fact for most boards the "rgmii-id" or "rgmii-txid" PHY modes are the correct ones. To allow the DTs to describe the phy-mode correctly, and to stay compatible with Linux, at least allow those other RGMII modes in the driver. This avoids breakage if mainline DTs will be synced with U-Boot. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-01-25Merge tag 'mips-pull-2021-01-24' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-mips - MIPS: add support for Mediatek MT7620 SoCs
2021-01-25Merge tag 'u-boot-atmel-2021.04-b' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-atmel Second set of u-boot-atmel features for 2021.04 cycle This feature set includes macb updates for all interfaces and new sama7g5 variant support; micrel ksz9031 DLL support; a new board from Giant based on Adafruit feather form factor which contains a SAMA5D27 SoC; several fixes regarding the NAND flash PMECC block; and pincontrol drive strength support for pio4 controller.
2021-01-24net: add ethernet driver for MediaTek MT7620 SoCWeijie Gao
This patch adds ethernet driver for MediaTek MT7620 SoC. The MT7620 SoC has a built-in ethernet (Frame Engine) and a built-in 7-port switch and two xMII interfaces (can be MII/RMII/RGMII). The port 0-3 of the switch connects to intergrited FE PHYs. Port 4 can be configured to connect to either the intergrited FE PHY, or the xMII. Port 5 always connects to the xMII. Port 6 is the CPU port. This driver supports MT7530 giga switch connects to port 5. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-01-22net: macb: take into account all RGMII interface typesClaudiu Beznea
Take into account all RGMII interface types. Depending on it the RGMII PHY's timings are setup. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-22net: macb: add support for sama7g5 emacClaudiu Beznea
Add support for SAMA7G5 EMAC. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-22net: macb: add support for sama7g5 gmacClaudiu Beznea
Add support for SAMA7G5 GMAC. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-22net: macb: check clk_set_rate return value to be negativeClaudiu Beznea
clk_set_rate() returns the set rate in case of success and a negative number in case of failure. Consider failure only the negative numbers. Fixes: 3ef64444de157 ("dm: net: macb: Implement link speed change callback") Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-22net: macb: add user io config data structureClaudiu Beznea
Different implementation of USER IO register needs different mapping for bit fields of this register. Add implementation for this and, since clken is part of USER IO and it needs to be activated based on per SoC capabilities, add caps in macb_config where clken specific information needs to be filled. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-19net: dwc_eth_qos: Pad descriptors to cacheline sizeMarek Vasut
The DWMAC4 IP has the possibility to skip up to 7 AXI bus width size words after the descriptor. Use this to pad the descriptors to cacheline size and remove the need for noncached memory altogether. Moreover, this lets Tegra use the generic cache flush / invalidate operations. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-01-19net: ks8851: Reset internal RXFC count on bad packetMarek Vasut
A sporadic condition occurs when the "bad packet" error is triggered repeatedly, which results in "bad packet" messages scrolling on the console during transfer. To avoid triggering this, reset the internal RXFC count on the first occurance of the "bad packet", which forces the code to re-read the RX packet count from the MAC, and prevents any additional "bad packet" messages if there are no more packets in the MAC. Also print better debug information if this condition occurs. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Tom Rini <trini@konsulko.com>
2021-01-19net: ftgmac100: Read and retain MAC addressHongwei Zhang
Read and retain MAC address across flash and QEMU support. Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
2021-01-19net: e1000: implement eth_write_hwaddr for DM_ETHIan Ray
Implement programming MAC address to the hardware also for device model configuration. Fixes: b565b18a294f ("board: ge: bx50v3: Enable DM for PCI and ethernet") Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2021-01-19net: phy: micrel: fix typoClaudiu Beznea
Fix typo. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-19net: phy: micrel: add support for DLL setup on ksz9131Claudiu Beznea
Add support for DLL setup on KSZ9131. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-18net: macb: Add phy address to read it from device treePadmarao Begari
Read phy address from device tree and use it to find the phy device if not found then search in the range of 0 to 31. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
2021-01-18net: macb: Add DMA 64-bit address support for macbPadmarao Begari
Enable 32-bit or 64-bit DMA in the macb driver based on the macb hardware compatibility and it is configured with structure macb_config in the driver. The Microchip PolarFire SoC Memory Protection Unit(MPU) gives the 64-bit DMA access with the GEM, the MPU transactions on the AXI bus is 64-bit not 32-bit So 64-bit DMA is enabled for the Microchip PolarFire SoC GEM. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Tested-by: Bin Meng <bin.meng@windriver.com>
2021-01-15common: board_r: Drop initr_bbmii wrapperOvidiu Panait
Add a return value to bb_miiphy_init and use it directly in the post-relocation init sequence, rather than using a wrapper stub. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-01-15net: designware: socfpga: Add ATF support for MAC driverChee Hong Ang
In non-secure mode (EL2), MAC driver calls the SMC/PSCI services provided by ATF to setup the PHY interface. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-01-05Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into nextTom Rini
Driver model: make some udevice fields private Driver model: Rename U_BOOT_DEVICE et al. dtoc: Tidy up and add more tests ns16550 code clean-up x86 and sandbox minor fixes for of-platdata dtoc prepration for adding build-time instantiation
2021-01-05Merge tag 'v2021.01-rc5' into nextTom Rini
Prepare v2021.01-rc5 Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-05dm: core: Access device ofnode through functionsSimon Glass
At present ofnode is present in the device even if it is never used. With of-platdata this field is not used, so can be removed. In preparation for this, change the access to go through inline functions. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05dm: Use access methods for dev/uclass private dataSimon Glass
Most drivers use these access methods but a few do not. Update them. In some cases the access is not permitted, so mark those with a FIXME tag for the maintainer to check. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Pratyush Yadav <p.yadav@ti.com>
2020-12-18net: Update to use new sequence numbersSimon Glass
Checking for seq == -1 is effectively checking that the device is activated. The new sequence numbers are never -1 for a bound device, so update the check. Also drop the note about valid sequence numbers so it is accurate with the new approach. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18octeon: Don't attempt to set the sequence numberSimon Glass
Several Octeon drivers operate by setting the sequence number of their device. This should not be needed with the new sequence number setup. Also it is not permitted. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-18dm: Avoid accessing seq directlySimon Glass
At present various drivers etc. access the device's 'seq' member directly. This makes it harder to change the meaning of that member. Change access to go through a function instead. The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass
Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass
This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass
Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass
We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: Remove uses of device_bind_offset()Simon Glass
This function is not needed since the standard device_bind() can be used instead. Signed-off-by: Simon Glass <sjg@chromium.org>
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