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2024-09-03net: dwc_eth_qos: Fix header to be self-containedPhilip Oberfichtner
Before this commit, usage of this header relied on a specific include order. Fix it by including all dependencies. Signed-off-by: Philip Oberfichtner <pro@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
2024-08-01clk: clk-uclass: Print clk name in clk_enable/clk_disableMichael Trimarchi
Print clk name in clk_enable and clk_disable. Make sense to know what clock get disabled/enabled before a system crash or system hang. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2024-08-01clk: Fix error message in clk_get_bulkJan Kiszka
Fix a logical inversion of the printed text. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2024-08-01Merge patch series "clk: mediatek: add OPs to support OF_UPSTREAM"Tom Rini
Christian Marangi <ansuelsmth@gmail.com> says: This series doesn't currently change anything and it does add all the additional OPs to make support of OF_UPSTREAM. While converting the mt7681/7686/7688/7623/7622 it was notice lots of discrepancy between the downstream dtsi and the upstream one and the clock ID between downstream clock ID and upstream clock ID. Upstream reference clock by names and clock are handled by the CCF (Common Clock Framework). The same can't be used here as we would quickly reach the max space allocated before relocation. The current mediatek clock driver reference all the parents and clocks with offset from the clk ID related to the different tables. Discrepancy between clock ID and the order in the clocks table cause one clock referenced for another or even crash for trying to access a clock at an offset that doesn't exist. To handle this and permit use of OF_UPSTREAM, various measure and changes are done to the mediatek clock driver to support it. This series have all the generic clock changes. Once this is merged, series for each SoC will came that will just change files in their dedicated clock driver. This is to prevent massive patch and to permit to split series, one for each SoC. As said at the start, these changes doesn't cause regression and are just expansion to the current API. Current behaviour is saved in every possible way (aside from the first 2 patch that fixes latent bugs)
2024-08-01clk: mediatek: add support for APMIXED parent in infra MUXChristian Marangi
Add support for APMIXED parent in infra MUX. This is the case for mt7622 that reference APMIXED parents for the MUX1_SEL clock. We assume the second level parent is always APMIXED. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-01clk: mediatek: add support for GATEs for APMIXED OPsChristian Marangi
Add support for GATEs for APMIXED OPs. It's possible that some APMIXED have also gates on top of PLL. This is the case for mt7622. Add support for this. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-01clk: mediatek: implement MUX_FLAGS and MUX_MIXED_FLAGS macroChristian Marangi
Some simple MUX might require flags to specify the parent source. Implement MUX_FLAGS as a variant of the MUX macro that takes custom flags as last arg. Also implement MUX_MIXED_FLAGS for PARENT_MIXED implementation and MUX_MIXED with no additional flags. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-01clk: mediatek: add support for remapping clock IDChristian Marangi
Upstream kernel linux might have a different clock ID order in their <soc>-clk.h header. This is the case of some clock ID for mt7623 that upstream use the shared header clk-mt7601.h This header doesn't have a well distincted order and have factor or mux in the middle of the CLK ID list. This is problematic with the mtk clock driver that expect everything well organized in block and apply offset to reference the clk in the different array. To solve this problem, implement in the mtk_clk_tree an additional option .id_offs_map, an array where each CLK ID can be remapped to what the driver expect permitting to reorganize the clock following the expected logic of fixed, factor, mux and gates. Each clock function is updated to tranparently handle this by first converting the clk ID to the remapped one. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-01clk: mediatek: provide common clk init function for infrasysChristian Marangi
Provide common clk init function for infrasys that defaults to topckgen driver if clock-parent is not defined. This is the case for upstream DTSI that doesn't provide this entry. This is needed for infracfg driver that will make use of the unified gates + muxes implementation. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-01clk: mediatek: add support for gate clock to reference topckgen clockChristian Marangi
Add support for gate clock get_rate to reference topckgen clock for infracfg-ao implementation. In infracfg-ao implementation topckgen is on second level of parent with infracfg in the middle. To correctly detect this, check the driver of the dev parent and use the second level parent if it's not mtk_clk_topckgen. Due to all the dependency, parent tree must be filled before a gate is used, hence is safe to assume it will be there. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-01clk: mediatek: add support for parent mux from different source for topckgenChristian Marangi
As done for infracfg, also add support for parent mux from different source for topckgen. This is needed as upstream linux doesn't use 1/1 factor and use directly the APMIXED clocks. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-01clk: mediatek: add support for parent mux from different sourceChristian Marangi
There is a current limitation where parents for a mux can be all declared as they are from a common source. This is not true as there are some MUX that can have parent from both infracfg or from topckgen. To handle this, implement a new flag for the mux, CLK_PARENT_MIXED, and a new entry for the mux parent_flags. To use this, CLK_PARENT_MIXED must be used and parent_flags will be used instead of the parent variable. Entry in parent_flags are just a struct of ID and flags where it will be defined where that parent comes from with the usage of CLK_PARENT_INFRASYS or CLK_PARENT_TOPCKGEN. This permits to have MUX with parents from infracfg or topckgen. Notice that with CLK_PARENT_MIXED applied the CLK_BYPASS_XTAL is ignored. With CLK_PARENT_MIXED declare CLK_PARENT_XTAL for the relevant parent instead. Also alias for the CLK_PARENT macro are provided to better clear their usage. CLK_PARENT_MIXED require these alias that describe the clk type to be defined in the clk_tree flags to prevent clk ID clash from different subsystem that may have equal clk ID. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-01clk: mediatek: add support for gate ID at offsetChristian Marangi
Add support to clk_gate ops to reference the clk ID at an offset by using the just introduced gates_offs value from the unified muxes + gates implementation. Gate clock that doesn't have gates_offs set won't be affected as the offset will simply be 0 and won't be offset of any value. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-01clk: mediatek: add support for gates in clk_tree for infrasysChristian Marangi
Add support for gates in clk_tree for infrasys ops. Infracfg clks can have a sum of gates and muxes, and current solution handle this by duplicating the driver and split clks for mux and clks for gates. Upstream linux kernel handle this differently and doesn't have this distinction. To be closer to the upstream kernel clock definition, implement additional logic to have gates defined in the clk_tree and implement variant for the infrasys ops to handle gates defined in the tree. Similar to how it's done with factor and mux, we introduce gates_offs. Upstream kernel follow the similar logic with all the ID defined as FDIVS, MUXES and finally GATES. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-01clk: mediatek: return XTAL rate for infrasys get_mux_rateChristian Marangi
We currently return 0 if XTAL rate is requested in get_mux_rate. This deviates from what is done in get_factor_rate and is totally wrong as it can cause unwanted results (division by 0 crash) For infrasys that makes use of CLK_XTAL, assume xtal_rate to be defined in clk_tree and return the rate when BYPASS_XTAL is not enabled with clk ID 0 index parents. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-01clk: mediatek: return XTAL rate directly for gates with XTAL parentChristian Marangi
There is currently a massive bug that makes any gate clk that have CLK_XTAL as parent to return the wrong clock. Following the code, with CLK_XTAL defined as TOPCKGEN parent, the topckgen get_rate is called. The clk ID (0) is parsed and only in some corner case (scenario where fixed clock are not defined) the correct XTAL rate will be returned as get_factor or get_mux is called (that have correct handling for CLK_XTAL). With fixed clock defined, the rate that will be returned will always be the FIRST ELEMENT of the fixed clock table instead of the hardcoded XTAL rate. To handle this, add additional logic and if the flag is set to PARENT_XTAL for the gate, return the XTAL rate directly. We assume the clk_tree to have xtal_rate defined with clk gates that have XTAL as parents. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-01net: dwc_eth_qos: mdio: Implement clause 45Philip Oberfichtner
Bevor this commit, only clause 22 access was possible. After this commit, clause 45 direct access will available as well. Note that there is a slight change of behavior: Before this commit, the C45E bit was set to whatever value was left in the register from the previous access. After this commit, we adopt the common practice of discerning C45 from C22 using the devad argument. Signed-off-by: Philip Oberfichtner <pro@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
2024-07-31Merge tag 'video-20240731' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-video - improve video sync performance with background syncing (cyclic) - fix dropping characters when pasting commands over the UART - enable background syncing by default for boards using VIDEO - make sandbox video more responsive
2024-07-31Merge patch series "Endian Kconfig improvements"Tom Rini
Jiaxun Yang <jiaxun.yang@flygoat.com> says: This is a subset of my previous arm64_be work. I wish this could be merged first so it would be easier to work against xtensa and arm64 be support.
2024-07-31config: Use CONFIG_SYS_BIG_ENDIAN in code whenever possibleJiaxun Yang
So CONFIG_SYS_BIG_ENDIAN is our cross architecture option for selecting machine endian, while the old CONFIG_CPU_BIG_ENDIAN is defined by Arc only. Use it whenever possible to ensure big endian code path is enabled for all possible big endian machines. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
2024-07-31sandbox: Drop video-sync in serial driverSimon Glass
With sandbox, when U-Boot is waiting for input it syncs the video display, since presumably the user has finished typing. Now that cyclic is used for video syncing, we can drop this. Cyclic will automatically call the video_idle() function when idle. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-31video: Use cyclic to handle video syncSimon Glass
At present U-Boot flushes the cache after every character written to the display. This makes the command-line slower, to the point that pasting in long strings can fail. Add a cyclic function to sync the display every 10ms. Enable this by default. Allow much longer times for sandbox, since the SDL display is quite slow. Avoid size growth if the feature is disabled by making the new init and destroy functions dependent on CYCLIC being enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-31video: Move last_sync to private dataSimon Glass
Rather than using a static variable, use the video device's private data to remember when the last video sync was completed. This allows each display to have its own sync and avoids using static data in SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
2024-07-31cyclic: Add a symbol for SPLSimon Glass
The cyclic subsystem is currently enabled either in all build phases or none. For tools this should not be enabled, but since lib/shc256.c and other files include watchdog.h in the host build, we must make sure that it is not enabled there. Add an SPL symbol so that there is more control of this. Add an include into cyclic.h so that tools can include this file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Devarsh Thakkar <devarsht@ti.com> Reviewed-by: Stefan Roese <sr@denx.de>
2024-07-31dm: use list_count_nodes() for counting list nodesSughosh Ganu
The linux kernel has the list_count_nodes() API functions which is used for counting nodes of a list. This has now been imported in U-Boot as part of an earlier commit. Use this function and drop the list_count_items(). Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-07-30Merge patch series "led: implement software blinking"Tom Rini
Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> says: v2 changes: * Drop sw_blink_state structure, move its necessary fields to led_uc_plat structure. * Add cyclic_info pointer to led_uc_plat structure. This simplify code a lot. * Remove cyclic function search logic. Not needed anymore. * Fix blinking period. It was twice large. * Other cleanups. v3 changes: * Adapt code to recent cyclic function changes * Move software blinking functions to separate file * Other small changes v4 changes: * Refactoring of led_set_period() function v5 changes * Fix compilation if CONFIG_LED_BLINK is not defined v6 changes: * Enable LEDST_BLINK state unconditionally. * Function led_set_period() becomes available when CONFIG_LED_BLINK is disabled. This makes led code simpler. * Software blinking requires about 100 bytes of data for a led. It's not a good idea to allocate so much memory for each supported led. Change the code to allocate blinking data only for required leds.
2024-07-30led: Add dts property to specify blinking of the ledMichael Polyntsov
The standard property linux,default-trigger = "pattern"; used to get an effect. No blinking parameters can be set yet. Signed-off-by: Michael Polyntsov <michael.polyntsov@iopsys.eu> Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-07-30led: Implement software led blinkingMichael Polyntsov
If hardware (or driver) doesn't support leds blinking, it's now possible to use software implementation of blinking instead. This relies on cyclic functions. Signed-off-by: Michael Polyntsov <michael.polyntsov@iopsys.eu> Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-07-30led: enable LEDST_BLINK state unconditionallyMikhail Kshevetskiy
Changes: * enable LEDST_BLINK state unconditionally * function led_set_period() becomes available when CONFIG_LED_BLINK is disabled. This makes led code simpler. * fix cmd/led.c to work properly when LEDST_BLINK present, but CONFIG_LED_BLINK is disabled Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Reviewed-by: Simon Glass <sjg@chromium.org>
2024-07-26Merge branch 'qcom-main' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-snapdragon * Qualcomm platforms >~2016 gain support for the RPMh (Resource Power Manager) peripheral which is used to control most regulators. The RB5 is now able to power up its USB VBUS regulator via the rpmh regulator driver. Git history from the original Linux driver is preserved for ease of maintenance. * IPQ40xx SoCs gain ethernet networking support via the new ESS EDMA driver.
2024-07-26net: add Qualcomm ESS EDMA adapterRobert Marko
This adds the driver for the ESS EDMA ethernet adapter found inside of Qualcomm IPQ40xx SoC series. This driver also integrates the built in modified QCA8337N switch support as they are tightly integrated. Co-Developed-by: Gabor Juhos <j4g8y7@gmail.com> Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2024-07-26clock: qcom: ipq4019: add missing networking resetsRobert Marko
IPQ4019 has more networking related resets that will be required for future wired networking support, so lets add them. This syncs the driver with Linux. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26clock: qcom: ipq4019: add ESS clockRobert Marko
ESS clock is the Ethernet Subsystem clock, so lets add it as its already configured by SBL1. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
2024-07-26power: regulator: qcom-rpmh-regulator: add build infraCaleb Connolly
Add Kconfig and Makefile entries for this driver now that it can build for U-Boot. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26power: regulator: qcom-rpmh-regulator: adjust probe for U-BootCaleb Connolly
Refactor initialization to use U-Boot's driver model and API. Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26power: regulator: qcom-rpmh-regulator: port ops to U-BootCaleb Connolly
Port over the regulator ops to U-Boot's regulator API. Add back the pmic5 mode map using U-Boot dm_regulator_mode API and adjust the pmic5_pldo and pmic5_pldo_lv definitions. No functional changes. Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26power: regulator: qcom-rpmh-regulator: remove unused regulatorsCaleb Connolly
Initially just include the few regulators needed for the RB5 board. Others can be added back as-needed. Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26power: regulator: qcom-rpmh-regulator: adjust structs for U-BootCaleb Connolly
Switch to our linear_range helpers and remove unused/unsupported linux-isms. Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26power: regulator: qcom-rpmh-regulator: port over lineage_range helpersCaleb Connolly
Import struct linear_range() and builder macro from Linux regulator core. Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26power: regulator: qcom-rpmh-regulator: adjust headers for U-BootCaleb Connolly
Remove unused/unsupported Linux headers and add necessary U-Boot ones. Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26power: regulator: import qcom-rpmh-regulator from LinuxCaleb Connolly
Import the driver from Linux 6.10-rc6. Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26soc: qcom: add build infrastructureCaleb Connolly
Add Kconfig / Makefiles to build rpmh and cmd-db drivers. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26soc: qcom: rpmh: U-Boot API changesCaleb Connolly
Fix build errors, add some debug logging. Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26soc: qcom: rpmh: drop unused functionsCaleb Connolly
A lot of the features in here are only relevant when running multi-threaded with interrupts. Drop everything except what we need to run single-threaded with a single TCS (which is all the rpmh-rsc framework in U-Boot supports). Keep rpmh_write_async() for simplicity and make it wrap the regular rpmh_write(). Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26soc: qcom: rpmh: adjust headers for U-BootCaleb Connolly
Drop unused/unsupported Linux headers and add dm/device.h for U-Boot. Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26soc: qcom: rpmh-rsc: remaining U-Boot API changesCaleb Connolly
Minor adjustments to fix building with U-Boot and work correctly as a synchronous driver without interrupts. RPMh is fast enough that we can get away with just firing off requests and assuming they complete. U-Boot behaviour changes are annotated with a "U-Boot:" comment. Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26soc: qcom: rpmh-rsc: adjust probe for U-BootCaleb Connolly
Rework the rpmh-rsc initialization to use U-Boot's driver model and initialize cmd-db. Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26soc: qcom: rpmh-rsc: adjust headers for U-BootCaleb Connolly
Remove unsupported / unused Linux headers and add those needed for U-Boot. Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26soc: qcom: rpmh-rsc: drop unused multi-threading and non-active TCS supportCaleb Connolly
Since U-Boot is single threaded, we can avoid most of the complexity that comes with handling more than one in-flight TCS. Drop all the rpmh code associated with multi-threading as we'll instead wait for a response on each TCS. Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-07-26soc: qcom: cmd-db: adjust for U-Boot APICaleb Connolly
Keep the header pointer in the .data section so we don't initialize it again after relocation, adjust cmd_db_get_header() to work with the U-Boot API, and skip validating the header since all cmd-db users are children of the rpmh-rsc and those children will only probe if cmd-db initializes successfully. Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>