summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)Author
2025-03-10Merge tag 'v2025.04-rc4' into nextTom Rini
This uses Heinrich's merge of lib/efi_loader/efi_net.c which results in no changes.
2025-03-10usb: gadget: Remove the legacy usbtty driverTom Rini
The lone user of this driver has been removed for some time. Remove this driver as well. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Link: https://lore.kernel.org/r/20250227205101.4127604-2-trini@konsulko.com Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-03-10usb: gadget: Remove final remnants of CONFIG_USB_DEVICETom Rini
The lone user of the legacy USB device framework have been removed for some time. Remove the final parts of the code that were missed. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Link: https://lore.kernel.org/r/20250227205101.4127604-1-trini@konsulko.com Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-03-05Merge tag 'xilinx-for-v2025.04-rc4' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze AMD/Xilinx changes for v2025.04-rc4 Zynq: - Guard code around SPL_FS_LOAD_PAYLOAD_NAME Versal*: - Remove tftp block size 4096 Versal: - Use clocks per DT binding - Store driver data in data section Versal Gen 2: - Fix major/minor version decoding
2025-03-04led: Fix next Coverity scan errorHeiko Schocher
The following was reported by Coverity scan: *** CID 542488: Control flow issues (NO_EFFECT) /drivers/led/led-uclass.c: 277 in led_get_function_name() 271 return uc_plat->label; 272 273 /* Now try to detect function label name */ 274 func = dev_read_string(dev, "function"); 275 cp = dev_read_u32(dev, "color", &color); 276 // prevent coverity scan error CID 541279: (TAINTED_SCALAR) >>> CID 542488: Control flow issues (NO_EFFECT) >>> This less-than-zero comparison of an unsigned value is never true. "color < 0U". 277 if (color < LED_COLOR_ID_WHITE || color >= LED_COLOR_ID_MAX) 278 cp = -EINVAL; 279 Fix it. Addresses-Coverity-ID: 542488 Link: https://lists.denx.de/pipermail/u-boot/2025-February/581567.html Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-03-04gpio: 74x146: depend on DM_SPIJ. Neuschäfer
Currently, Kconfig allows building CONFIG_DM_74X164 without CONFIG_DM_SPI, which results in linker errors because this driver actually uses dm_spi_* functions: drivers/gpio/74x164_gpio.o: in function `gen_74x164_write_conf': undefined reference to `dm_spi_claim_bus' undefined reference to `dm_spi_xfer' undefined reference to `dm_spi_release_bus' Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
2025-03-04Revert "dm: core: Simplify dm_probe_devices()"Simon Glass
Unfortunately this change was not safe as some devices are bound before relocation, but we don't want to probe them. It causes 'raise: Signal # 8 caught' on jerry. Move the bootstage timer to after autoprobe in initf_dm() since the trace test does not tolerate any variance. This reverts commit 21dd873572a01d74bfdfceb7a30b056f8ccba187. Signed-off-by: Simon Glass <sjg@chromium.org>
2025-03-03arm64: versal2: Show major and minor silicon versionMichal Simek
ES1 silicon is 0x10 (16) and production is 0x20 (32) but correct number to see are v1.0 or v2.0 instead of v16 or v32. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20095339334fe07f373ffae3bdbfec51f5a00dc7.1739882585.git.michal.simek@amd.com
2025-03-03clk: versal: Store driver data in data sectionPadmarao Begari
Line 171 in README is describing that before relocation no code should use global variable because global variables are placed to BSS section which is initialized to 0 after relocation. On Versal platforms clock driver is initialized before relocation (via using dm,bootph-all flag in DT) and global variables are initialized which works if this is used only before relocation. But the variables are used after relocation too but values are zeroed which is ending up incorrect behavior. That's why place variables to data section to ensure that values are not cleared which is for now the quickest temporary solution. The correct way to do it is to move all global variables to private data to avoid it. Signed-off-by: Padmarao Begari <padmarao.begari@amd.com> Link: https://lore.kernel.org/r/20250218052419.1141139-1-padmarao.begari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-03-03clk: versal: Update the reference clocks as per bindingsVenkatesh Yadav Abbarapu
As per the bindings the reference clocks naming has changed from "pl_alt_ref_clk" to "pl_alt_ref" and "ref_clk" to "ref". Update the same in the clock driver. Also add the fallback option for older DT bindings. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20250206091533.1447234-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-03-03crypto: fsl_hash: fix flush dcache alignment in caam_hash()Benjamin Lemouzy
Loading a FIT kernel image with hash hardware acceleration enabled (CONFIG_SHA_HW_ACCEL=y) displays the following CACHE warning: [...] Trying 'kernel-1' kernel subimage [...] Verifying Hash Integrity ... sha256CACHE: Misaligned operation at range [16000128, 1673fae8] [...] Trying 'ramdisk-1' ramdisk subimage [...] Verifying Hash Integrity ... sha256CACHE: Misaligned operation at range [1676d6d4, 1737a5d4] [...] Trying 'fdt-imx6q-xxx.dtb' fdt subimage [...] Verifying Hash Integrity ... sha256CACHE: Misaligned operation at range [1673fbdc, 1674b0dc] [...] This patch fixes it. Tested on: - i.MX 6 custom board - LS1021A custom board Signed-off-by: Benjamin Lemouzy <blemouzy@centralp.fr> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-03-03net: tsec: Re-arm packet buffer in error caseJ. Neuschäfer
When an error is detected in the TSEC receive path, the driver currently prints an error message, but leaves the corresponding packet descriptor in its old state (i.e. owned by the CPU side). As a result, the packet queue can be starved of available buffers if enough errors happen. To recover from errors, re-arm the packet buffer descriptor after an error has been detected. Errors can be provoked by changing a PHY with phy-mode = "rgmii-id" to phy-mode = "rgmii". Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-03-03net: tsec: Reorder tsec_recv and tsec_free_pktJ. Neuschäfer
This is necessary for the following patch. No functional change. Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-02-28Merge patch series "boards: siemens: iot2050: SM variant, sysinfo support, ↵Tom Rini
fixes & cleanups" Baocheng Su <baocheng.su@siemens.com> says: This introduces a sysinfo driver which also permits SMBIOS support. The first 10 patches of v2 have already been applied. The remaining is solely the sysinfo driver. To maintain consistency and ease of searching through the history, the series title remains unchanged. Link: https://lore.kernel.org/r/20250218023614.52574-1-baocheng.su@siemens.com
2025-02-28sysinfo: Add driver for IOT2050 boardsBaocheng Su
This brings a sysinfo driver and DT entry for the IOT2050 board series. It translates the board information passed from SE-Boot to SPL into values that can be retrieved via the sysinfo API. Will is already used to fill the SMBIOS table when booting via EFI. Signed-off-by: Baocheng Su <baocheng.su@siemens.com> Signed-off-by: Li Hua Qian <huaqian.li@siemens.com> [Jan: split-off as separate patch, cleanup] Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2025-02-28sysinfo: Add API for accessing data elementsBaocheng Su
This commit introduces a new API to the sysinfo module, allowing access to data elements. This is particularly useful for handling data with multiple instances, such as MAC addresses. Signed-off-by: Baocheng Su <baocheng.su@siemens.com>
2025-02-28dma: ti: k3-udma: Avoid Memory leak issues during dma memcpyPrasanth Babu Mantena
During dma memcpy, bcdma descriptor gets allocated for each transaction and not freed after completion of that transaction. So, avoid the memory allocation for every transaction. Add one descriptor per dma device and allocate it once in resource setup. This descriptor can now be used for all dma memcpy transactions optimally. Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
2025-02-28serial: ns16550: Fix pointer type mismatchJ. Neuschäfer
serial_out_dynamic() takes a u8* addr and uses it for 8-bit or 32-bit accesses, depending on the value of plat->reg_width. This results in a pointer type mismatch that the compiler may even turn into an error: drivers/serial/ns16550.c: In function ‘serial_out_dynamic’: drivers/serial/ns16550.c:115:42: error: passing argument 1 of ‘out_be32’ from incompatible pointer type [-Wincompatible-pointer-types] 115 | out_be32(addr, value); | ^~~~ | | | u8 * {aka unsigned char *} This error was observed on PowerPC. Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
2025-02-28mtd: mtdpart: Support MTD_SIZE_REMAINING with unallocated memory areaAlexander Stein
If there is an unallocated memory area before the last, filling parting the size calculation for MTD_SIZE_REMAINING does not take this hole into account. Fix this by calculating the remaining size just based on total size and partition offset. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
2025-02-28clk: rockchip: Correct usage of IS_ENABLED() macroTom Rini
These two files were using IS_ENABLED() to test for CONFIG flags but omitted the CONFIG_ prefix and so did not work as expected. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-02-26net: miiphybb: Drop bb_miiphy_buses and bb_miiphy_buses_numMarek Vasut
Neither bb_miiphy_buses nor bb_miiphy_buses_num are used anymore. Drop both of them. Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-26net: sh_eth: Drop use of miiphy_get_dev_by_name()Marek Vasut
Instead of doing another lookup, trivially access the struct mii_dev embedded in struct bb_miiphy_bus . No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-02-26net: ravb: Drop use of miiphy_get_dev_by_name()Marek Vasut
Instead of doing another lookup, trivially access the struct mii_dev embedded in struct bb_miiphy_bus . No functional change. Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-26net: miiphybb: Drop name field from struct bb_miiphy_busMarek Vasut
The struct bb_miiphy_bus embeds struct struct mii_dev, which already contains one copy of name field. Drop the duplicate top level copy of name field. The a38x code does static assignment of disparate names, use snprintf(...) to fill in matching name in probe to avoid any breakage. Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-26net: miiphybb: Use container_of() in bb_miiphy_getbus()Marek Vasut
Replace the name based look up in bb_miiphy_getbus() with trivial container_of() call. This works because the struct bb_miiphy_bus always embeds the matching struct mii_dev . This also makes the code much simpler and more efficient. Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-26net: designware: Allocate bb_miiphy using bb_miiphy_alloc() and fill in ↵Marek Vasut
callbacks Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks currently listed in bb_miiphy_buses[] array. This is a temporary duplication of assignment to avoid breakage, which will be removed in follow up patches. At this point, the bb_miiphy callbacks can reach these accessors by doing container_of() on struct mii_dev. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-02-26net: sh_eth: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacksMarek Vasut
Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks currently listed in bb_miiphy_buses[] array. This is a temporary duplication of assignment to avoid breakage, which will be removed in follow up patches. At this point, the bb_miiphy callbacks can reach these accessors by doing container_of() on struct mii_dev. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-02-26net: ravb: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacksMarek Vasut
Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks currently listed in bb_miiphy_buses[] array. This is a temporary duplication of assignment to avoid breakage, which will be removed in follow up patches. At this point, the bb_miiphy callbacks can reach these accessors by doing container_of() on struct mii_dev. Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-26net: miiphybb: Introduce bb_miiphy_alloc()/bb_miiphy_free() wrappersMarek Vasut
Introduce bb_miiphy_alloc()/bb_miiphy_free() wrappers to allocate and free struct bb_miiphy_bus. Make struct bb_miiphy_bus wrap struct mii_dev, which will become useful later in bb_miiphy_bus accessors, which would be able to access struct bb_miiphy_bus using container_of, even if the PHY stack only passes in the inner struct mii_dev . Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-26net: designware: Extract bbmiiphy initialization into dedicated functionMarek Vasut
Pull the bbmiiphy initialization code from designware_eth_probe() into dedicated function, dw_bb_mdio_init(), just like all the other MDIO initialization functions. Keep check for "snps,bitbang-mii" in the designware_eth_probe(), so the driver can initialize this MDIO only in case the property is present, and initialize regular DW MDIO in case it is not present. The dw_bb_mdio_init() allocates its own MDIO instance, because thus far code gated behind "snps,bitbang-mii" did depend on allocation of MDIO bus by the other two MDIO bus options and then rewrote the newly allocated MDIO bus callbacks, which is wrong, instead allocate proper MDIO bus with the correct callbacks outright. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-02-26net: designware: Drop bus indexMarek Vasut
There is literally one single bbmiiphy bus in this driver, remove the bus index handling. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-02-26net: miiphybb: Drop bb_miiphy_init() and .init callbackMarek Vasut
The .init callback is not called by any function, drop it. There are no more users of the init callback, drop the entire mechanism. Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-26net: designware: Reorder bb_miiphy functionsMarek Vasut
Move the bb_miiphy functions before MDIO registration. This is a preparatory patch, the functions will be referenced around the MDIO registration in the follow up patches. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-02-26net: sh_eth: Reorder bb_miiphy functionsMarek Vasut
Move the bb_miiphy functions before MDIO registration. This is a preparatory patch, the functions will be referenced around the MDIO registration in the follow up patches. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-02-26net: ravb: Reorder bb_miiphy functionsMarek Vasut
Move the bb_miiphy functions before MDIO registration. This is a preparatory patch, the functions will be referenced around the MDIO registration in the follow up patches. No functional change. Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-26net: designware: Drop NULL priv assignmentMarek Vasut
This is unnecessary, the unset structure member is initialized to NULL by default, drop the assignment. Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-26net: sh_eth: Drop empty init callbackMarek Vasut
The init function does nothing, the bb_miiphy_init() already checks whether the .init callback is assigned, and if not, skips calling it. Remove the empty init function. The entire init callback will be removed in follow up patches. Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-26net: ravb: Drop empty init callbackMarek Vasut
The init function does nothing, the bb_miiphy_init() already checks whether the .init callback is assigned, and if not, skips calling it. Remove the empty init function. The entire init callback will be removed in follow up patches. Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-26pinctrl: qcom: sm8250: fix pin countCaleb Connolly
The pin count wasn't updated when the special pins were added, as a result it was never possible to configure the special pins on SM8250 boards. Fix the pin count and allow the special pins to be configured. This fixes sdcard support on the RB5. Fixes: 58fa52042471 ("pinctr: qcom: sm8250: add special pins pins configuration data") Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-02-26power: regulator: add additional supported LDOs for pm8150lCaleb Connolly
Add the other LDOs that our rpmh driver can currently support. Some of these are used on the RB5 to power the sdcard. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-02-26clk: stub: add sm8150 compatible idJulius Lehmann
Add support for sm8150 clock controller to clk stub driver. Signed-off-by: Julius Lehmann <lehmanju@devpi.de> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-02-26clk: add stub clock driverCaleb Connolly
Add a stub clock driver which can be used to bind clock controllers which aren't required for the platform to boot, but which are needed for U-Boot drivers to work. In addition, add a NOP parent driver to allow for binding the parent nodes of the clock. Initially this driver supports a Qualcomm platform where the MMC driver tries to fetch the RPM clock controller, which is not actually required for the device to work. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-02-25Merge tag 'u-boot-socfpga-next-20250225' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-socfpga into next CI: https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/24816 Please pull the SoCFPGA changes for next from u-boot-socfpga, containing boot support for the Altera SoCFPGA Agilex 5 platform in U-Boot. The changes include: 1. Board-specific configurations and setup required to enable Agilex 5 operation in U-Boot. 2. Integration of cache coherency unit (CCU) initialization routine, including CCU conguration in DT. 3. Clock, firewall (configured in DT), SMMU, low level initialization specific to Agilex 5. 4. Integration of memory initialization routine, including DDR setup. This patch set has been tested on Agilex 5 devkit with QSPI boot (UBI/UBIFS) and RAM boot (TFTP & ARM DS debugger).
2025-02-25ddr: altera: Add DDR driver for Agilex5 seriesTingting Meng
Adding DDR driver support for Agilex5 series. Signed-off-by: Tingting Meng <tingting.meng@altera.com>
2025-02-25drivers: clk: agilex5: Set PLL to asynchronous modeAlif Zakuan Yuslaimi
PLL frequency would overshoot from the original target in synchronous mode during low VCC voltage condition. To resolve this issue, PLL is set to run on asynchronous mode instead of enabling synchronous mode in the clock driver. Signed-off-by: Muhammad Hazim Izzat Zamri <muhammad.hazim.izzat.zamri@altera.com> Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2025-02-25drivers: clk: agilex5: Replace status polling with wait_for_bit_le32()Alif Zakuan Yuslaimi
Replace cm_wait_for_fsm() function with wait_for_bit_le32() function which supports accurate timeout. Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2025-02-25drivers: clk: agilex5: Configure intosc as boot_clk sourceAlif Zakuan Yuslaimi
Some customers prefer to minimize the use of external oscillators, especially when using the FPGA first configuration mode. By enabling the configuration of the HPS internal oscillator as the boot_clk source instead of the default external oscillator, (HPS_OSC_CLK) in non-secure boot scenarios, this allows them to eliminate the need for an additional oscillator device and a dedicated HPS pin, simplifying board layout and routing. Signed-off-by: Tingting Meng <tingting.meng@altera.com> Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2025-02-24Merge tag 'v2025.04-rc3' into nextTom Rini
Prepare v2025.04-rc3
2025-02-24mmc: Fix size calculation for sector addressed MMC version 4Marek Vasut
For eMMC v4 and newer that is smaller than 2 GiB, the JEDEC JESD84-B51 section 6.2.4 Configure partitions indicates that EXT_CSD SEC_COUNT should not be used to determine device size, and instead device size should be calculated from C_SIZE and C_SIZE_MULT. This is not exactly accurate, the 2 GiB limit is not a hard line, there are eMMC devices which are smaller than 2 GiB and still require device size to be determined from EXT_CSD SEC_COUNT. The hard line is instead OCR HCS bit, which indicates whether the device is byte or sector addressed, the former applies to most devices below 2 GiB, and the later applies mostly to devices above 2 GiB. However, there are a couple of devices which are smaller than 2 GiB and still set the OCR HCS bit to indicate they are sector addressed, and therefore the size calculation for those devices should also use EXT_CSD SEC_COUNT . Use mmc->high_capacity flag to discern the devices instead of arbitrary 2 GiB limit. The mmc->high_capacity flag reflects the OCR HCS bit state. Fixes: 639b7827d1ca ("mmc: fix the condition for MMC version 4") Signed-off-by: Marek Vasut <marex@denx.de>
2025-02-21remoteproc: k3-dsp: Flush D cache after loading firmwareUdit Kumar
Memory region used by remote cores was set to non-cached region but commit 7c9c6e192580 ("arm: mach-k3: Merge initial memory maps") makes all memory region as cached, unified across K3 devices. This causes inconsistency while booting remote cores on devices, due to cache incoherency between remote core and boot code. So to make this operation coherent, cache the address and len while loading ELF program headers to memory and flush that region in the next cycle of load. Signed-off-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-07 16:46:14 +0000