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2021-02-24virtio: fix off by one device id comparisonVincent Stehlé
VIRTIO_ID_MAX_NUM is the largest device ID plus 1. Therefore a device id cannot be greater or equal to VIRTIO_ID_MAX_NUM. Fix the comparison accordingly. Fixes: 8fb49b4c7a82 ("dm: Add a new uclass driver for VirtIO transport devices") Signed-off-by: Vincent Stehlé <vincent.stehle@laposte.net> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
2021-02-23Merge tag 'xilinx-for-v2021.04-rc3' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
2021-02-23spi: zynqmp_gqspi: fix set_speed bug on multiple runsBrandon Maier
If zynqmp_qspi_set_speed() is called multiple times with the same speed, then on the second call it will skip recalculating the baud_rate_val as it assumes the speed is already configured correctly. But it will still write the baud_rate_val to the configuration register and call zynqmp_gqspi_set_tapdelay(). Because it skipped recalculating the baud_rate_val, it will use the initial value of 0 . This causes the driver to run at maximum speed which for many spi flashes is too fast and causes data corruption. Instead only write out a new baud_rate_val if we have calculated the correct baud_rate_val. This opens up another issue with the "if (speed == 0)", we don't save off the new plat->speed_hz value when setting the baud rate on the speed=0 path. Instead mimic what the Linux zynqmp gqspi driver does, and have speed==0 just use the same calculation as a normal speed. That will cause the baud_rate_val to use the slowest speed possible, which is the safest option. Signed-off-by: Brandon Maier <brandon.maier@rockwellcollins.com> CC: jagan@amarulasolutions.com CC: michal.simek@xilinx.com CC: Ashok Reddy Soma <ashokred@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23net: gem: Fix error path in zynq_gem_probeMichal Simek
Clean up error path in connection where priv->rxbuffers and priv->tx_bd are allocated. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23net: gem: Enable ethernet rx clock for versalT Karthik Reddy
Enable rx clock along with tx clock for versal platform. Use compatible data to enable/disable clocks in the driver. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-02-23i2c: i2c_cdns: Enable i2c clockT Karthik Reddy
Enable i2c controller clock from driver probe function by calling clk_enable(). Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-02-23clk: versal: Add support to enable clocksT Karthik Reddy
Add clock enable functionality in versal clock driver to enable clocks from peripheral drivers using clk_ops. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23clk: zynqmp: Add support to enable clocksT Karthik Reddy
Add clock enable functionality in zynqmp clock driver to enable clocks from peripheral drivers using clk_ops. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23clk: zynq: Add dummy clock enable functionMichal Simek
A lot of Xilinx drivers are checking -ENOSYS which means that clock driver doesn't have enable function. Remove this checking from drivers and create dummy enable function as was done for clk_fixed_rate driver by commit 6bf6d81c1112 ("clk: fixed_rate: add dummy enable() function"). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-23fpga: zynqpl: fix buffer alignmentMichael Walle
Due to pointer arithmetic, "sizeof(u32) * ARCH_DMA_MINALIGN" is subtracted. It seems that the original intention was to just subtract ARCH_DMA_MINALIGN. Fix it. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-02-22Merge tag 'u-boot-amlogic-20210222' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - adds adc-keys button driver - fix meson-saradc driver to get reference voltage - add adc-keys test for sandbox - enable adc-keys for VIM3 & VIM3L boards - fix button.h build
2021-02-22Merge tag 'ti-v2021.04-rc3' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Fix ethernet on J721e - Sync am335x DT nodes from Linux 5.9-rc7 - Minor Clock fixes
2021-02-22Merge tag 'video-for-v2021.04-rc3' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-video - splash_source warning fix when building with 64-bit toolchains - lq123p1jx31 and nv101wxmn51 compatible in simple panel driver - remove not used mb862xx driver - add Himax HX8238D panel driver - s/video_uc_platdata/video_uc_plat/
2021-02-22clk: ti: improve debug messages for clkctrl driverDario Binacchi
The previous version printed the same debug message for both the enable and disable routines without highlighting whether you were enabling or disabling the module. It is now clear whether you are enabling or disabling the module. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-02-21uec.h: fix COFIG_DM typoRasmus Villemoes
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-02-21dm_qe_uec.c: fix indentation in uec_set_mac_if_mode()Rasmus Villemoes
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-02-21Merge tag 'for-v2021.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2cTom Rini
i2c changes for v2021.04 new feature: - Allow disabling driver model for I2C in SPL fixes: - i2c-gpio: Fix GPIO output - at91: fix crash when using 'i2c probe'
2021-02-21dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIOIgor Opaniuk
Use CONFIG_IS_ENABLED() macro, which provides more convenient way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs for both SPL and U-Boot proper. CONFIG_IS_ENABLED(DM_I2C) expands to: - 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y', - 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y', - 0 otherwise. All occurences were replaced automatically using these bash cmds: $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} + $ find . -type f -exec sed -i 's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + $ find . -type f -exec sed -i 's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} + Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-21dm: i2c: allow disabling driver model in SPLIgor Opaniuk
At present if U-Boot proper uses driver model for I2C, then SPL has to also. While this is desirable, it places a significant barrier to moving to driver model in some cases. For example, with a space-constrained SPL it may be necessary to enable CONFIG_SPL_OF_PLATDATA which involves adjusting some drivers. This patch introduces a separate Kconfig symbols for enabling DM_I2C and DM_I2C_GPIO support in SPL. This will also help to get away from dirty workarounds to achieve non-DM I2C support for SPL, which is currently used in some board header files like: ifdef CONFIG_SPL_BUILD undef CONFIG_DM_I2C endif Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-02-21i2c: at91: fix crash when using 'i2c probe'Eugen Hristev
When issuing 'i2c probe', the driver was crashing, because at probe there is a request with zero length buffer to write to i2c bus. The xfer_msg function assumes the buffer is always there, and never checks for the buffer length. => i2c dev 0 Setting bus to 0 => i2c probe Valid chip addresses: data abort pc : [<7ffa97dc>] lr : [<7ffa96f8>] reloc pc : [<66f277dc>] lr : [<66f276f8>] sp : 7fb7c110 ip : 7ff87a28 fp : 7ff99938 r10: 00000002 r9 : 7fb7dec0 r8 : 00000000 r7 : e181c600 r6 : 7fb88c20 r5 : 00000000 r4 : 7fb7c128 r3 : 00000000 r2 : 00000001 r1 : 00000000 r0 : 00000009 Flags: nZCv IRQs off FIQs off Mode SVC_32 Code: eb0092f4 e1a00005 e8bd81f0 e594300c (e5d33000) Resetting CPU ... Fixes: 8800e0fa20 ("i2c: atmel: add i2c driver") Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-02-21i2c: i2c-gpio: Fix GPIO outputHarm Berntsen
The dm_gpio_set_dir_flags function cannot be used to update the configuration of a GPIO pin because it does a bitwise OR with the existing flags. Looks like commit 788ea834124b ("gpio: add function _dm_gpio_set_dir_flags") has introduced this behaviour and the i2c-gpio driver has been broken since. Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com> CC: Heiko Schocher <hs@denx.de> CC: Patrick Delaunay <patrick.delaunay@st.com>
2021-02-20pci: renesas: Fix BAR mapping on Gen3Marek Vasut
Because the first PCIExAR(n) register is configured with the mapping, It is the second PCIExAR(n) register that must be written with 0, not the last one. Update the n from 4 to 1 to select the correct register. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2021-02-20pci: renesas: Make map address and mask power of two on Gen3Marek Vasut
Both the map address and mask must be power of two per documentation, adjust the code accordingly. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2021-02-20pci: renesas: Add root bus handling on Gen3Marek Vasut
Add code to access the PCIe root bus space and configure it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2021-02-19drivers: video: Add Support for Himax HX8238D PanelMoses Christopher
* SPI based initialization for HX8238D * Resolution: 320x240 * Color-Mode: RGB * Initial Work is done by Sjoerd Simons https://gitlab.apertis.org/packaging/u-boot/-/blob\ /5f259720e3e64965d50da89a841ad6eb256a47df/debian/patches\ /apertis/powertools/0005-video-Add-Himax-HX8238-D-driver.patch * Tested on Bosch Guardian Board Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
2021-02-19Replace video_uc_platdata with video_uc_platDario Binacchi
The video_uc_platdata structure no longer exists. It has been renamed video_uc_plat. Signed-off-by: Dario Binacchi <dariobin@libero.it>
2021-02-19video: eliminate unused drivers/video/mb862xx.cHeinrich Schuchardt
The mb862xx driver does not conform to the driver model and is unused. Eliminate it. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-19video: simple_panel: Add boe,nv101wxmn51 displayAlper Nebi Yasak
Add "boe,nv101wxmn51" to the compatible node. This is the panel for chromebook_bob. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-19video: simple_panel: Add sharp,lq123p1jx31 displayAlper Nebi Yasak
Add "sharp,lq123p1jx31" to the compatible node. This is the panel for chromebook_kevin. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-02-19mmc: rockchip_dw_mmc: use mmc_pwrseq instead of rockchip_mmc_pwrseqJaehoon Chung
Use mmc_pwrseq instead of rockchip_mmc_pwrseq. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19mmc: meson_gx_mmc: use mmc_pwrseq instead of meson_mmc_pwrseqJaehoon Chung
Use mmc_pwrseq instead of meson_mmc_pwrseq. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-19mmc: pwrseq: add mmc-pwrseq file to provide a generic interfaceJaehoon Chung
Add mmc-pwrseq file to provide a generic interface. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19mmc: mmc_spi: Document the 3 local functionsBin Meng
mmc_spi_sendcmd(), mmc_spi_readdata() and mmc_spi_writedata() are currently undocumented. Add comment blocks to explain the arguments and the return value. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19mmc: mmc_spi: Fix potential spec violation in receiving card responseBin Meng
After command is sent and before card response shows up on the line, there is a variable number of clock cycles in between called Ncr. The spec [1] says the minimum is 1 byte and the maximum is 8 bytes. Current logic in mmc_spi_sendcmd() has a flaw that it could only work with certain SD cards with their Ncr being just 1 byte. When resp_match is false, the codes try to receive only 1 byte from the SD card. On the other hand when resp_match is true, the logic happens to be no problem as it loops until timeout to receive as many bytes as possible to see a match of the expected resp_match_value. However not every call to mmc_spi_sendcmd() is made with resp_match being true hence this exposes a potential issue with SD cards that have a larger Ncr value. Given no issue was reported as of today, we can reasonably conclude that all cards being used on the supported boards happen to have a 1 byte Ncr timing requirement. But a broken case can be triggered by utilizing QEMU to emulate a larger value of Ncr (by default 1 byte Ncr is used on QEMU). This commit fixes such potential spec violation to improve the card compatibility. [1] "Physical Layer Specification Version 8.00" chapter 7.5.1: Command / Response chapter 7.5.4: Timing Values Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19mmc: mmc_spi: Move argument check to the beginning of mmc_spi_sendcmd()Bin Meng
The argument check should happen before any transfer on the SPI lines. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19mmc: mmc_spi: Print verbose debug output when crc16 check failsBin Meng
Add some verbose debug output when crc16 check fails. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19mmc: fix response timeout after switch commandStefan Bosch
After issuing the switch command: Wait until 'current state' of the card status becomes 'tran'. This prevents from response timeout at the next command because of 'current state' = 'data'. Signed-off-by: Stefan Bosch <stefan_b@posteo.net> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-02-19mmc: sdhci: skip cache invalidation if DMA is not usedYuezhang.Mo@sony.com
If DMA(SDMA or ADMA) is not used, the cache invalidation after reading is no need, should be skipped. Otherwise U-Boot may hang at the cache invalidation. Found this issue and tested this fix on DragonBoard 410c. Fixes: commit 4155ad9aac94 ("mmc: sdhci: fix missing cache invalidation after reading by DMA") Signed-off-by: Yuezhang.Mo <Yuezhang.Mo@sony.com> Reviewed-by: Andy Wu <Andy.Wu@sony.com>
2021-02-19mmc: initialize an err variableJaehoon Chung
Initialize an err variable to 0. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reported-by: Coverity (CID: 313548) Reviewed-by: Tom Rini <trini@konsulko.com>
2021-02-18video: arm: rpi: Add brcm,bcm2711-hdmi0 compatibleNicolas Saenz Julienne
The 'brcm,bcm2711-hdmi0' compatible string is used on RPi4 instead of 'brcm,bcm2835-hdmi' since the IP core was upgraded (now called VC6 instead of VC4). This has no functional change as far as u-boot driver is concerned. So simply add the compatible string. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Tested-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18mmc: Introduce mmc_phys_to_bus()/mmc_bus_to_phys()Nicolas Saenz Julienne
This will allow us to use DM variants of phys_to_bus()/bus_to_phys() when relevant. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18xhci: translate virtual addresses into the bus's address spaceNicolas Saenz Julienne
So far we've been content with passing physical addresses when configuring memory addresses into XHCI controllers, but not all platforms have buses with transparent mappings. Specifically the Raspberry Pi 4 might introduce an offset to memory accesses incoming from its PCIe port. Introduce xhci_virt_to_bus() and xhci_bus_to_virt() to cater with these limitations, and make sure we don't break non DM users. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Peter Robinson <pbrobinson@gmail.com> [mb: fix compilation for 32 bit] Signed-off-by: Matthias Brugger <mbrugger@suse.com> fix from nicolas
2021-02-18dm: Introduce DMA constraints into the core device modelNicolas Saenz Julienne
Calculating the DMA offset between a bus address space and CPU's every time we call phys_to_bus() and bus_to_phys() isn't ideal performance wise, as it implies traversing the device tree from the device's node up to the root. Since this information is static and available before the device's initialization, parse it before the probe call an provide the DMA offset in 'struct udevice' for the address translation code to use it. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18dm: Introduce xxx_get_dma_range()Nicolas Saenz Julienne
Add the following functions to get a specific device's DMA ranges: - dev_get_dma_range() - ofnode_get_dma_range() - of_get_dma_range() - fdt_get_dma_range() They are specially useful in oder to be able validate a physical address space range into a bus's and to convert addresses from and to address spaces. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18pci: pcie-brcmstb: Fix inbound window configurationsNicolas Saenz Julienne
So far we've assumed a fixed configuration for inbound windows as we had a single user for this controller. But the controller's DMA constraints were improved starting with BCM2711's B1 revision of the SoC, notably available in CM4 and Pi400. They allow for wider inbound windows. We can now cover the whole address space, whereas before we where limited to the lower 3GB. This information is passed to us through DT's 'dma-ranges' property and it's specially important for us to honor it since some interactions with the board's co-processor assume we're doing so (specifically the XHCI firmware load operation, which is handled by the co-processor after u-boot has correctly configured the PCIe controller). Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Tested-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18pci: brcmstb: Cleanup controller state before handoverNicolas Saenz Julienne
Make sure we handover the PCIe controller in a clean state. Some of the devices hanging from the PCIe bus might need to be properly reset through #PERST in order for Linux to be able to initialize them. This is specially important in order to properly initialize Raspberry Pi 4 B and 400's USB chip. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18usb: xhci-pci: Add DM_FLAG_OS_PREPARE flagNicolas Saenz Julienne
The PCIe bus the controller is connected to might need to be removed prior the handover. Make sure xhci-pci is also removed so as to avoid unexpected timeouts or hangs. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18config: Enable iProc RNG200 driver in RPi4 configsMatthias Brugger
We find the iProc RNG200 in the Raspberry Pi 4. Add it to all it's config so that it can be used. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Tested-by: Peter Robinson <pbrobinson@gmail.com> [mb: drop rpi_4_32b_defconfig] Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2021-02-18adc: meson-saradc: add support for getting reference voltage valueMarek Szyprowski
Add support for getting the 'vref-supply' regulator and register it as ADC's reference voltage regulator, so clients can translate sampled ADC values to the voltage. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-02-18button: add a simple Analog to Digital Converter device based button driverMarek Szyprowski
Add a simple Analog to Digital Converter device based button driver. This driver binds to the 'adc-keys' device tree node. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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