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2022-10-24watchdog: introduce a u-boot,autostart propertyRasmus Villemoes
This is a companion to u-boot,noautostart. If one has a single watchdog device that one does want to have auto-started, but several others that one doesn't, the only way currently is to set the CONFIG_WATCHDOG_AUTOSTART and then use the opt-out for the majority. The main motivation for this is to add an autostarted watchdog device to the sandbox (to test a fix) without having to set AUTOSTART in sandbox_defconfig and add the noautostart property to the existing devices. But it's also nice for symmetry, and the logic in init_watchdog_dev() becomes simpler to read because we avoid all the negations. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2022-10-24wdt: nuvoton: add expire function for generic resetJim Liu
Add expire_now function for generic sysreset request Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-10-21input: Remove legacy KEYBOARD optionTom Rini
There are no platforms that have not migrated to using DM_KEYBOARD, remove the legacy option. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-21core: Enable DM by defaultTom Rini
There are no longer any platforms which do not enable DM, move this to a def_bool y and remove the check in the Makefile. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-20Merge tag 'u-boot-rockchip-20221020' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-rockchip - dts update and sync for rk356x, rk3288, rk3399 from Linux; - Add rk3399 EAIDK-610 board support; - Update for puma-rk3399 board; - some fix and typo fix in different drivers;
2022-10-20Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini
2022-10-20Merge tag 'clk-2023.01' of https://source.denx.de/u-boot/custodians/u-boot-clkTom Rini
Clock patches for 2023.01 This contains various fixes (some long overdue) for the next release.
2022-10-20Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
Beside some rather unexciting sync of the DTs from the kernel tree, and some Kconfig cleanup, there are some improvements for the ARMv5 Allwinner family, to support boards with the F1C200s (64MB DRAM) better. We will get actual board support as soon as the DTs have passed the Linux review process. There is also support for the X96 Mate TV Box, featuring the H616 SoC and a full 4GB of DRAM. Also we found the secret to enable SPI booting on the H616 (pin PC5 must be pulled to GND), so the SPI boot support patch is now good to go. Passed the gitlab CI, plus briefly tested on Pine64-LTS, LicheePi Nano, X96 Mate and OrangePi Zero.
2022-10-20k210: fix k210_pll_calc_config()Heinrich Schuchardt
The k210 driver is selected by sandbox_defconfig. Building the sandbox on 32bit systems fails with: test/dm/k210_pll.c: In function ‘dm_test_k210_pll_calc_config’: include/linux/bitops.h:11:38: warning: left shift count >= width of type [-Wshift-count-overflow] 11 | #define BIT(nr) (1UL << (nr)) | ^~ test/dm/k210_pll.c:36:54: note: in expansion of macro ‘BIT’ 36 | error = abs((error - BIT(32))) >> 16; | ^~~ Use the BIT_ULL() macro to create a u64 value. Replace abs() by abs64() to get correct results on 32bit system Apply the same for the unit test. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2022-10-19clk: update clk_clean_rate_cache to use private clk structPatrick Delaunay
In clk_clean_rate_cache, clk->rate should update the private clock struct, in particular when CCF is activated, to save the cached rate value. When clk_get_parent_rate is called, the cached information is read from pclk->rate, with pclk = clk_get_parent(clk). As the cached is read from private clk data, the update should be done also on it. Fixes: 6b7fd3128f7 ("clk: fix set_rate to clean up cached rates for the hierarchy") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20220620153717.v2.1.Ifa06360115ffa3f3307372e6cdd98ec16759d6ba@changeid Link: https://lore.kernel.org/r/20220712142352.RESEND.v2.1.Ifa06360115ffa3f3307372e6cdd98ec16759d6ba@changeid/
2022-10-19rockchip: clk: pll: Fix constant typoMichal Suchanek
Fixes: bbda2ed584 ("rockchip: clk: pll: add common pll setting funcs") Signed-off-by: Michal Suchanek <msuchanek@suse.de> Link: https://lore.kernel.org/r/20220928104129.13240-1-msuchanek@suse.de
2022-10-19clk: change return type of clk_get_parent_rate from long long to ulongMichal Suchanek
All functions getting and setting clock rate use ulong for rate, only clk_get_parent_rate is an exception. Change the return value to match other clock rate funcrions. Most users directly assign the rate to unsigned long anyway, and the few users that use u64 (not s64) multiply the rate so they may need the extra bits for the result in their use case. Fixes: 4aa78300a0 ("dm: clk: Define clk_get_parent_rate() for clk operations") Signed-off-by: Michal Suchanek <msuchanek@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20220928103757.11870-1-msuchanek@suse.de
2022-10-19suniv: add UART1 supportAndre Przywara
Some boards with the Allwinner F1C100s family SoCs use UART1 for its debug UART, so define the pins for the SPL and the pinmux name and mux value for U-Boot proper. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2022-10-19ram: rockchip: fix typo in KConfig option labelQuentin Schulz
RAM_PX30_DDR4 is for DDR4 support and not DDR3 so let's fix the typo. Fixes: 2db36c64bd5a ("ram: rockchip: px30: add a config-based ddr selection") Cc: Quentin Schulz <foss+uboot@0leil.net> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-19arm: rockchip: rk3399: Program PLL clock for DDR at 50 MHz in documented rangeXavier Drudis Ferran
The original code set up the DDR clock to 48 MHz, not 50MHz as requested, and did it in a way that didn't satisfy the Application Notes in RK3399 TRM [1]. 2.9.2.B says: PLL frequency range requirement [...] FOUTVCO: 800MHz to 3.2GHz 2.9.2.A : PLL output frequency configuration [...] FOUTVCO = FREF / REFDIV * FBDIV FOUTPOSTDIV = FOUTVCO / POSTDIV1 / POSTDIV2 FREF = 24 MHz The original code gives FOUTVCO: 24MHz/1 * 12 = 288MHz < 800MHz And the resulting FOUTPOSTDIV is 288MHz / 3 / 2 = 48MHz but the requested frequency was 50MHz Note: 2.7.2 Detail Register Description PMUCRU_PPLL_CON0 says fbdiv Feedback Divide Value Valid divider settings are: [16, 3200] in integer mode So .fbdiv = 12 wouldn't be right. But 2.9.2.C says: PLL setting consideration [...] The following settings are valid for FBDIV: DSMPD=1 (Integer Mode): 12,13,14,16-4095 (practical value is limited to 3200, 2400, or 1600 (FVCOMAX / FREFMIN)) [...] So .fbdiv = 12 would be right. In any case FOUTVCO is still wrong. I thank YouMin Chen for confirmation and explanation. Despite documentation, I don't seem to be able to reproduce a practical problem with the wrong FOUTVCO. When I initially found it I thought some problems with detecting the RAM capacity in my Rock Pi 4B could be related to it and my patch seemed to help. But since I'm no longer able to reproduce the issue, it works with or without this patch. And meanwhile a patch[2] by Lee Jones and YouMin Chen addresses this issue. Btw, shouldn't that be commited? So this patches solves no visible problem. Yet, to prevent future problems, I think it'd be best to stick to spec. An alternative to this patch could be {.refdiv = 1, .fbdiv = 75, .postdiv1 = 6, .postdiv2 = 6}; This would theoretically consume more power and yield less jitter, according to 2.9.2.C : PLL setting consideration [...] For lowest power operation, the minimum VCO and FREF frequencies should be used. For minimum jitter operation, the highest VCO and FREF frequencies should be used. [...] But I haven't tried it because I don't think it matters much. 50MHz for DDR is only shortly used by TPL at RAM init. Normal operation is at 800MHz. Maybe it's better to use less power until later when more complex software can control batteries or charging or whatever ? Cc: Simon Glass <sjg@chromium.org> Cc: Philipp Tomsich <philipp.tomsich@vrull.eu> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Sean Anderson <seanga2@gmail.com> Link: [1] https://opensource.rock-chips.com/images/e/ee/Rockchip_RK3399TRM_V1.4_Part1-20170408.pdf Link: [2] https://patchwork.ozlabs.org/project/uboot/list/?series=305766 Signed-off-by: Xavier Drudis Ferran <xdrudis@tinet.cat> Tested-by: Michal Suchánek <msuchanek@suse.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-10-18watchdog: omap_wdt: Switch required include for watchdog definesTom Rini
All of the required values for using the omap_wdt.c driver are found in <asm/ti-common/omap_wdt.h> and this is what is indirectly pulled in via <asm/arch/hardware.h> when it exists. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-10-18dma: Transfer dma_ops should use DMA address typesAndrew Davis
DMA operations should function on DMA addresses, not virtual addresses. Although these are usually the same in U-Boot, it is more correct to be explicit with our types here. Signed-off-by: Andrew Davis <afd@ti.com>
2022-10-18dma: ti-edma3: Add DMA map operations before and after transfersAndrew Davis
We should clean the caches before any DMA operation and clean+invalidate after. This matches what the DMA framework does for us already but adds it to the two functions here in this driver that don't yet go through the new DMA framework. Signed-off-by: Andrew Davis <afd@ti.com>
2022-10-18dma: Use dma-mapping for cache ops and sync after writeAndrew Davis
The DMA'd memory area needs cleaned and invalidated after the DMA write so that any stale cache lines do not mask new data. Signed-off-by: Andrew Davis <afd@ti.com>
2022-10-18phy: ti: j721e-wiz: add j784s4-wiz-10g module supportMatt Ranostay
Add support for j784s4-wiz-10g device which has two core reference clocks (e.g core_ref_clk, core_ref1_clk) which requires an additional mux selection option. Signed-off-by: Matt Ranostay <mranostay@ti.com>
2022-10-17dm: core: Switch uclass_*_device_err to use uclass_*_device_checkMichal Suchanek
The _err variant iterators use the simple iterators without suffix as basis. However, there is no user that uclass_next_device_err for iteration, many users of uclass_first_device_err use it to get the first and (assumed) only device of an uclass, and a couple that use uclass_next_device_err to get the device following a known device in the uclass list. While there are some truly singleton device classes in which more than one device cannot exist these are quite rare, and most classes can have multiple devices even if it is not the case on the SoC's EVB. In a later patch the simple iterators will be updated to not stop on error and return next device instead. With this in many cases the code that expects the first device or an error if it fails to probe may get the next device instead. Use the _check iterators as the basis of _err iterators to preserve the old behavior. Signed-off-by: Michal Suchanek <msuchanek@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-17dm: core: Switch uclass_foreach_dev_probe to use simple iteratorMichal Suchanek
The return value is not used for anythig, and in a later patch the behavior of the _err iterator will change in an incompatible way. Signed-off-by: Michal Suchanek <msuchanek@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Update pvblock_probe() to avoid using internal var: Signed-off-by: Simon Glass <sjg@chromium.org>
2022-10-17dm: blk: Do not use uclass_next_device_errMichal Suchanek
blk_first_device_err/blk_next_device_err uses uclass_first_device_err/uclass_next_device_err for device iteration. Although the function names superficially match the return value from uclass_first_device_err/uclass_next_device_err is never used meaningfully, and uclass_first_device/uclass_next_device works equally well for this purpose. In the following patch the semantic of uclass_first_device_err/uclass_next_device_err will be changed to be based on uclass_first_device_check/uclass_next_device_check breaking this sole user that uses uclass_next_device_err for iteration. Signed-off-by: Michal Suchanek <msuchanek@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-17dm: treewide: Use uclass_first_device_err when accessing one deviceMichal Suchanek
There is a number of users that use uclass_first_device to access the first and (assumed) only device in uclass. Some check the return value of uclass_first_device and also that a device was returned which is exactly what uclass_first_device_err does. Some are not checking that a device was returned and can potentially crash if no device exists in the uclass. Finally there is one that returns NULL on error either way. Convert all of these to use uclass_first_device_err instead, the return value will be removed from uclass_first_device in a later patch. Signed-off-by: Michal Suchanek <msuchanek@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-17w1: Fix bus counting in w1_get_busMichal Suchanek
Use uclass_first_device_check/uclass_next_device_check to correctly count buses that fail to probe. Fixes: d3e19cf919 ("w1: Add 1-Wire uclass") Signed-off-by: Michal Suchanek <msuchanek@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-17video: ipuv3: Fix error handling when getting the displayMichal Suchanek
The code checks that uclass_first_device returned a device but the returned value that is assigned is never used. Use uclass_first_device_err instead, and move the error return outside of the if block. Fixes: f4ec1ae08e ("mxc_ipuv3_fb.c: call display_enable") Signed-off-by: Michal Suchanek <msuchanek@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-17usb: ether: Fix error handling in usb_ether_initMichal Suchanek
The code checks the return value from uclass_first_device as well as that the device exists but it passes on the return value which may be zero if there are no gadget devices. Just check that a device was returned and return -ENODEV otherwise. Also remove the dev variable which is not really used for anything. Signed-off-by: Michal Suchanek <msuchanek@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-17dm: pci: Fix device PCI iterationMichal Suchanek
When there is no PCI bus uclass_first_device will return no bus and no error which will result in pci_find_first_device calling skip_to_next_device with no bus, and the bus is only checked at the end of the while cycle, not the beginning. Fixes: 76c3fbcd3d ("dm: pci: Add a way to iterate through all PCI devices") Signed-off-by: Michal Suchanek <msuchanek@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-17dm: treewide: Do not opencode uclass_probe_all()Michal Suchanek
We already have a function for probing all devices of a specific class, use it. Signed-off-by: Michal Suchanek <msuchanek@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-17dm: core: Fix uclass_probe_all to really probe all devicesMichal Suchanek
uclass_probe_all uses uclass_first_device/uclass_next_device assigning the return value. The interface for getting meaningful error is uclass_first_device_check/uclass_next_device_check, use it. Also do not stop iteration when an error is encountered. Probing all devices includes those that happen to be after a failing device in the uclass order. Fixes: a59153dfeb ("dm: core: add function uclass_probe_all() to probe all devices") Signed-off-by: Michal Suchanek <msuchanek@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-17dm: regmap: Disable range checks in SPLSimon Glass
A recent change to regmap breaks building of phycore-rk3288 for me. The difference is only a few bytes. Somehow CI seems to pass, even though it fails when I run docker locally. But it prevents me from sending any more pull requests. In any case this board is clearly near the limit. We could revert the offending change, but it is needed for sandbox tests. Instead, add a way to drop the range checks in SPL, since they end up doing nothing if everything is working as expected. This makes phycore-rk3288 build again for me and reduces the size of SPL slightly for a number of boards. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 947d4f132b4 ("regmap: fix range checks")
2022-10-16spi: Implement spi_set_speedPaul Barker
This function is already defined in spi.h but no implementation of it currently exists in the tree. The implementation is based on the static function spi_set_speed_mode(). The function prototype is modified so that an success or error condition can be returned to the caller. Signed-off-by: Paul Barker <paul.barker@sancloud.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2022-10-12Fix typo in CONFIG_USBNET_DEVADDRIgnacio Zamora
Fix typo that was caused by the same feature being split in to 2 different configuration options. Replace CONFIG_USBNET_DEVADDR with CONFIG_USBNET_DEV_ADDR Signed-off-by: Ignacio Zamora <nachopitt@gmail.com>
2022-10-12smem: msm: add missing <linux/sizes.h>Robert Marko
MSM SMEM driver is currently missing <linux/sizes.h> header and throws the following compile error: drivers/smem/msm_smem.c: In function ‘qcom_smem_get_ptable’: drivers/smem/msm_smem.c:635:71: error: ‘SZ_4K’ undeclared (first use in this function) 635 | ptable = smem->regions[0].virt_base + smem->regions[0].size - SZ_4K; Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: luka.perkov@sartura.hr
2022-10-12firmware: scmi: fix the multi channel support with CCFPatrick Delaunay
When the CCF is activated, the dev->parent is not necessary the reference to SCMI transport and the function devm_scmi_of_get_channel failed for the registered SCMI clock, child for protocol@14, the channel is null and the SCMI clock driver crash for any operations. This patch changes the first parameter of the ops of_get_channel(), aligned with other process_msg() to pass directly the good reference, i.e. parent result of find_scmi_transport_device(dev) which return the reference of the scmi transport device. Fixes: 8e96801aa6a ("firmware: scmi: add multi-channel support") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-10-11thermal: add sandbox driverRobert Marko
Provide a simple sandbox driver for the thermal uclass. It simply registers and returns 100 degrees C if requested. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-11pinctrl: fix buffer size for pinctrl_generic_set_state_prefix()John Keeping
This buffer has the concatenated prefix and name written into it, so it must be large enough to cover both strings plus the terminating NUL. Fixes: 92c4a95ec7 ("pinctrl: Add new function pinctrl_generic_set_state_prefix()") Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-10-11pinctrl: nuvoton: fix set persist errorJim Liu
CA9C is cortex A9 watchdog reset control bit. if device set persist mode, it shouldn't set this bit. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-10-11bootcount: pmic: Correct misleading commentPhilip Oberfichtner
Fix a copy-paste error I did when inserting the comment. Signed-off-by: Philip Oberfichtner <pro@denx.de> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-10-11Merge tag 'xilinx-for-v2023.01-rc1-v3' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2023.01-rc1 (round 3) fpga: - Create new uclass - Get rid of FPGA_DEBUG and use logging infrastructure zynq: - Enable early EEPROM decoding - Some DT updates zynqmp: - Use OCM_BANK_0 to check config loading permission - Change config object loading in SPL - Some DT updates net: - emaclite: Enable driver for RISC-V xilinx: - Fix static checker warnings - Fix GCC12 warning sdhci: - Read PD id from DT
2022-10-10usb: gadget: fastboot: detach usb on reboot commandsMattijs Korpershoek
When host issues "fastboot reboot fastboot", it's expected that the board drops the USB connection before resetting. On some boards, such as Khadas VIM3L and SEI610, this is not the case. We observe the following error: $ fastboot reboot fastboot Rebooting into fastboot OKAY [ 0.004s] fastboot: error: Failed to boot into userspace fastboot; one or more components might be unbootable. This does not happen when we use the RST button on the board. It can be reproduced in linux with: # echo b > /proc/sysrq-trigger In this case, we hit a undefined hardware behavior, where D+ and D- are in an unknown state. Therefore the host can't detect usb disconnection. Make sure we always call usb_gadget_release() when a "fastboot reboot" command is issued. Note: usb_gadget_release() should be called before g_dnl_unregister() because g_dnl_unregister() triggers a complete() call on each endpoint (thus calling do_reset()). Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2022-10-10usb: ehci: Remove unused ehci_{setup,shutdown}_phy() helpersPatrice Chotard
Remove unused ehci_{setup,shutdown}_phy() helpers now replaced by generic_{setup,shutdown}_phy(). Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
2022-10-10usb: ehci: Make usage of generic_{setup,shutdown}_phy() helpersPatrice Chotard
Replace ehci_setup_phy() and ehci_shutdown_phy () by respectively generic_setup_phy() and generic_shutdown_phy(). Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
2022-10-10usb: ohci: Make usage of generic_{setup,shutdown}_phy() helpersPatrice Chotard
Replace ohci_setup_phy() and ohci_shutdown_phy () by respectively generic_setup_phy() and generic_shutdown_phy(). Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
2022-10-10phy: Add generic_{setup,shutdown}_phy() helpersPatrice Chotard
In drivers usb/host/{ehci,ohci}-generic.c, {ehci,ohci}_setup_phy() and {ehci,ohci}_shutdown_phy() shares 95% of common code. Factorize this code in new generic_{setup,shudown}_phy() functions. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
2022-10-10usb: gadget: Clean up Makefile ifdefferyMarek Vasut
Take the USB_ETHER ifdef block apart and make use of obj-$(VAR) instead to include the source files in build. The duplicate CI_UDC entry is now removed, the USB_DEVICE ifdef is now reduced to core.o ep.o addition, the ether.o can be conditionally compiled in using USB_ETHER. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-10-10Merge tag 'u-boot-nand-20221009' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-nand-flash - mtd: Update the function name to 'rfree' - Support NAND ONFI EDO mode for imx8mn architecture - dm: clk: add missing stub when CONFIG_CLK is deactivated
2022-10-10fpga: virtex2: Use logging feature instead of FPGA_DEBUGAlexander Dahl
Instead of using DEBUG or LOG_DEBUG the driver still had its own definition for debug output. Signed-off-by: Alexander Dahl <ada@thorsis.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20221007122003.11239-11-ada@thorsis.com
2022-10-10fpga: spartan3: Use logging feature instead of FPGA_DEBUGAlexander Dahl
Instead of using DEBUG or LOG_DEBUG the driver still had its own definition for debug output. Signed-off-by: Alexander Dahl <ada@thorsis.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20221007122003.11239-10-ada@thorsis.com
2022-10-10fpga: spartan2: Use logging feature instead of FPGA_DEBUGAlexander Dahl
Instead of using DEBUG or LOG_DEBUG the driver still had its own definition for debug output. Signed-off-by: Alexander Dahl <ada@thorsis.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20221007122003.11239-9-ada@thorsis.com
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