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Add basic i2c based read/write functions to access PMIC registers.
Tested-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
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Releasing a GPIO on Tegra necessitates changing its configuration to SFIO
to activate its special function. Without this reconfiguration, the special
function will be unavailable.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
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Add RMII-specific handling to rk3288_gmac_fix_mac_speed() so that it
properly sets the RMII clock (2.5 MHz vs. 25 MHz) and speed bits
(10 Mbps vs. 100 Mbps). Also define a new rk3288_gmac_set_to_rmii()
function to set the PHY interface field and RMII_MODE bit.
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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Write enable(06h) command will be sent to a flash device to
set the write enable latch bit before every program, erase,
write command. After that write disable command (04h) needs
to be sent to clear the write enable latch.
This write_disable() is missing at the majority of the places
in the driver, add it to clear write enable latch.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://gist.github.com/PrasanthBabuMantena/c12f39744de188a9d08cd5ca51dc2a7b
Tested-by: Prasanth Babu Mantena <p-mantena@ti.com>
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MT35XU512ABA has only BFPT and 4-Byte Address Instruction Table
in SFDP. commit bebdc237507c ("mtd: spi-nor: Parse SFDP SCCR Map")
added checks in spi_nor_octal_dtr_enable() to bail out if the 22nd DWORD
in SCCR does not indicate DTR Octal Mode Enable, since MT35XU512ABA device
supports octal DTR mode, add this property in SFDP fixup.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
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The IO domain driver controls the I/O voltage for various pins,
MMC included.
Enable it by default for all supported Rockchip SoCs.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
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There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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There's no need to modify private data from the controller, so let's
make that struct const.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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The logic in the core reads the nr_pins of the controller and uses it as
the index of the first pin in the bank (pin_base) it currently parses.
It then increments the number of pins in the controller before going to
the next bank.
This works "fine" for controllers where nr_pins isn't defined in their
rockchip_pin_ctrl struct as it defaults to 0. However, when it is
already set, it'll make the index pin of each bank offset by the number
in nr_pins declared in the struct at initialization, and it'll keep
growing while adding banks, which means the total number of pins in the
controller will be misrepresented.
Additionally, U-Boot proper may probe this driver twice (pre-reloc and
true proper) and not reset nr_pins of the controller in-between meaning
the second probe will have an offset of the actual correct nr_pins.
Instead, let's just store locally the number of pins in the controller
and make sure it's reset between probes.
Finally, this stops modifying a const struct which will soon be
triggering a CPU abort at runtime.
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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On K3 devices two drivers ti_sci and ti_sci_dm are supporting firmware
functions. At run time one of driver is used.
Driver ti_sci already initializing head for dev_list in its probe
function, but it was missed in ti_sci_dm driver.
So add head list init support for ti_sci_dm driver.
While at this, move init of list before usages in both functions.
Fixes: 5d5a699855a7("firmware: ti_sci: Add support for Resoure Management at R5 SPL stage")
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
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1. Add pcie device id 0x15f3
2. Add IIC phy id 0x67C9DC00
Signed-off-by: ZhiJie.Zhang <zhangzhijie@bosc.ac.cn>
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https://source.denx.de/u-boot/custodians/u-boot-stm
- CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/26081
- STM32 MCUs:
- Fix console cmdline
- Add support NT35510 panel controller on stm32f769i-disco board
- Fix dfu alt buffer clearing
- Enable scan and start for AB schema on STM32MP15 DHSOM
- Add stm32mp2 support for dwc_eth_qos
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Add compatible "st,stm32mp25-dwmac" to manage STM32MP2 boards
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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[backport from Linux commits 9b26d5c044d6a29ebfb1845408e0f2a7c5f89818
and 219a1f49094f50bf9c382830d06149e677f76bed]
The patch adds the FRIDA FRD400B25025-A-CTK panel, which belongs to the
Novatek NT35510-based panel family.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
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The MTD device reference is dropped via put_mtd_device, however its
field ->index is read and passed to ubi_msg. To fix this, the patch
moves the reference dropping after calling ubi_msg.
Signed-off-by: Pan Bian <bianpan2016@163.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
Upstream Linux commit: b95f83ab762dd6211351b9140f99f43644076ca8
Signed-off-by: Alexander Vickberg <wickbergster@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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The Renesas R9A07G044L (RZ/G2L) SoC includes two Gigabit Ethernet
interfaces which can be supported using the ravb driver. Some RZ/G2L
specific steps need to be taken during initialization due to differences
between this SoC and previously supported SoCs. We also need to ensure
that the module reset is de-asserted after the module clock is enabled
but before any Ethernet register reads/writes take place.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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In order to add support for the Renesas RZ/G2L Ethernet IP in a
subsequent patch, we introduce optional de-assertion and re-assertion of
a reset signal in ravb_probe() and ravb_remove().
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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In order to add support for the Renesas RZ/G2L Ethernet IP in a
subsequent patch, we move all R-Car specific code into new functions and
introduce a device_ops function pointer table.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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Correctly handle RX errors in ravb_recv() by returning 0 instead
of -EAGAIN on RX error.
In case the RAVB driver detects an RX error in ravb_recv(), it must
not return the -EAGAIN, but instead must return 0. Both error codes
are handled in eth-uclass.c eth_rx() and -EAGAIN is rewritten to 0
at the end of eth_rx(), but negative return code from the .recv()
callback does not trigger .free_pkt() callback, which would clean
up and re-enqueue the descriptor which holds the currently received
corrupted packet. The .free_pkt() must be called for this descriptor,
otherwise the follow up received data become corrupted too, even if
those packets are correctly received. Returning 0 from the .recv()
callback assures the corrupted packet is not processed by the network
stack, but is skipped instead.
For TFTP loading, an RX error produces the timeout "T" output and
resumes the TFTP loading operation shortly afterward, without any
data corruption.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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This patch is used to add the imx type string of i.MX95 ao that the
i.MX95 CPU info can be printed.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
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@protocols is an array of protocol identifiers that are implemented,
excluding the Base protocol. Four protocol identifiers are packed into
each array element. The number of elements of @protocols is specified by
callee-side.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
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This patch is used to add SCMI clock control permissions to sandbox for
testing.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
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Clock driver based on SCMI clock management protocol in Linux checks
clock state, parent and rate control permissions. To be consistent with
the kernel driver, add this check here. CLOCK_GET_PERMISSIONS is from
ARM System Control and Management Interface Platform Design Document 3.2.
When using common clock framework (CCF), use the clock signal ID to get
the clock registered by clk_register() in scmi_clk_probe(), and then
obatin the struct clk_scmi variable with container_of().
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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This patch adds the command CLOCK_PARENT_SET that can be used to set the
parent of a clock. ARM SCMI Version 3.2 supports to change the parent of
a clock device.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
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This patch adds SCMI pin control protocol support to make the pin
controller driver based on SCMI, such as
drivers/pinctrl/nxp/pinctrl-imx-scmi.c, can be bound to the SCMI agent
device whose protocol id is 0x19.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
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This patch provides a pinctrl driver based on SCMI pin control protocol.
Currently, only the PINCTRL_CONFIG_SET command is implemented.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
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If there is a SoC specific SCMI protocol driver, using
scmi_proto_driver_get() function can avoid to add SoC specific code to
scmi_agent-uclass.c.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
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linker-genetated array
U_BOOT_SCMI_PROTO_DRIVER macro is used to add a SCMI protocol driver to
scmi_proto_driver list. scmi_proto_driver_get() function can be used to
match a SCMI protocol id and its driver.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
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When the cursor position changes, kerning should not be used for the
next character, since it can make the first displayed character shuffle
left or right a bit.
Clear the kern character when setting the position.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Provide a way to draw an unfilled box of a certain width. This is useful
for grouping menu items together.
Add a comment showing how to see the copy-framebuffer, for testing.
Signed-off-by: Simon Glass <sjg@chromium.org>
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When using expo we want to be able to control the information on the
display and avoid other messages (such as USB scanning) appearing.
Add a 'quiet' flag for the console, to help with this.
The test is a little messy since stdio is still using the original
vidconsole create on start-up. So take care to use the same.
Signed-off-by: Simon Glass <sjg@chromium.org>
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When writing multiple lines of text we need to be able to control which
text goes on each line. Add a new vidconsole_put_stringn() function to
help with this.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Expo needs to be able to word-wrap lines so that they are displayed as
the user expects. Add a limit on the width of each line and support this
in the measurement algorithm.
Add a log category to truetype while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
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It is useful to be able to embed newline characters in the string and
have the text measured into multiple lines. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Create a measured line for the (single) line of text.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Update the vidconsole API so that measure() can measure multiple lines
of text. This will make it easier to implement multi-line fields in
expo.
Tidy up the function comments while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
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The CONFIG_WHITE_ON_BLACK setting is hard-coded at build-time. It is
useful to be able to control this when showing menus.
Create a property to hold this information, using the CONFIG as the
initial value.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Caleb Connolly <caleb.connolly@linaro.org> says:
Introduce a new event to signal that the live tree has been built,
allowing boards to perform fixups on the tree before devices are bound.
Crucially this allows for devices to be enabled or disabled, but also
allows for properties that are parsed during the bind stage to be
modified (such as dr_mode for dwc3).
With this in place, mach-snapdragon is switched over to use the event
and some hacky U-Boot specific DT overrides (which had to be undone
prior to booting an image) are removed in favour of fixing up the
livetree (which is not passed on to further boot stages).
Finally, some minor fixes are made for the QCM2290 RB1 board, the sdcard
is enabled and it now uses USB host mode in U-Boot like it's bigger
sibling the RB2.
Link: https://lore.kernel.org/r/20250411-livetree-fixup-v2-0-1236823377bb@linaro.org
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There are 134 pins not 133, oops! This fixes the sdcard on the RB1 as
the pins now all get configured correctly.
Fixes: 0ecb8cfcb930 ("pinctrl: qcom: add qcm2290 pinctrl driver")
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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The device name is always clk_qcom... Not very useful.
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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