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Write enable(06h) command will be sent to a flash device to
set the write enable latch bit before every program, erase,
write command. After that write disable command (04h) needs
to be sent to clear the write enable latch.
This write_disable() is missing at the majority of the places
in the driver, add it to clear write enable latch.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://gist.github.com/PrasanthBabuMantena/c12f39744de188a9d08cd5ca51dc2a7b
Tested-by: Prasanth Babu Mantena <p-mantena@ti.com>
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MT35XU512ABA has only BFPT and 4-Byte Address Instruction Table
in SFDP. commit bebdc237507c ("mtd: spi-nor: Parse SFDP SCCR Map")
added checks in spi_nor_octal_dtr_enable() to bail out if the 22nd DWORD
in SCCR does not indicate DTR Octal Mode Enable, since MT35XU512ABA device
supports octal DTR mode, add this property in SFDP fixup.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
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On K3 devices two drivers ti_sci and ti_sci_dm are supporting firmware
functions. At run time one of driver is used.
Driver ti_sci already initializing head for dev_list in its probe
function, but it was missed in ti_sci_dm driver.
So add head list init support for ti_sci_dm driver.
While at this, move init of list before usages in both functions.
Fixes: 5d5a699855a7("firmware: ti_sci: Add support for Resoure Management at R5 SPL stage")
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
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1. Add pcie device id 0x15f3
2. Add IIC phy id 0x67C9DC00
Signed-off-by: ZhiJie.Zhang <zhangzhijie@bosc.ac.cn>
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https://source.denx.de/u-boot/custodians/u-boot-stm
- CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/26081
- STM32 MCUs:
- Fix console cmdline
- Add support NT35510 panel controller on stm32f769i-disco board
- Fix dfu alt buffer clearing
- Enable scan and start for AB schema on STM32MP15 DHSOM
- Add stm32mp2 support for dwc_eth_qos
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Add compatible "st,stm32mp25-dwmac" to manage STM32MP2 boards
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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[backport from Linux commits 9b26d5c044d6a29ebfb1845408e0f2a7c5f89818
and 219a1f49094f50bf9c382830d06149e677f76bed]
The patch adds the FRIDA FRD400B25025-A-CTK panel, which belongs to the
Novatek NT35510-based panel family.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
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The MTD device reference is dropped via put_mtd_device, however its
field ->index is read and passed to ubi_msg. To fix this, the patch
moves the reference dropping after calling ubi_msg.
Signed-off-by: Pan Bian <bianpan2016@163.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Richard Weinberger <richard@nod.at>
Upstream Linux commit: b95f83ab762dd6211351b9140f99f43644076ca8
Signed-off-by: Alexander Vickberg <wickbergster@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
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The Renesas R9A07G044L (RZ/G2L) SoC includes two Gigabit Ethernet
interfaces which can be supported using the ravb driver. Some RZ/G2L
specific steps need to be taken during initialization due to differences
between this SoC and previously supported SoCs. We also need to ensure
that the module reset is de-asserted after the module clock is enabled
but before any Ethernet register reads/writes take place.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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In order to add support for the Renesas RZ/G2L Ethernet IP in a
subsequent patch, we introduce optional de-assertion and re-assertion of
a reset signal in ravb_probe() and ravb_remove().
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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In order to add support for the Renesas RZ/G2L Ethernet IP in a
subsequent patch, we move all R-Car specific code into new functions and
introduce a device_ops function pointer table.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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Correctly handle RX errors in ravb_recv() by returning 0 instead
of -EAGAIN on RX error.
In case the RAVB driver detects an RX error in ravb_recv(), it must
not return the -EAGAIN, but instead must return 0. Both error codes
are handled in eth-uclass.c eth_rx() and -EAGAIN is rewritten to 0
at the end of eth_rx(), but negative return code from the .recv()
callback does not trigger .free_pkt() callback, which would clean
up and re-enqueue the descriptor which holds the currently received
corrupted packet. The .free_pkt() must be called for this descriptor,
otherwise the follow up received data become corrupted too, even if
those packets are correctly received. Returning 0 from the .recv()
callback assures the corrupted packet is not processed by the network
stack, but is skipped instead.
For TFTP loading, an RX error produces the timeout "T" output and
resumes the TFTP loading operation shortly afterward, without any
data corruption.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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This patch is used to add the imx type string of i.MX95 ao that the
i.MX95 CPU info can be printed.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
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@protocols is an array of protocol identifiers that are implemented,
excluding the Base protocol. Four protocol identifiers are packed into
each array element. The number of elements of @protocols is specified by
callee-side.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
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This patch is used to add SCMI clock control permissions to sandbox for
testing.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
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Clock driver based on SCMI clock management protocol in Linux checks
clock state, parent and rate control permissions. To be consistent with
the kernel driver, add this check here. CLOCK_GET_PERMISSIONS is from
ARM System Control and Management Interface Platform Design Document 3.2.
When using common clock framework (CCF), use the clock signal ID to get
the clock registered by clk_register() in scmi_clk_probe(), and then
obatin the struct clk_scmi variable with container_of().
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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This patch adds the command CLOCK_PARENT_SET that can be used to set the
parent of a clock. ARM SCMI Version 3.2 supports to change the parent of
a clock device.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
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This patch adds SCMI pin control protocol support to make the pin
controller driver based on SCMI, such as
drivers/pinctrl/nxp/pinctrl-imx-scmi.c, can be bound to the SCMI agent
device whose protocol id is 0x19.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
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This patch provides a pinctrl driver based on SCMI pin control protocol.
Currently, only the PINCTRL_CONFIG_SET command is implemented.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
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If there is a SoC specific SCMI protocol driver, using
scmi_proto_driver_get() function can avoid to add SoC specific code to
scmi_agent-uclass.c.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
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linker-genetated array
U_BOOT_SCMI_PROTO_DRIVER macro is used to add a SCMI protocol driver to
scmi_proto_driver list. scmi_proto_driver_get() function can be used to
match a SCMI protocol id and its driver.
Signed-off-by: Alice Guo <alice.guo@nxp.com>
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When the cursor position changes, kerning should not be used for the
next character, since it can make the first displayed character shuffle
left or right a bit.
Clear the kern character when setting the position.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Provide a way to draw an unfilled box of a certain width. This is useful
for grouping menu items together.
Add a comment showing how to see the copy-framebuffer, for testing.
Signed-off-by: Simon Glass <sjg@chromium.org>
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When using expo we want to be able to control the information on the
display and avoid other messages (such as USB scanning) appearing.
Add a 'quiet' flag for the console, to help with this.
The test is a little messy since stdio is still using the original
vidconsole create on start-up. So take care to use the same.
Signed-off-by: Simon Glass <sjg@chromium.org>
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When writing multiple lines of text we need to be able to control which
text goes on each line. Add a new vidconsole_put_stringn() function to
help with this.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Expo needs to be able to word-wrap lines so that they are displayed as
the user expects. Add a limit on the width of each line and support this
in the measurement algorithm.
Add a log category to truetype while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
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It is useful to be able to embed newline characters in the string and
have the text measured into multiple lines. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Create a measured line for the (single) line of text.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Update the vidconsole API so that measure() can measure multiple lines
of text. This will make it easier to implement multi-line fields in
expo.
Tidy up the function comments while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
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The CONFIG_WHITE_ON_BLACK setting is hard-coded at build-time. It is
useful to be able to control this when showing menus.
Create a property to hold this information, using the CONFIG as the
initial value.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Caleb Connolly <caleb.connolly@linaro.org> says:
Introduce a new event to signal that the live tree has been built,
allowing boards to perform fixups on the tree before devices are bound.
Crucially this allows for devices to be enabled or disabled, but also
allows for properties that are parsed during the bind stage to be
modified (such as dr_mode for dwc3).
With this in place, mach-snapdragon is switched over to use the event
and some hacky U-Boot specific DT overrides (which had to be undone
prior to booting an image) are removed in favour of fixing up the
livetree (which is not passed on to further boot stages).
Finally, some minor fixes are made for the QCM2290 RB1 board, the sdcard
is enabled and it now uses USB host mode in U-Boot like it's bigger
sibling the RB2.
Link: https://lore.kernel.org/r/20250411-livetree-fixup-v2-0-1236823377bb@linaro.org
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There are 134 pins not 133, oops! This fixes the sdcard on the RB1 as
the pins now all get configured correctly.
Fixes: 0ecb8cfcb930 ("pinctrl: qcom: add qcm2290 pinctrl driver")
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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The device name is always clk_qcom... Not very useful.
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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Support for calculating video damage
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Some drivers call video_set_flush_dcache() to indicate that they want to
have the dcache flushed for the frame buffer. These drivers benefit from
our new video damage control, because we can reduce the amount of memory
that gets flushed significantly.
This patch enables video damage control for all device drivers that call
video_set_flush_dcache() to make sure they benefit from it.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
[Alper: Add to VIDEO_TIDSS, imply instead of select]
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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The dcache flushing code path was conditional on ARM && !DCACHE config
options. However, dcaches exist on other platforms as well and may need
clearing if their driver requires it.
Simplify the compile logic and always enable the dcache flush logic in
the video core. That way, drivers can always rely on it to call the arch
specific callbacks.
This will increase code size for non-ARM platforms with CONFIG_VIDEO=y
slightly.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-13-alpernebiyasak@gmail.com/
Added workaround for CONFIG_SYS_CACHELINE_SIZE for ibex-ast2700:
Signed-off-by: Simon Glass <sjg@chromium.org>
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CONFIG_VIDEO_COPY implemented a range-based copying mechanism: If we
print a single character, it will always copy the full range of bytes
from the top left corner of the character to the lower right onto the
uncached frame buffer. This includes pretty much the full line contents
of the printed character.
Since we now have proper damage tracking, let's make use of that to reduce
the amount of data we need to copy. With this patch applied, we will only
copy the tiny rectangle surrounding characters when we print them,
speeding up the video console.
After this, changes to the main frame buffer are not immediately copied
to the copy frame buffer, but postponed until the next video device
sync. So issue an explicit sync before inspecting the copy frame buffer
contents for the video tests.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
[Alper: Rebase for fontdata->height/w, fill_part(), fix memmove(dev),
drop from defconfig, use damage.xstart/yend, use IS_ENABLED(),
call video_sync() before copy_fb check, update video_copy test]
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-12-alpernebiyasak@gmail.com/
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Now that we have a damage area tells us which parts of the frame buffer
actually need updating, let's only dcache flush those on video_sync()
calls. With this optimization in place, frame buffer updates - especially
on large screen such as 4k displays - speed up significantly.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reported-by: Da Xue <da@libre.computer>
[Alper: Use damage.xstart/yend, IS_ENABLED()]
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-11-alpernebiyasak@gmail.com/
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Let's report the video damage when we draw a bitmap on the screen. This
way we can later lazily flush only relevant regions to hardware.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reported-by: Da Xue <da@libre.computer>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-9-alpernebiyasak@gmail.com/
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Now that we have a damage tracking API, let's populate damage done by
vidconsole drivers. We try to declare as little memory as damaged as
possible.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reported-by: Da Xue <da@libre.computer>
[Alper: Rebase for met->baseline, fontdata->height/width, make rotated
console_putc_xy() damages pass tests, edit patch message]
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-7-alpernebiyasak@gmail.com/
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Let's report the video damage when we fill parts of the screen. This
way we can later lazily flush only relevant regions to hardware.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reported-by: Da Xue <da@libre.computer>
[Alper: Move from video_clear() to video_fill(), video_fill_part()]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-6-alpernebiyasak@gmail.com/
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We are going to introduce image damage tracking to fasten up screen
refresh on large displays. This patch adds damage tracking for up to
one rectangle of the screen which is typically enough to hold blt or
text print updates. Callers into this API and a reduced dcache flush
code path will follow in later patches.
Signed-off-by: Alexander Graf <agraf@csgraf.de>
Reported-by: Da Xue <da@libre.computer>
[Alper: Use xstart/yend, document new fields, return void from
video_damage(), declare priv, drop headers, use IS_ENABLED()]
Co-developed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Link: https://lore.kernel.org/u-boot/20230821135111.3558478-5-alpernebiyasak@gmail.com/
Reviewed-by: Simon Glass <sjg@chromium.org>
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Flash partitions may specify MTDPART_SIZ_FULL (=0) as the size of the
partition to indicate "the remainder of the flash". Make this work with
device-tree "fixed-partitions" as well.
This makes MTD partitioning compatible with the Linux kernel, see:
https://github.com/torvalds/linux/blob/master/include/linux/mtd/partitions.h#L29
https://github.com/torvalds/linux/blob/master/drivers/mtd/mtdpart.c#L123
Previously, this could only be done through MTDPARTS so this change allows
boards like topic_miami to migrate from `mtdparts`/`mtdids` to devicetree
partitions.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
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It's currently possible to make the bootloader crash on calling
clk_set_rate caused by the loop in clk_clean_rate_cache.
The loop assume that every child of the clock node are also clock
device but this is not always the case. For example it's common for a
clock to bind to a reset device or also expose a syscon if the clock
register map is also used to apply special configuration.
In such case, on accessing a device as a clock, the bootloader crash. To
correctly handle this, check if the child device is actually a clock and
ignore otherwise.
Fixes: 6b7fd3128f71 ("clk: fix set_rate to clean up cached rates for the hierarchy")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
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SST(sst26wf016) flashes have multiple erase block sizes, including
8 KB, 32 KB, and 64 KB. Since a 64 KB sector erase cannot be performed
on all blocks, the 4 KB sector erase command should be used instead.
Enabling the SPI_FLASH_USE_4K_SECTORS configuration allows the use of
4 KB sector erases, but it may increase the erase operation time for large
memory flashes.
This reverts commit 34cd4a72fb2d113e2754c0d643618a8e3fa549ab
MEMORY ORGANIZATION:
The SST26WF016B/016BA SQI memory array is organized
in uniform, 4 KByte erasable sectors with the following
erasable blocks: eight 8 KByte parameter, two
32 KByte overlay, and thirty 64 KByte overlay blocks.
See Figure 3-1.
Top of Memory Block
┌──────────┐
│ 8 KByte │
├──────────┤
│ 8 KByte │
├──────────┤
│ 8 KByte │
├──────────┤
│ 8 KByte │
├──────────┤
│ 32 KByte │
├──────────┤
│ 64 KByte │
├──────────┤
│ 64 KByte │
├──────────┤
│ 64 KByte │
├──────────┤
│ 32 KByte │
├──────────┤
│ 8 KByte │
├──────────┤
│ 8 KByte │
├──────────┤
│ 8 KByte │
├──────────┤
│ 8 KByte │
└──────────┘
Bottom of Memory Block
┌────────────────────────────────┐
│ 64 KByte │
├────────────────────────────────┤
│ 64 KByte │
└────────────────────────────────┘
Expanded View:
┌──────┐ ┌──────┐ ┌──────┐ ┌──────┐
│ 4 KB │ │ 4 KB │ │ 4 KB │ │ 4 KB │
├──────┤ ├──────┤ ├──────┤ ├──────┤
│ . . . (continues) . . . │
└──────┘ └──────┘ └──────┘ └──────┘
2 Sectors for 8 KByte blocks
8 Sectors for 32 KByte blocks
16 Sectors for 64 KByte blocks
Link: https://ww1.microchip.com/downloads/en/DeviceDoc/20005013D.pdf
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
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QSPI driver performs chip select operation before every read/write
access. During this operation, driver needs to enable and disable
the QSPI controller. This may cause data loss if there is inadvertent
halting of any ongoing read/write operation. To avoid this scenario,
waiting for the QSPI status to be idle before next read/write
operation is implemented.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
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Takahiro Kuwano <Takahiro.Kuwano@infineon.com> says:
Those are 3.0V, 256Mb/2Gb NOR Flash devices with Octal interface.
Same fanctionalities with 1.8V version that are already supported.
Link: https://lore.kernel.org/r/cover.1743575001.git.Takahiro.Kuwano@infineon.com
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Infineon S28HL02GT is 3.0V, 2Gb Flash device with Octal interface.
It has the same functionalities with S28HS02GT.
Link: https://www.infineon.com/dgdl/Infineon-S28HS02GT_S28HS04GT_S28HL02GT_S28HL04GT_2Gb_4Gb_SEMPER_Flash_Octal_interface_1.8V_3.0V-DataSheet-v01_00-EN.pdf?fileId=8ac78c8c7e7124d1017f0631e33714d9
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
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Infineon S28HL256T is 3.0V, 256Mb Flash device with Octal interface.
It has the same functionalities with S28HS256T.
Link:https://www.infineon.com/dgdl/Infineon-S28HS256T_S28HL256T_256Mb_SEMPER_Flash_Octal_interface_1_8V_3-DataSheet-v02_00-EN.pdf?fileId=8ac78c8c8fc2dd9c018fc66787aa0657
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
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At the moment a mixture of ifdef(CONFIG_IS_ENABLED) and
CONFIG_IS_ENABLED(SPI_FLASH_BAR) is used in the spi-nor framework.
This leads to misbehaviour in the SPL as there is no Kconfig option
CONFIG_SPL_SPI_FLASH_BAR. This commit standardizes the use of
CONFIG_SPI_FLASH to get SPLs that load U-Boot proper from the
SPI flash to work again.
Fixes: 9bb02f7 (mtd: spi-nor: Fix the spi_nor_read() when config SPI_STACKED_PARALLEL is enabled)
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
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