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2022-03-14Merge tag 'video-20220314' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-video - fix display of the u-boot logo on Apple devices - convert Nokia RX-51 to CONFIG_DM_VIDEO
2022-03-14phy: cadence: Sierra: Move the link operations from serdes phy to link deviceAswath Govindraju
In commit 6f46c7441a9f ("phy: cadence: Sierra: Add a UCLASS_PHY device for links"), a separate udevice of type UCLASS_PHY was created for each link. Therefore, move the corresponding link operations under the link device. Also, change the uclass of sierra phy to UCLASS_MISC as it is no longer the phy device. Fixes: 6f46c7441a9f ("phy: cadence: Sierra: Add a UCLASS_PHY device for links") Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Reviewed-by: Georgi Vlaev <g-vlaev@ti.com>
2022-03-14rockchip: sdhci: Fix RK3399 eMMC PHY power cyclingAlper Nebi Yasak
The Rockchip RK3399 eMMC PHY has to be power-cycled while changing its clock speed to some higher speeds. This is dependent on the desired SDHCI clock speed, and it looks like the PHY should be powered off while setting the SDHCI clock in these cases. Commit ac804143cfd1 ("mmc: rockchip_sdhci: add phy and clock config for rk3399") attempts to do this in the set_ios_post() hook by setting the SDHCI clock once more while the PHY is turned off/on as necessary, as the SDHCI framework does not provide a way to override how it sets its clock. However, the commit breaks reinitializing the eMMC on a few boards including chromebook_kevin and reportedly ROCKPro64. This patch reworks the power cycling to utilize the SDHCI framework slightly better (using the set_control_reg() hook to power off the PHY and set_ios_post() hook to power it back on) which happens to fix the issue, at least on a chromebook_kevin. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-14usb: dwc2: handle return code of dev_read_size() in of to, plat functionWolfgang Grandegger
dev_read_size() returns -EINVAL (-22) if the property "g-tx-fifo-size" does not exist. If that's the case, we now keep the default value of 0. Signed-off-by: Wolfgang Grandegger <wg@aries-embedded.de>
2022-03-12Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spiTom Rini
- sunXi SPI fixups (Andre) - bcm iproc qspi (Rayagonda)
2022-03-12mtd: spi-nor-ids: Enable quad read for Gigadevice gd25lq128Niklas Cassel
The Gigadevice gd25lq128 serial flash exists in different versions, all which identify themselves using the same JEDEC id. gd25lq128c: https://www.gigadevice.com/datasheet/gd25lq128 gd25lq128d: https://www.gigadevice.com/datasheet/gd25lq128d However, all versions support quad read, so enable it. Tested and verified on the Sipeed MAix BiT board. Fixes: 30b9a28a3f2d ("mtd: spi-nor-ids: Add Gigadevice gd25lq128 ID") Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-03-09video: Allow drivers to allocate the frame buffer themselvesPali Rohár
When plat->base is set by driver then skip frame buffer reservation and allocation. Signed-off-by: Pali Rohár <pali@kernel.org>
2022-03-09video: bmp: Support x2r10g10b10 pixel formatJanne Grunau
Fixes the display of the u-boot logo on Apple silicon devices. Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-08Merge branch '2022-03-08-assorted-fixes'Tom Rini
- serial uclass fix, mailmap/gitignore updates
2022-03-08drivers: serial: Make sure we really return a serial deviceMark Kettenis
The stdout-path property in the device tree does not necessarily point at a serial device. On machines such as the Apple M1 laptops where the serial port isn't easy to access and users expect to see console output on the integrated display stdout-path may point at the device tree node for the framebuffer for example. If stdout-path does not point at a node for a serial device, the serial_check_stdout() will not find a bound device and will drop down into code that attempts to use lists_bind_fdt() to bind a device anyway. However, that fallback code does not check that the uclass of the device is UCLASS_SERIAL. So if stdout-path points at the framebuffer instead of the serial device it will return a UCLASS_VIDEO device. Since the code that calls this function expects the returned device to be a UCLASS_SERIAL device, U-Boot will crash as soon as it attempts to send output to the console. Add a check here to verify that the uclass of the bound device really is UCLASS_SERIAL. If it isn't, serial_check_stdout() will return an error and serial_find_console_or_panic() will use the serial device with sequence number 0 as the console and all is fine. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-03-08watchdog: rti_wdt: Add 10% safety margin to clock frequencyJan Kiszka
When running against RC_OSC_32k, the watchdog may suffer from running faster than expected, expiring earlier. The Linux kernel adds a 10% margin to the timeout calculation by slowing down the read clock rate accordingly. Do the same here, also to have comparable preset values for both drivers. Along this, fix the name of the local var holding to frequency - in Hz, not kHz. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Stefan Roese <sr@denx.de>
2022-03-08watchdog: armada_37xx: Probe driver also when watchdog is already runningPali Rohár
If Armada 37xx watchdog is started before U-Boot then CNTR_CTRL_ACTIVE bit is set, U-Boot armada-37xx-wdt.c driver fails to initialize and so U-Boot is unable to use or kick this watchdog. Do not check for CNTR_CTRL_ACTIVE bit and always initialize watchdog. Same behavior is implemented in Linux kernel driver. This change allows to activate watchdog in firmware which loads U-Boot. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-08drivers: watchdog: wdt-uclass.c: add a property u-boot, noautostartPhilippe Reynes
Since commit 492ee6b8d0e7 ("watchdog: wdt-uclass.c: handle all DM watchdogs in watchdog_reset()"), all the watchdog are started when the config WATCHDOG_AUTOSTART. To avoid a binary choice none/all, a property u-boot,noautostart may be added in the watchdog node of the u-boot device tree to not autostart this watchdog. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04arm64: a37xx: pinctrl: Fix PWM pins indexesMarek Behún
Commit 5534fb4f4833 ("arm64: a37xx: pinctrl: Correct PWM pins definitions") introduced bogus definitions os PWM pins: all 4 pins have index 11, instead of having indexes 11, 12, 13, 14. Fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04drivers: rtc: fix null pointer access in armada38x_rtc_resetFrancois Berder
Replace null pointer by pointer to device registers when calling armada38x_rtc_write. Signed-off-by: Francois Berder <fberder@outlook.fr> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04pci: pci_mvebu: Cleanup macro namesPali Rohár
Use "MVPCIE_" prefix instead of generic "PCIE_" prefix for pci_mvebu.c specific macros. Define offset macros for Root Port registers and use standard register macros from pci.h when accessing Root Port registers. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-04pci: pci_mvebu: Remove unused SELECT and lane_maskPali Rohár
Macro SELECT() is unused and struct mvebu_pcie field lane_mask is unused too. Remove them. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-03Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini
Update and fixes for sl28, lx2, pblimage generation for some powerpc products
2022-03-01phy: nop-phy: Fix phy reset if no reset-gpio definedTim Harvey
Ensure there is a valid reset-gpio defined before using it. Fixes: f9852acdce02 ("phy: nop-phy: Fix enabling reset") Cc: Adam Ford <aford173@gmail.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2022-02-28gpio: add sl28cpld driverMichael Walle
The gpio block is part of the sl28cpld sl28cpld management controller. There are three different flavors: the usual input and output where the direction is configurable, but also input only and output only variants. Signed-off-by: Michael Walle <michael@walle.cc> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-28watchdog: add sl28cpld watchdog driverMichael Walle
The watchdog timer is part of the sl28cpld management controller. The watchdog timer usually supervises the bootloader boot-up and if it bites the failsafe bootloader will be activated. Apart from that it supports the usual board level reset and one SMARC speciality: driving the WDT_TIMEOUT# signal. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-28misc: add sl28cpld base driverMichael Walle
Add a multi-function device driver which will probe its children and provides methods to access the device. Signed-off-by: Michael Walle <michael@walle.cc> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-02-25net: ravb: Add tx/rx delay flag checks and support for rgmii-rxidAdam Ford
Some boards like the Beacon RZ/G2 SOM use either flags for tx-internal-delay-ps, rx-internal-delay-ps or rgmii-rxid. In Linux the APSR_RDM flag is set when either rx-internal-delay-ps is set or the mode is rgmii-rxid, and the APSR_TDM is set when tx-internal-delay-ps is found or rgmii-txid is set, and both are set if rgmii-id is set. The ravb driver in U-Boot driver was missing rgmii-rxid support, so add that support in a similar fashion to what is done in Linux. Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-25clk: ccf: correct the test on the parent uclass in clk_enable/clk_disablePatrick Delaunay
It is safe to check if the uclass id on the device is UCLASS_CLK before to call the clk_ functions, but today this comparison is not done on the device used in API: clkp->dev->parent but on the device himself: clkp->dev. This patch corrects this behavior and tests if the parent device is a clock device before to call the clock API, clk_enable or clk_disable, on this device. Fixes: 0520be0f67e3 ("clk: prograte clk enable/disable to parent") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2022-02-25clk: Add clk_get_by_name_optionalSean Anderson
This adds a helper function for clk_get_by_name in cases where the clock is optional. Hopefully this helps point driver writers in the right direction. Also convert some existing users. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/20220115205247.566210-2-seanga2@gmail.com
2022-02-24clk: Inline clk_get_*_optionalSean Anderson
The optional varients of clk_get_* functions are just simple wrappers. Reduce code size a bit by inlining them. On platforms where it is not used (most of them), it will not be compiled in any more. On platforms where they are used, the inlined branch should not cause any significant growth. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/20211222171114.3091780-3-seanga2@gmail.com
2022-02-24clk: Rename clk_get_optional_nodevSean Anderson
This normalizes the name of this accessor function to put "_optional" last. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/20211222171114.3091780-2-seanga2@gmail.com
2022-02-24clk: cdce9xx: Convert .of_xlate to .requestSean Anderson
This xlate function just performs some checking. We can do this in request() instead and use the default xlate. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Tero Kristo <kristo@kernel.org> Link: https://lore.kernel.org/r/20211215164718.2778664-1-seanga2@gmail.com
2022-02-24clk: versaclock: Remove xlate functionSean Anderson
This function is the same as the default xlate. Remove it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20211201201317.2174547-1-seanga2@gmail.com
2022-02-24clk: Remove no-op request and rfree callbacksSean Anderson
These callbacks are optional. Remove ones which do nothing. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/20211201195100.2173465-1-seanga2@gmail.com
2022-02-24clk: Rename ICS8N3QV01 to CLK_ICS8N3QV01Sean Anderson
This driver was missing a clock prefix. Add one. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20211215163620.2770126-4-seanga2@gmail.com
2022-02-24clk: Alphabetize KconfigSean Anderson
This alphabetizes the Kconfig for the clock subsystem. This will help people find their clocks, and help prevent merge conflicts. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20211215163620.2770126-3-seanga2@gmail.com
2022-02-24clk: Alphabetize MakefileSean Anderson
This alphabetizes the clock makefile by Kconfig option. This will help prevent merge conflicts. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20211215163620.2770126-2-seanga2@gmail.com
2022-02-24driver: spi: add bcm iproc qspi supportRayagonda Kokatanur
IPROC qspi driver supports both BSPI and MSPI modes. Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Bharat Gooty <bharat.gooty@broadcom.com> Acked-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Roman Bacik <roman.bacik@broadcom.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-02-24spi: dw: Fix broken dw_spi_mem_ops()Niklas Cassel
The driver is currently using sizeof(op->cmd.opcode) in the op_len calculation. Commit d15de623013c ("spi: spi-mem: allow specifying a command's extension") changed op->cmd.opcode from one byte to two. Instead, a new struct member op->cmd.nbytes is supposed to be used. For regular commands op->cmd.nbytes will be one. Commit d15de623013c ("spi: spi-mem: allow specifying a command's extension") did update some drivers that overload the generic mem_ops() implementation, but forgot to update dw_spi_mem_ops(). Calculating op_len incorrectly causes dw_spi_mem_ops() to misbehave, since op_len is used to determine how many bytes that should be read/written. On the canaan k210 board, this causes the probe of the SPI flash to fail. Fix the op_len calculation in dw_spi_mem_ops(). Doing so results in working SPI flash on the canaan k210 board. Fixes: d15de623013c ("spi: spi-mem: allow specifying a command's extension") Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Tested-by: Damien Le Moal <damien.lemoal@opensource.wdc.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-02-24spi: cadence-qspi: Make reset control optionalChristian Gmeiner
In the TI am65 device tree files there is no reset defined. Also the Linux kernel driver uses devm_reset_control_get_optional_exclusive(..) to get the reset. Lets do the same as the kernel does and make thr reset optinal. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2022-02-23Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usbTom Rini
- OMAP EHCI updates
2022-02-23usb: ehci-omap: Remove OMAP_EHCI_PHYx_RESET_GPIO from KconfigAdam Ford
With the omap-ehci driver now using the phy subsystem to enable and disable reset, the driver no longer needs to know which GPIO's are used, and they can be removed from Kconfig. Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-23usb: ehci-omap: Use PHY system to manage phy resetsAdam Ford
There are a few boards that use hard-coded GPIO definitions in their respective defconfig files. If the GPIO's are listed in their device trees, the nop-phy can toggle the GPIO's, so the EHCI driver does not need to know anything about the GPIO's. Add functions for getting the phys and remove the GPIO toggles since the phy will now do that. Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-23usb: ehci-omap: Make Kconfig select PHY if USB_EHCI_OMAPAdam Ford
The USB_EHCI_OMAP driver currently has a series of Kconfig options which let users specify a GPIO for the reset pin. Some devices may have only one reset, while others might have more. Since there is a nop phy driver, let's selct enable the PHY system, and imply the nop phy driver. The nop phy driver can now toggle the reset pins when putting the phy in and out of reset. If the gpio is listed under the phy, it will get toggled and the hard-coded config options specifying the GPIO numbers can eventually go away. Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-23phy: nop-phy: Fix enabling resetAdam Ford
The reset function should place the phy into reset, while the init function should take the phy out of reset. Currently the reset function takes it out of reset, and the init calls the reset. Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-23usb: ehci-omap: Move omap_ehci_hcd_init to omap_ehci_probeAdam Ford
The OMAP3 hierarchy has the ehci node as a sub-node of the usbhshost. The usbhshost node contains an ohci and an ehci subnode. The configuration of the ehci belongs in the EHCI node and not its parent. Move it to the proper probe. usb start starting USB... Bus ehci@48064800: USB EHCI 1.00 Bus usb_otg_hs@480ab000: Port not available. scanning bus ehci@48064800 for devices... 3 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-23usb: ehci-omap: Drop dead codeAdam Ford
omap_ehci_hcd_stop appears to be dead code, and omap_ehci_hcd_init is only called by the probe function, so it can be static to that function. Remove both from the header along with some additional checking for DM_USB. Signed-off-by: Adam Ford <aford173@gmail.com>
2022-02-22phy: phy-uclass: check the parents for physAngus Ainslie
The port/hub leaf nodes don't contain the phy definitions in some dts files so check the parents. Signed-off-by: Angus Ainslie <angus@akkea.ca> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-02-21Merge branch '2022-02-21-platform-updates'Tom Rini
- Assorted updates / fixes for Apple, TI and Aspeed platforms
2022-02-21ti: i2c: fix probe_chip() return valueNikita Yushchenko
Per documentation, dm_i2c_ops.probe_chip() shall return -EREMOTEIO if probe fails. Currently, omap_i2c_probe_chip() returns 1 instead. Fix that. Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2022-02-21crypto: aspeed: fix polling RSA status wrong issueNeal Liu
Check interrupt status to see if RSA engine is completed. After completion of the task, write-clear the status to finish operation. Add missing register base for completion. Fixes: 89c36cca0b6 ("crypto: aspeed: Add AST2600 ACRY support") Signed-off-by: Neal Liu <neal_liu@aspeedtech.com> Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2022-02-21iommu: Add M1 Pro/Max support to Apple DART driverJanne Grunau
For the purpose of this driver (activating bypass mode) t6000-dart and t8103-dart are fully compatible. Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2022-02-21Merge tag 'xilinx-for-v2022.04-rc3' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2022.04-rc3 microblaze: - Fix exception handler zynqmp: - Show information about secure images - DT changes (som u-boot file removal) - Fix zynqmp_pm_cfg_obj_convert.py - Fix platform boot xilinx: - Fix bootm_size calculation - Remove GPIO_EXTRA_HEADER selection power: - Add zynqmp power management driver scsi: - Add phy support to ceva driver zynq qspi: - Fix unaligned accesses and check baudrate setup - Add support for spi memory operations net: - Fix 64bit calculation in axi_emac video: - Add missing gpio dependency for seps driver
2022-02-19mmc: fsl_esdhc_imx: correct the actual card clockHaibo Chen
The original code logic can not show the correct card clock, and also has one risk when the div is 0. Because there is div -=1 before. So move the operation before div -=1, and also involve ddr_pre_div to get the correct value. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Marek Vasut <marex@denx.de>
generated by cgit v1.2.3 (git 2.0.4) at 2025-11-05 18:16:41 +0000