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2022-01-13drivers/usb/gadget/dwc2_udc_otg.c: Fix spelling of "resetting".Vagrant Cascadian
2022-01-13drivers/ddr/altera/sequencer.c: Fix spelling of "resetting".Vagrant Cascadian
2022-01-13drivers/core/of_addr.c: Fix spelling of "shouldn't".Vagrant Cascadian
2022-01-13drivers/net/fec_mxc.c: Fix spelling of "resetting".Vagrant Cascadian
2022-01-13drivers/usb/musb/musb_udc.c: Fix spelling of "mismatch".Vagrant Cascadian
2022-01-13drivers/mtd/ubispl/ubispl.c: Fix spelling of "mismatched".Vagrant Cascadian
2022-01-13treewide: invaild -> invalidSean Anderson
Somewhere along the way, someone misspelt "invalid" and it got copied everywhere. Fix it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Alexander Dahl <ada@thorsis.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: sh7751: Fix access to config space via PCI_CONF1_ADDRESS() macroPali Rohár
sh7751 platform uses standard format of Config Address for PCI Configuration Mechanism #1. Commit 72c2f4acd76f ("pci: sh7751: Convert to DM and DT probing") which did conversion of PCI sh7751 driver to DM, broke access to config space as that commit somehow swapped device and function bits in config address. Fix all these issues by using new U-Boot macro PCI_CONF1_ADDRESS() which calculates Config Address correctly. Also remove nonsense function sh7751_pci_addr_valid() which was introduced in commit 72c2f4acd76f ("pci: sh7751: Convert to DM and DT probing") probably due to workarounded issues with mixing/swapping device and function bits of config address which probably resulted in non-working access to some devices. With correct composing of config address there should not be such issue anymore. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: 72c2f4acd76f ("pci: sh7751: Convert to DM and DT probing") Cc: Marek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: sh7780: Use PCI_CONF1_ADDRESS() macroPali Rohár
PCI sh7780 driver uses standard format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS(). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: mediatek: Use PCI_CONF1_EXT_ADDRESS() macroPali Rohár
PCI mediatek driver uses extended format of Config Address for PCI Configuration Mechanism #1 but with cleared Enable bit. So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() with clearing PCI_CONF1_ENABLE bit and remove old custom driver address macros. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: fsl: Use PCI_CONF1_EXT_ADDRESS() macroPali Rohár
PCI fsl driver uses extended format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_EXT_ADDRESS(). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: tegra: Use PCI_CONF1_EXT_ADDRESS() macroPali Rohár
PCI tegra driver uses extended format of Config Address for PCI Configuration Mechanism #1 but with cleared Enable bit. So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() with clearing PCI_CONF1_ENABLE bit and remove old custom driver address function. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: mvebu: Use PCI_CONF1_EXT_ADDRESS() macroPali Rohár
PCI mvebu driver uses extended format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_EXT_ADDRESS() and remove old custom driver address macros. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: msc01: Use PCI_CONF1_ADDRESS() macroPali Rohár
PCI msc01 driver uses standard format of Config Address for PCI Configuration Mechanism #1 but with cleared Enable bit. So use new U-Boot macro PCI_CONF1_ADDRESS() with clearing PCI_CONF1_ENABLE bit and remove old custom driver address macros. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: mpc85xx: Use PCI_CONF1_EXT_ADDRESS() macroPali Rohár
PCI mpc85xx driver uses extended format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_EXT_ADDRESS(). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: gt64120: Use PCI_CONF1_ADDRESS() macroPali Rohár
PCI gt64120 driver uses standard format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS() and remove old custom driver address macros. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-12pci: When disabling pref MEM set all base bitsPali Rohár
It is common to set all base address bits to one and all limit address bits to zero for disabling address forwarding. Forwarding is disabled when base address is higher than limit address, so this change should not have any effect. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12pci: Disable I/O forwarding during autoconfiguration if unsupportedPali Rohár
If U-Boot does not have any I/O resource for assignment then disable I/O forwarding in PCI bridge autoconfiguration code. Default initial state of PCI bridge IO registers is unspecified, therefore they can be in enabled if U-Boot does not touch them. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12pci: Fix register for determining type of IO base addressPali Rohár
Function dm_pciauto_prescan_setup_bridge() configures base address registers, therefore it should read type of IO from base address registers (and not from limit address registers). Note that base and limit address registers should have same type, so this change is just usage correction and has no functional change on correctly working hardware. Fixes: 8e85f36a8fab ("pci: Fix configuring io/memory base and limit registers of PCI bridges") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12pci: pci_octeontx: Use PCIE_ECAM_OFFSET() macroPali Rohár
Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-01-12pci: pcie_iproc: Use PCIE_ECAM_OFFSET() macroPali Rohár
Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h Signed-off-by: Pali Rohár <pali@kernel.org>
2022-01-12pci: pcie-brcmstb: Use PCIE_ECAM_OFFSET() macroPali Rohár
Replace custom driver macros by PCIE_ECAM_OFFSET() macro from pci.h Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
2022-01-12mmc: dwmmc: return a proper error code when busyJohn Keeping
When failing to send a command because the hardware is busy, return EBUSY to indicate the cause instead of just -1. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: set sysctl register for clock initializationSean Anderson
[ fsl_esdhc commit 263ddfc3454ead3a988adef39b962479adce2b28 ] The initial clock setting should be through sysctl register only, while the mmc_set_clock() will call mmc_set_ios() introduce other configurations like bus width, mode, and so on. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12mmc: fsl_esdhc_imx: Replace more #ifdefs by ifSean Anderson
This builds on the previous patch by converting yet more preprocessor macros to C ifs. This is split off so that the changes adapted from Micheal's patch may be clearly distinguished from the ones I have authored myself. MMC_SUPPORTS_TUNING should really get a Kconfig conversion. And DM_GPIO needs some -ENOSYS stubs when it isn't defined. Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12mmc: fsl_esdhc_imx: replace most #ifdefs by IS_ENABLED()Sean Anderson
[ fsl_esdhc commit 52faec31827ec1a1837977e29c067424426634c5 ] Make the code cleaner and drop the old-style #ifdef constructs where it is possible. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12mmc: fsl_esdhc_imx: simplify esdhc_setup_data()Sean Anderson
[ fsl_esdhc commit 7e48a028a42c111ba38a90b86e5f57dace980fa0 ] First, we need the waterlevel setting for PIO mode only. Secondy, both DMA setup code is identical for both directions, except for the data pointer. Thus, unify them. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: use dma-mapping APISean Anderson
[ fsl_esdhc commit b1ba1460a445bcc67972a617625d0349e4f22b31 ] Use the dma_{map,unmap}_single() calls. These will take care of the flushing and invalidation of caches. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: simplify 64bit check for SDMA transfersSean Anderson
[ fsl_esdhc commit da86e8cfcb03ed5c1d8e0718bc8bc8583e60ced8 ] SDMA can only do DMA with 32 bit addresses. This is true for all architectures (just doesn't apply to 32 bit ones). Simplify the code and remove unnecessary CONFIG_FSL_LAYERSCAPE. Also make the error message more concise. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: fix mmc->clock with actual clockSean Anderson
[ fsl_esdhc commit 30f6444d024a74ee48aa6969c1531aecd3c59deb ] Fix mmc->clock with actual clock which is divided by the controller, and record it with priv->clock. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: drop redundant code for non-removable featureSean Anderson
[ fsl_esdhc commit commit 08197cb8dff7cd097ab07a325093043c39d19bbd ] Drop redundant code for non-removable feature. "non-removable" property has been read in mmc_of_parse(). Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> [ set MMC_CAP_NONREMOVABLE in plat->cfg.host_caps ] Signed-off-by: Sean Anderson <sean.anderson@seco.com>
2022-01-12mmc: fsl_esdhc_imx: clean up bus width configuration codeSean Anderson
[ fsl_esdhc commit 07bae1de382723b94244096953b05225572728cd ] This patch is to clean up bus width setting code. - For DM_MMC, remove getting "bus-width" from device tree. This has been done in mmc_of_parse(). - For non-DM_MMC, move bus width configuration from fsl_esdhc_init() to fsl_esdhc_initialize() which is non-DM_MMC specific. And fix up bus width configuration to support only 1-bit, 4-bit, or 8-bit. Keep using 8-bit if it's not set because many platforms use driver without providing max bus width. - Remove bus_width member from fsl_esdhc_priv structure. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> [ converted if statement to switch ] Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: fix voltage validationSean Anderson
[ fsl_esdhc commit 5b05fc0310cd933acf76ee661577c6b07a95e684 ] Voltage validation should be done by CMD8. Current comparison between mmc_cfg voltages and host voltage capabilities is meaningless. So drop current comparison and let voltage validation is through CMD8. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: remove redundant DM_MMC checkingSean Anderson
[ fsl_esdhc commit 2913926f3b3dec282f8773e3c02377c9600d8267 ] Remove redundant DM_MMC checking which is already in DM_MMC conditional compile block. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-12mmc: fsl_esdhc_imx: make BLK as hard requirement of DM_MMCSean Anderson
U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already support it, so let's force to use it. - Drop non-BLK support for DM_MMC introduced by below patch. 66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled - Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC). - Use DM_MMC instead of BLK for conditional compile. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2022-01-10Merge branch 'next'Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2022-01-09Merge tag 'u-boot-amlogic-20220107' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-amlogic into next - disable CONFIG_NET_RANDOM_ETHADDR when unnecessary on amlogic based configs - meson64_android: add board specific env settings, in order to support VIM3/L for android - add changes to support VIM3/L android boot by using meson64_android.h config
2022-01-08usb: gadget: dwc2_udc_otg: set ep's desc during enable/disableGary Bisson
Fastboot support has been broken on platforms using dwc2 controller since the gadget gets its max packet size from it. This patch is the equivalent of 723fd5668ff which fixed the same issue but for the chipidea controller. Fixes: 27c9141b111 ("usb: gadget: fastboot: use correct max packet size") Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2022-01-07Revert "clk: Detect failure to set defaults"Marek Vasut
This reverts commit 92f1e9a4b31c0bf0f4f61ab823a6a88657323646. The aforementioned patch causes massive breakage on all platforms which have 'assigned-clock' DT property in their DT which references any clock that are not supported by the platform clock driver. That can easily happen either in SPL, or because the clock driver is reduced. Currently it seems all iMX8M are affected and fail to boot altogether. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Peng Fan <peng.fan@oss.nxp.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-12-31Merge tag 'efi-next' of https://source.denx.de/u-boot/custodians/u-boot-efi ↵Tom Rini
into next Pull request of efi-next Documentation: * Add Sunxi board description UEFI: * Improvements to U-Boot running on top of UEFI
2021-12-31efi: serial: Support arrow keysSimon Glass
At present only the backspace key is supported in U-Boot, when running as an EFI app. Add support for arrows, home and end as well, to make the CLI more friendly. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-12-28Merge tag 'video-next-20211228' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-video into next - various fixes to the sandbox display support - support for showing a logo without splash screen config - support for BMP drawing to depths other than 16bpp - tests for the different types of supported BMP images - support showing a logo when running coreboot via qemu
2021-12-28Merge tag 'video-20211228' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-video - mxsfb axi/disp_axi clock enable fix
2021-12-28Merge tag 'efi-2022-01-rc4-4' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2022-01-rc4-4 UEFI: * allow for more than 16 KiB UEFI variable size when using StMM Others: * make watchdog sysreset compatible with separate poweroff driver * avoid OpenSSL deprecation warnings
2021-12-27Convert CONFIG_KIRKWOOD_GPIO to KconfigTom Rini
This converts the following to Kconfig: CONFIG_KIRKWOOD_GPIO Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27serial: arm_dcc: Use CONFIG_ARM64 not CONFIG_CPU_ARMV8Tom Rini
The only place we use CONFIG_CPU_ARMV8 was in the arm_dcc serial driver. Switch this to CONFIG_ARM64 today, and if in the future we need finer granularity tuning here, a new CONFIG_SERIAL option needs to be introduced. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27Finish conversion of CONFIG_SYS_CLK_FREQ to KconfigTom Rini
In order to finish moving this symbol to Kconfig for all platforms, we need to do a few more things. First, for all platforms that define this to a function, introduce CONFIG_DYNAMIC_SYS_CLK_FREQ, similar to CONFIG_DYNAMIC_DDR_CLK_FREQ and populate clock_legacy.h. This entails also switching all users from CONFIG_SYS_CLK_FREQ to get_board_sys_clk() and updating a few preprocessor tests. With that done, all platforms that define a value here can be converted to Kconfig, and a fall-back of zero is sufficiently safe to use (and what is used today in cases where code may or may not have this available). Make sure that code which calls this function includes <clock_legacy.h> to get the prototype. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27Finish conversion CONFIG_SYS_NAND_SELF_INIT to KconfigTom Rini
In order to finish this conversion we need to add a symbols for SPL_SYS_NAND_SELF_INIT and TPL_SYS_NAND_SELF_INIT as there are cases there where we need to, or need to not, use that framework as things stand. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27Convert CONFIG_TEGRA_NAND to KconfigTom Rini
This converts the following to Kconfig: CONFIG_TEGRA_NAND Signed-off-by: Tom Rini <trini@konsulko.com>
2021-12-27Convert CONFIG_SYS_PCI_64BIT to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_PCI_64BIT Signed-off-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-06 00:26:13 +0000