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https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/25267
- Allow the registration and enablement of the i.MX UART clocks via DM,
without the need of manually calling init_uart_clk().
- Remove duplicated 'mmc dev ${mmcdev}' commands.
- Rework some of the RAM related Kconfig symbols for phycore_imx8mp.
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If SPL_CLK_IMX8MP is selected alone, it causes a build error.
The clock composite is required when using the clock framework, so
select it when SPL_CLK_IMX8MP is enabled. This is already being
done outside of SPL.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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Depending on the platform, there may be multiple clock sources
required to enable a UART. Use the bulk functions to get and
enable the clocks when the UART probes. This can facilitate
the removal of functions to manually enable the clock.
This is made dependent on CLK_CCF which is used on imx6q,
imx8m[mnqp], several imxrt, imx9. If/when the UART clock
registration is done for older boards, this limitation
could be updated.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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In order to let the serial driver enable the clocks, the UART clocks
must be registered first.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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In order to let the serial driver enable the clocks, the UART clocks
must be registered first.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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In order to use the driver model and clock system to enable UART
clocks from the serial driver, it's necessary to register the UART
clocks. With the helper function to check for imx6qp vs other
variants, the UART can register for both scenarios.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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The ECSPI clock has the ability to select between pll3_60m and
osc on the imx6qp, where it's fixed on other variants. Fix this
by adding using a helper function to determine SoC variant and
register the clock accordingly.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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We can call phy_modify_mmd() instead of manually calling drv->readext()
and drv->writeext().
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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Various signal skew values may be set in the device tree for the ksz9131
Ethernet PHY. For example, the RZ/G2L board requires non-default values
for rxc-skew-psec & txc-skew-psec.
This is based on the ksz9131 phy driver in Linux v6.11.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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Micrel KSZ9131 PHY LED behavior is not correct when configured in
Individual Mode, LED1 (Activity LED) is in the ON state when there is
no-link.
Workaround this by setting bit 9 of register 0x1e after verifying that
the LED configuration is Individual Mode.
This issue is described in KSZ9131RNX Silicon Errata DS80000693B [*]
and according to that it will not be corrected in a future silicon
revision.
[*] https://ww1.microchip.com/downloads/en/DeviceDoc/KSZ9131RNX-Silicon-Errata-and-Data-Sheet-Clarification-80000863B.pdf
Based on commit 0316c7e66bbd in the Linux kernel.
Tested-by: Quentin Schulz <quentin.schulz@cherry.de> # RK3588 Tiger
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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In ravb_probe(), we were missing a couple of things in the error
handling path:
* We must unregister the MDIO bus before freeing the corresponding
struct mii_dev instance to avoid the potential for use-after-free
bugs.
* We must free the resources acquired by clk_get_bulk() even if the
clocks have not yet been enabled.
Fixes: 8ae51b6f324e ("net: ravb: Add Renesas Ethernet RAVB driver")
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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Extend the existing Renesas R-Car Gen3 USB 2.0 PHY driver to support the
RZ/G2L and related SoCs.
Also enable this driver by default for the RZ/G2L SoC family.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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Bind the USB VBUS regulator driver under the USB PHY reset driver for
the Renesas RZ/G2L and related SoCs. This additional bind is needed as
the corresponding device tree node does not contain a compatible string.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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Add a new regulator driver to control the USB VBUS supply on the Renesas
RZ/G2L and related SoCs.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
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Add a new driver to control the USB 2.0 PHY reset controller on the
Renesas RZ/G2L and related SoCs.
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
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https://source.denx.de/u-boot/custodians/u-boot-ufs into next
- initial cleanup and defines sync with Linux v6.12
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Sync ufshci.h with the version found in the Linux v6.12
version commit adc218676eef ("Linux 6.12").
It adds new defines, and moves defines to the same place
as the Linux header.
No functional changes intended.
Acked-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Love Kumar <love.kumar@amd.com>
[narmstrong: do not rename CFG_RESULT_CODE_MASK]
Link: https://lore.kernel.org/r/20241230-topic-ufs-cleanup-v2-6-4c6d7994a45d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Sync unipro.h with the version found in the Linux v6.12
version commit adc218676eef ("Linux 6.12").
It adds new defines, and moves defines to the same place
as the Linux header.
No functional changes intended.
Acked-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Love Kumar <love.kumar@amd.com>
Link: https://lore.kernel.org/r/20241230-topic-ufs-cleanup-v2-5-4c6d7994a45d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Splitting the header will help synchronizing the defines
again with Linux.
Acked-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Love Kumar <love.kumar@amd.com>
Link: https://lore.kernel.org/r/20241230-topic-ufs-cleanup-v2-4-4c6d7994a45d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Fixes some alignment warnings, missing comments on write barrier,
missing parenthesis around macro parameters and a comment typo.
No functional changes intended.
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Love Kumar <love.kumar@amd.com>
Link: https://lore.kernel.org/r/20241230-topic-ufs-cleanup-v2-3-4c6d7994a45d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Mark the remaining local functions as static to avoid build
warnings.
Also drop the EXPORT_SYMBOL of ufshcd_map_desc_id_to_length.
Tested-by: Love Kumar <love.kumar@amd.com>
Link: https://lore.kernel.org/r/20241230-topic-ufs-cleanup-v2-2-4c6d7994a45d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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Add missing ufs.h causing build warning on some symbols.
Tested-by: Love Kumar <love.kumar@amd.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Link: https://lore.kernel.org/r/20241230-topic-ufs-cleanup-v2-1-4c6d7994a45d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
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On PowerPC platforms with TPL enabled and SPL_SYS_NS16550_SERIAL
enabled, today this builds under TPL as well due to how $(XPL_) is
defined. Add the TPL_SYS_NS16550_SERIAL itself for consistency and
clarity.
Signed-off-by: Tom Rini <trini@konsulko.com>
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- Add USB support on Starfive JH7110
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https://source.denx.de/u-boot/custodians/u-boot-nand-flash into next
CI: https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/25178
This merge request add support for cadence raw nand driver for agilex
board and add a fix to meson driver.
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Add Starfive cdns USB3 wrapper driver.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: E Shattow <lucent@gmail.com>
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Cdns core driver also get dr mode from wrapper devcie dts node
to make it is same with Starfive cdns USB Linux kernel driver,
Starfive 7110 OF_UPSTREAM is enabled
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Marek Vasut <marex@denx.de>
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Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
PHY driver and can be used as USB 3.0 driver.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Tested-by: E Shattow <lucent@gmail.com>
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Add Starfive JH7110 USB 2.0 PHY driver, which is generic
PHY driver.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Tested-by: E Shattow <lucent@gmail.com>
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USB PHY maybe need to set PHY mode in different USB
dr mode. So translate USB PHY mode to generic PHY mode
and call generic_phy_set_mode().
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Marek Vasut <marex@denx.de>
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If 'oob_required' is not set by the caller (for example 'oobbuf' is NULL),
then driver doesn't copy OOB data from 'oob_poi' to special controller
structures, so zeroes will be written as OOB. But, generic raw NAND logic
in 'nand_base.c' already handles case when OOB is not required to write by
filling 'oob_poi' with 0xFF's. So let's remove 'oob_required' check to
always read 'oob_poi' data for OOB.
Kernel driver (drivers/mtd/nand/raw/meson_nand.c) works in the same way,
so need to keep same behaviour here.
Fixes: c2e8c4d09a7a ("mtd: rawnand: Meson NAND controller support")
Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
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Add SYS_NAND_PAGE_SIZE dependency for cadence NAND.
This config is needed as the SPL driver will use this parameter
to read uboot-proper image in NAND during booting.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
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Enable the Kconfig and Makefile for the Cadence-Nand
SPL support in agilex5 family device.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
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Add support for spl nand to load binary image from NAND
to RAM. Leverage the existing nand_spl_load_image from nand_spl_loaders.c
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
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Leverage linux code to support hardware ECC interface
to verify nand bad block.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
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Enable the Kconfig and Makefile for the
Cadence NAND driver for the agilex5 family device.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
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Enable nand to use bounce buffer. In bounce buffer,
read/write buf will use cadence->buf which has been allocated
using malloc. This will align the memory and avoid memory to be
allocated in different addresses.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
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Poll for thread complete status to ensure the
descriptor processing is complete. If complete then can ensure
controller already update the descriptor status.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
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Ensure ddr memory is updated with the data from dcache.
This would help to ensure cdma always reading the latest dma descriptor
from ddr memory.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
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Support NAND_CMD_SET_FEATURES & NAND_CMD_GET_FEATURES.
These commands is one of the basic commands of NAND. The parameters get
from these commands will be used to set timing mode
of NAND data interface.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
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Support nand reset command for Cadence Nand Driver.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
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Add support for reading param page of NAND device.
These paramaters are unique and used for identification purpose.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
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Add support for readid command in Cadence NAND driver.
The id is unique and used for flash identification.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
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Add support for read status command
in Cadence NAND driver. This status bit is important to check
whether the flash is write-protected.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
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Enable driver for Cadence NAND for the family
device agilex5. This driver is leveraged from the path
/drivers/mtd/nand/raw/cadence-nand-controller.c from the
stable version 6.11.2.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
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The configuration options CONFIG_VIDCONSOLE_AS_LCD and CONFIG_VIDCONSOLE_AS_
NAME have been marked as obsolete and scheduled for deletion in late 2020.
That's already long overdue and the last remaining consumers of these options
have already migrated to using "vidconsole" in their "stdout" and "stderr"
environment variables, so let's delete these two configuration options.
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Acked-by: Soeren Moch <smoch@web.de> # tbs2910
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/25142
- Support Toradex i.MX6 Apalis/Colibri v1.2 SoM.
- Guard tee.bin inclusion on imx9,
- Remove unneeded regulator entry on DH i.MX6 DHCOM DRC02 devicetree.
- Add i.MX mailbox driver
- Convert ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE to Kconfig.
- Cope with existing optee node on imx8m.
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Driver uses dev_get_priv() but never allocates it in its
declaration leading to various crashes. Fix this by explicitly
allocating the storage.
Fixes: 9b0b5648d6e4 ("memory: Add TI GPMC driver")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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This patch provides a driver for i.MX Messaging Unit (MU) using the
commom mailbox framework.
This is ported from Linux (v6.12.8) driver
drivers/mailbox/imx-mailbox.c. Its commit SHA is:
39d7d6177f0c ("mailbox: imx: use device name in interrupt name")
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
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The flag for enabling the ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE quirk can be
handled easily enough in Kconfig. This lets us remove a function but not
obviously correct usage of the IS_ENABLED() macro.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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