summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)Author
2025-04-08mtd: ubi: annotate fallthroughAndre Przywara
The UBI code uses an implicit switch/case fallthrough when handling two related cases of bad header errors. Also there is a switch/case for unit prefix handling (G/M/K), which accumulates multiplications. Add our "fallthrough;" statement-like macro before the respective labels in both cases, to avoid a warning when GCC's -Wimplicit-fallthrough warning option is enabled. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2025-04-08net: e1000: annotate switch/case fallthroughAndre Przywara
The E1000 driver uses an implicit switch/case fallthrough for sharing some code supporting different PHYs. Add our "fallthrough;" statement-like macro before the two labels in e1000_set_phy_type(), to avoid a warning when GCC's -Wimplicit-fallthrough warning option is enabled. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2025-04-08video: annotate switch/case fall-throughAndre Przywara
The generic DM video code uses an implicit switch/case fallthrough to provide fallback code paths when certain colour depths are not enabled. Add our "fallthrough;" statement-like macro to the video_fill() function to avoid a warning when GCC's -Wimplicit-fallthrough warning option is enabled. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2025-04-08usb: xhci: annotate switch/case fallthrough properlyAndre Przywara
The USB XHCI code uses an implicit switch/case fallthrough to share code for handling full speed and low speed transfers. Add our "fallthrough;" statement-like macro before the second label in the XHCI code, to avoid a warning when GCC's -Wimplicit-fallthrough warning option is enabled. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2025-04-08usb: ohci-hcd: annotate switch/case fallthroughAndre Przywara
The USB OCHI code uses an implicit switch/case fallthrough after checking for valid descriptor IDs. Add our "fallthrough;" statement-like macro before the default branch in the OHCI code, to avoid a warning when GCC's -Wimplicit-fallthrough warning option is enabled. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2025-04-08net: sun8i-emac: annotate fallthroughAndre Przywara
The Allwinner sun8i EMAC driver uses an implicit switch/case fallthrough when setting up the MAC/PHY communication protocol, to handle the case when RMII is requested, but would not be supported by the hardware. Add our "fallthrough;" statement-like macro before the default branch in sun8i_emac_set_syscon(), to avoid a warning when GCC's -Wimplicit-fallthrough warning option is enabled. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2025-04-08fastboot: annotate switch/case fallthrough caseAndre Przywara
The fastboot command handling uses an implicit switch/case fallthrough when receiving the OEM_CONSOLE command, but when this command is not enabled in Kconfig, to report this command as unknown. Add our "fallthrough;" statement-like macro before the default branch in the fastboot code, to avoid a warning when GCC's -Wimplicit-fallthrough warning option is enabled. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-04-08gadget: f_thor: annotate switch/case fallthroughAndre Przywara
Even though we seem to catch POWEROFF and EFSCLEAR commands in the THOR protocol request handling, we ultimately do not seem to handle them (apart from sending a response), so those commands still print an error message. Annotate the switch/case fallthrough in this case, to make this clear to the compiler. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-03-21usb: dwc3: gadget: Fix match_ep callback for NXP UUU toolMarek Vasut
The UUU tool excepts the interrupt-in endpoint to be ep1in, otherwise it crashes. This is a result of the previous hard-coded EP setup in drivers/usb/gadget/epautoconf.c which did special-case EP allocation for SPL builds, and which was since converted to this callback, but without the special-case EP allocation in SPL part. This reinstates the SPL part in an isolated manner, only for NXP iMX SoCs, only for SPL builds, and only for the ep1in interrupt-in endpoint. Fixes: 1918b8010c32 ("usb: dwc3: gadget: Convert epautoconf workaround to match_ep callback") Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Link: https://lore.kernel.org/r/20250319220805.219001-1-marex@denx.de Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-03-16ram: renesas: dbsc5: Make struct renesas_dbsc5_board_config publicMarek Vasut
Make struct renesas_dbsc5_board_config {} definition public via include/dbsc5.h, so this structure can be defined in board files and passed into the DBSC5 DRAM driver by overriding weak function dbsc5_get_board_data() on board level. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-03-16ram: renesas: dbsc5: Add V4H-3/V4H-5/V4H-7 OTP based detectionMarek Vasut
Add auto-detection and handling of Renesas R-Car V4H-3 and V4H-5 in addition to V4H-7 SoC variants based on OTP fuse programming. The V4H-3 and V4H-5 variants have reduced DRAM frequency options. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-03-16ram: renesas: dbsc5: Synchronize initialization code to rev.1.10Marek Vasut
Update the DRAM initialization code to match DBSC5 initialization code rev.1.10 , which is currently the latest version available. This makes DRAM initialization operational on Renesas R-Car V4H R8A779G0 rev.3.0. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-03-16ram: renesas: dbsc5: Fix DBTR11 calculationMarek Vasut
Reinstate missing increment by two in DBTR11 calculation based on the original DBSC5 initialization code rev.0.80. The original code did ... ODTLon - (js2[JS2_tODTon_min] - 1) + 1 , which was incorrectly converted into ODTLon - js2[JS2_tODTon_min], but should have been converted to ODTLon - js2[JS2_tODTon_min] + 2. Add the missing +2 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-03-16ram: renesas: dbsc5: Fix JS1 index calculationMarek Vasut
The JS1 index is calculated correctly, but the limiter cannot be the max() function because the index should be lower than JS1_USABLEC_SPEC_HI and the max() function would unconditionally override the JS1 index to JS1_USABLEC_SPEC_HI. Use clamp() to limit the JS1 index instead. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-03-16ram: renesas: dbsc5: Fix bitrate MD pin parsingMarek Vasut
Fix copy paste error in MD pin handling for 5500 Mbps and 4800 Mbps case, each should be handled by MD[19,17] == 2 and MD[19,17] == 3 respectively. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-03-05Merge tag 'xilinx-for-v2025.04-rc4' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze AMD/Xilinx changes for v2025.04-rc4 Zynq: - Guard code around SPL_FS_LOAD_PAYLOAD_NAME Versal*: - Remove tftp block size 4096 Versal: - Use clocks per DT binding - Store driver data in data section Versal Gen 2: - Fix major/minor version decoding
2025-03-04led: Fix next Coverity scan errorHeiko Schocher
The following was reported by Coverity scan: *** CID 542488: Control flow issues (NO_EFFECT) /drivers/led/led-uclass.c: 277 in led_get_function_name() 271 return uc_plat->label; 272 273 /* Now try to detect function label name */ 274 func = dev_read_string(dev, "function"); 275 cp = dev_read_u32(dev, "color", &color); 276 // prevent coverity scan error CID 541279: (TAINTED_SCALAR) >>> CID 542488: Control flow issues (NO_EFFECT) >>> This less-than-zero comparison of an unsigned value is never true. "color < 0U". 277 if (color < LED_COLOR_ID_WHITE || color >= LED_COLOR_ID_MAX) 278 cp = -EINVAL; 279 Fix it. Addresses-Coverity-ID: 542488 Link: https://lists.denx.de/pipermail/u-boot/2025-February/581567.html Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-03-04gpio: 74x146: depend on DM_SPIJ. Neuschäfer
Currently, Kconfig allows building CONFIG_DM_74X164 without CONFIG_DM_SPI, which results in linker errors because this driver actually uses dm_spi_* functions: drivers/gpio/74x164_gpio.o: in function `gen_74x164_write_conf': undefined reference to `dm_spi_claim_bus' undefined reference to `dm_spi_xfer' undefined reference to `dm_spi_release_bus' Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
2025-03-04Revert "dm: core: Simplify dm_probe_devices()"Simon Glass
Unfortunately this change was not safe as some devices are bound before relocation, but we don't want to probe them. It causes 'raise: Signal # 8 caught' on jerry. Move the bootstage timer to after autoprobe in initf_dm() since the trace test does not tolerate any variance. This reverts commit 21dd873572a01d74bfdfceb7a30b056f8ccba187. Signed-off-by: Simon Glass <sjg@chromium.org>
2025-03-03arm64: versal2: Show major and minor silicon versionMichal Simek
ES1 silicon is 0x10 (16) and production is 0x20 (32) but correct number to see are v1.0 or v2.0 instead of v16 or v32. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20095339334fe07f373ffae3bdbfec51f5a00dc7.1739882585.git.michal.simek@amd.com
2025-03-03clk: versal: Store driver data in data sectionPadmarao Begari
Line 171 in README is describing that before relocation no code should use global variable because global variables are placed to BSS section which is initialized to 0 after relocation. On Versal platforms clock driver is initialized before relocation (via using dm,bootph-all flag in DT) and global variables are initialized which works if this is used only before relocation. But the variables are used after relocation too but values are zeroed which is ending up incorrect behavior. That's why place variables to data section to ensure that values are not cleared which is for now the quickest temporary solution. The correct way to do it is to move all global variables to private data to avoid it. Signed-off-by: Padmarao Begari <padmarao.begari@amd.com> Link: https://lore.kernel.org/r/20250218052419.1141139-1-padmarao.begari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-03-03clk: versal: Update the reference clocks as per bindingsVenkatesh Yadav Abbarapu
As per the bindings the reference clocks naming has changed from "pl_alt_ref_clk" to "pl_alt_ref" and "ref_clk" to "ref". Update the same in the clock driver. Also add the fallback option for older DT bindings. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20250206091533.1447234-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-03-03crypto: fsl_hash: fix flush dcache alignment in caam_hash()Benjamin Lemouzy
Loading a FIT kernel image with hash hardware acceleration enabled (CONFIG_SHA_HW_ACCEL=y) displays the following CACHE warning: [...] Trying 'kernel-1' kernel subimage [...] Verifying Hash Integrity ... sha256CACHE: Misaligned operation at range [16000128, 1673fae8] [...] Trying 'ramdisk-1' ramdisk subimage [...] Verifying Hash Integrity ... sha256CACHE: Misaligned operation at range [1676d6d4, 1737a5d4] [...] Trying 'fdt-imx6q-xxx.dtb' fdt subimage [...] Verifying Hash Integrity ... sha256CACHE: Misaligned operation at range [1673fbdc, 1674b0dc] [...] This patch fixes it. Tested on: - i.MX 6 custom board - LS1021A custom board Signed-off-by: Benjamin Lemouzy <blemouzy@centralp.fr> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-03-03net: tsec: Re-arm packet buffer in error caseJ. Neuschäfer
When an error is detected in the TSEC receive path, the driver currently prints an error message, but leaves the corresponding packet descriptor in its old state (i.e. owned by the CPU side). As a result, the packet queue can be starved of available buffers if enough errors happen. To recover from errors, re-arm the packet buffer descriptor after an error has been detected. Errors can be provoked by changing a PHY with phy-mode = "rgmii-id" to phy-mode = "rgmii". Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-03-03net: tsec: Reorder tsec_recv and tsec_free_pktJ. Neuschäfer
This is necessary for the following patch. No functional change. Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-02-28clk: rockchip: Correct usage of IS_ENABLED() macroTom Rini
These two files were using IS_ENABLED() to test for CONFIG flags but omitted the CONFIG_ prefix and so did not work as expected. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-02-26pinctrl: qcom: sm8250: fix pin countCaleb Connolly
The pin count wasn't updated when the special pins were added, as a result it was never possible to configure the special pins on SM8250 boards. Fix the pin count and allow the special pins to be configured. This fixes sdcard support on the RB5. Fixes: 58fa52042471 ("pinctr: qcom: sm8250: add special pins pins configuration data") Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-02-26power: regulator: add additional supported LDOs for pm8150lCaleb Connolly
Add the other LDOs that our rpmh driver can currently support. Some of these are used on the RB5 to power the sdcard. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-02-26clk: stub: add sm8150 compatible idJulius Lehmann
Add support for sm8150 clock controller to clk stub driver. Signed-off-by: Julius Lehmann <lehmanju@devpi.de> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-02-26clk: add stub clock driverCaleb Connolly
Add a stub clock driver which can be used to bind clock controllers which aren't required for the platform to boot, but which are needed for U-Boot drivers to work. In addition, add a NOP parent driver to allow for binding the parent nodes of the clock. Initially this driver supports a Qualcomm platform where the MMC driver tries to fetch the RPM clock controller, which is not actually required for the device to work. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-02-24mmc: Fix size calculation for sector addressed MMC version 4Marek Vasut
For eMMC v4 and newer that is smaller than 2 GiB, the JEDEC JESD84-B51 section 6.2.4 Configure partitions indicates that EXT_CSD SEC_COUNT should not be used to determine device size, and instead device size should be calculated from C_SIZE and C_SIZE_MULT. This is not exactly accurate, the 2 GiB limit is not a hard line, there are eMMC devices which are smaller than 2 GiB and still require device size to be determined from EXT_CSD SEC_COUNT. The hard line is instead OCR HCS bit, which indicates whether the device is byte or sector addressed, the former applies to most devices below 2 GiB, and the later applies mostly to devices above 2 GiB. However, there are a couple of devices which are smaller than 2 GiB and still set the OCR HCS bit to indicate they are sector addressed, and therefore the size calculation for those devices should also use EXT_CSD SEC_COUNT . Use mmc->high_capacity flag to discern the devices instead of arbitrary 2 GiB limit. The mmc->high_capacity flag reflects the OCR HCS bit state. Fixes: 639b7827d1ca ("mmc: fix the condition for MMC version 4") Signed-off-by: Marek Vasut <marex@denx.de>
2025-02-19net: dwc_eth_qos_rockchip: Fix disable of RX/TX delay for RK3588Jonas Karlman
When rgmii-rxid/txid/id phy-mode is used the MAC should not add RX and/or TX delay. Currently RX/TX delay is configured as enabled using zero as delay value for the rgmii-rxid/txid/id modes. Change to disable RX and/or TX delay and using zero as delay value. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-02-19net: dwc_eth_qos_rockchip: Fix disable of RX/TX delay for RK356xJonas Karlman
When rgmii-rxid/txid/id phy-mode is used the MAC should not add RX and/or TX delay. Currently RX/TX delay is configured as enabled using zero as delay value for the rgmii-rxid/txid/id modes. Change to disable RX and/or TX delay and using zero as delay value. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-02-19pinctrl: rockchip: rk3328: Fix pinmux for GPIO2-B and GPIO3-B pinsJonas Karlman
The pinmux bits for GPIO2-B0 to GPIO2-B6 actually have 2 bits width, correct the bank flag for GPIO2-B. The pinmux bits for GPIO2-B7 is recalculated so it remain unchanged. Add missing GPIO3-B1 to GPIO3-B7 pinmux data to rk3328_mux_recalced_data as mux register offset for these pins does not follow rockchip convention. This matches changes in following Linux commits: - e8448a6c817c ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pins") - 5ef6914e0bf5 ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO3-B pins") - 128f71fe014f ("pinctrl: rockchip: correct RK3328 iomux width flag for GPIO2-B pins") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-02-18led: fix coverity scan errorHeiko Schocher
The following was reported by Covervity scan: *** CID 541279: (TAINTED_SCALAR) /drivers/led/led-uclass.c: 284 in led_get_function_name() 278 if (!ret) { 279 snprintf(uc_plat->name, LED_MAX_NAME_SIZE, 280 "%s:%s-%d", 281 cp ? "" : led_colors[color], 282 func ? func : "", enumerator); 283 } else { >>> CID 541279: (TAINTED_SCALAR) >>> Using tainted variable "color" as an index into an array "led_colors". Fix it. Addresses-Coverity-ID: 541279 (TAINTED_SCALAR) Link: https://lists.denx.de/pipermail/u-boot/2025-February/580250.html Signed-off-by: Heiko Schocher <hs@denx.de>
2025-02-18power: regulator: tps65941: Fix voltage calculation for ldoUdit Kumar
As per TRM[0] Section 8.7.1 "TPS6594-Q1 Registers", LDOx_Vout bit 6-1, define the NVM voltage settings. Along side table 8-4 of above TRM, shows voltage to value mapping. Driver wrongly using bits 5-1 to calculate voltage, and to convert voltage to value driver was using buck's calculation. So fix those calculation. [0]: https://www.ti.com/lit/ds/symlink/tps6594-q1.pdf Fixes: 5d7dbd22cf7d ("power: regulator: tps65941: use function callbacks for conversion ops") Signed-off-by: Udit Kumar <u-kumar1@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2025-02-18tpm: unconstify tpm_tis_chip_dataIlias Apalodimas
The struct contains an iomem pointer that we later remap and update. Remove const from the struct definition. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-02-12pinctrl: tegra20: adjust pin type detectionSvyatoslav Ryhel
Pin detection on t20 depends on node name. With recent changes in node naming, let's remove '_' to be safe about both '_' or '-' use. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-02-12pmic: palmas: bind sysreset to parent nodeSvyatoslav Ryhel
Bind SYSRESET child to parent node since it does not have its own node in the device tree. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2025-02-12pmic: max77663: bind children to parent nodeSvyatoslav Ryhel
Bind GPIO and SYSRESET children to parent node since they do not have their own nodes in the device tree. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2025-02-12Revert "drivers: gpio-uclass: support PMIC GPIO children"Svyatoslav Ryhel
Requesting of PMIC's GPIO child should be done by binding GPIO driver to PMIC's node is GPIO driver does not have its own node. This reverts commit c03cd98d1a163666b4addcdd9a34fc0c77dfd0a5. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2025-02-11Merge tag 'u-boot-dfu-20250211' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-dfu u-boot-dfu-20250211: CI: - https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/24556 Android: - Handle boot images with missing DTB Usb gadget: - Fix nullptr in g_dnl when serial# is unset - Add missing schedule() in f_mass_storage gadget - Add support for STih407 in dwc3-generic - Fix usb clocks on STih407 - Migrate STih407 to DM_USB_GADGET
2025-02-11usb: dwc3-generic: Add STih407 supportPatrice Chotard
Add STi glue logic to manage the DWC3 HC on STiH407 SoC family. It configures the internal glue logic and syscfg registers. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Link: https://lore.kernel.org/r/20250130163547.512990-6-patrice.chotard@foss.st.com Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-02-11usb: dwc3-generic: Reorder includePatrice Chotard
Reorder include following rules available here : https://docs.u-boot.org/en/latest/develop/codingstyle.html#include-files Remove useless include files. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20250130163547.512990-5-patrice.chotard@foss.st.com Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-02-11usb: dwc3: Remove dwc3 glue driver support for STiPatrice Chotard
STi will migrate to dwc3-generic driver, dwc3-sti-glue driver can be removed. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Link: https://lore.kernel.org/r/20250130163547.512990-4-patrice.chotard@foss.st.com Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-02-11usb: gadget: f_mass_storage: Add schedule() in sleep_thread()Patrice Chotard
In case "ums" command is used on platforms which don't implement g_dnl_board_usb_cable_connected() and USB cable is not connected, we stay inside sleep_thread() forever and watchdog is triggered. Add schedule() call to avoid this issue. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Link: https://lore.kernel.org/r/20241202074644.5380-1-patrice.chotard@foss.st.com Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-02-10rtc: emul_rtc: Make emul_rtc_probe() staticMichal Simek
emul_rtc_probe() is not called from anywhere else that's why make it static. Issue is reported by build with W=1. Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-02-10net: designware: support phy io micro voltage setting.Michael Chang
Support phy io micro voltage setting for NPCM8XX rgmii interface. Signed-off-by: Michael Chang <zhang971090220@gmail.com>
2025-02-10pinctrl: mediatek: support reading register base address by nameWeijie Gao
This patch add support to read register base address by name if provided. Also devfdt_get_addr_* is changed to dev_read_addr_* to support DT live tree. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-10pinctrl: mediatek: mt7988: remove _base from reg-namesWeijie Gao
The reg-names in mt7988.dtsi have no _base suffix. Remove the suffix will also make it match upstream linux format. Fixes: 8c2cb748ef5 (pinctrl: mediatek: mt7988: rename reg-names to upstream linux format) Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-06 15:17:24 +0000