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2021-06-18net: sun8i-emac: fix MDIO frequencyHeinrich Schuchardt
Commit 4f0278dac56a ("net: sun8i-emac: Lower MDIO frequency") leads to network failure on the OrangePi PC. => dhcp sun8i_emac_eth_start: Timeout According to the commit message the change of the MDIO frequency is only required for external PHYs. Fixes: 4f0278dac56a ("net: sun8i-emac: Lower MDIO frequency") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-06-18net: synquacer: Add netsec driverJassi Brar
Add SynQuacer's NETSEC GbE controller driver. Since this driver will load the firmware from SPI NOR flash, this depends on CONFIG_SYNQUACER_SPI=y. Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-06-18net: dwc_eth_qos: Revert some changes of commit 3a97da12ee7bDaniil Stas
Revert some changes of commit 3a97da12ee7b ("net: dwc_eth_qos: add dwc eqos for imx support") that were probably added by mistake. One of these changes can lead to received data corruption (enabling FUP and FEP bits). Another causes invalid register rxq_ctrl0 settings for some platforms. And another makes some writes at unknown memory location. Fixes: 3a97da12ee7b ("net: dwc_eth_qos: add dwc eqos for imx support") Signed-off-by: Daniil Stas <daniil.stas@posteo.net> Cc: Ye Li <ye.li@nxp.com> Cc: Fugang Duan <fugang.duan@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-06-18net: dwc_eth_qos: Fix needless phy auto-negotiation restartsDaniil Stas
Disabling clk_ck clock leads to link up status loss in phy, which leads to auto-negotiation restart before each network command execution. This issue is especially big for PXE boot protocol because of auto-negotiation restarts before each configuration filename trial. To avoid this issue don't disable clk_ck clock after it was enabled. Signed-off-by: Daniil Stas <daniil.stas@posteo.net> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-06-18net: e1000: do not attempt to set hwaddr for i210 without FLASHTim Harvey
commit f1bcad22dd19 ("net: e1000: add support for writing to EEPROM") adds support for storing hwaddr in EEPROM however i210 devices do not support this and thus results in errors such as: Warning: e1000#0 failed to set MAC address' Check if a flash device is present and if not return -ENOSYS indicating this is not supported. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-06-18Fix a memory leak issue in the RX port initialization.Hou Zhiqiang
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-06-17Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini
- fsl-qoriq: Bug fixes related pfe, eth, thermal node, vid.c, cpu release, mmc, usb, env, etc for Layerscape boards - powerpc: Update Maintainers for some boards.
2021-06-17net: tsec: add option to set device max-speed via dtsAleksandar Gerasimovski
Current tsec adapter sets adapter gigabit capabilities by default, and in reality this must not always be the case. It is possible that tsec adapter is used for 100Mbps connection, and in this case setting 1000Mbps capabilities can lead to some side effects such longer autoneg process. In our ls102x designs this problem leads to long autoneg times (> 4 sec) in case board rgmii link is 100Mbps capable only. Limiting the rgmii link capabilities provides faster and smoother link establishment. Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17mmc: fsl_esdhc_imx: drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33Yangbo Lu
There is no i.MX board using such option. Drop it. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17mmc: fsl_esdhc: convert to CONFIG_FSL_ESDHC_VS33_NOT_SUPPORTYangbo Lu
For eSDHC, power supply is through peripheral circuit. Some eSDHC versions have value 0 of the bit but that does not reflect the truth. 3.3V is common for SD/MMC, and is supported for all boards with eSDHC in current u-boot. So, make 3.3V is supported in default in code. CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT can be enabled if future board does not support 3.3V. This is also a fix-up for one previous patch, which converted to use IS_ENABLED() for CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 that is not a Kconfig option. Fixes: 52faec31827e ("mmc: fsl_esdhc: replace most #ifdefs by IS_ENABLED()") Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17pci: layerscape-ep: Add check of the PCIe controller enablementHou Zhiqiang
Stop to initialize the PCIe controller if it's disabled by RCW. Fixes: 118e58e26eba ("pci: layerscape: Split the EP and RC driver") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17armv8: ls1012a: Pass PPFE firmware to Linux through FDTChaitanya Sakinam
Read Linux PPFE firmware from flash partition and pass it to Linux through FDT entry. So that we can avoid placing PPFE firmware in Linux rootfs. (FDT may increase at max by 64KB) Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com> Signed-off-by: Anji J <anji.jagarlmudi@nxp.com> Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-16Merge tag 'u-boot-imx-20210616' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20210616 ------------------- - imxrt : fixes, USB, imxrt1020-evk - imx8m: fix for verdin-imx8mm Add conga-QMX8 board - imx6 : documentation for pico-imx6: Add SeeedStudio NPI-IMX6ULL Support ventana: DM PCI - imx7d: added SMEGW01 board CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7765
2021-06-16ls1012a: net: pfe: remove pfe stop from bootcmdMian Yousaf Kaukab
When using bootefi to boot a EFI binary, u-boot is supposed to provide networking service for EFI application. Currently, 'pfe stop' command is called from bootcmd before running bootefi. As a result network stops working for EFI applications and console is flooded with "Rx pkt not on expected port" messages. Implement board_quiesce_devices() for ls1012a boards and call pfe_command_stop() from it instead of calling 'pfe stop' from *_bootcmd and bootcmd. Tested-by: Anji Jagarlmudi <anji.jagarlmudi@nxp.com> Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> [Fixed checkpatch space error] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-11Merge tag 'xilinx-for-v2021.07-rc5' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.07-rc5 zynqmp: - Fix ANALOG_BUS value after powerup - Disable EFI_CAPSULE_ON_DISK_EARLY zynqmp-gqspi: - Fix write issue
2021-06-11spi: zynqmp_gqspi: Fix write issueAshok Reddy Soma
Enable manual start in zynqmp_qspi_fill_gen_fifo(). Also enable GQSPI_IXR_GFNFULL_MASK and check for it instead of GQSPI_IXR_GFEMTY_MASK. Add dummy write to genfifo register in chipselect. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
2021-06-09Merge https://source.denx.de/u-boot/custodians/u-boot-usbTom Rini
- dwc2 and cdns3 fixes
2021-06-09usb: ehci-mx6: add support for i.MXRTGiulio Benetti
Add support for usb1 and usb2 present on i.IMXRT. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3Giulio Benetti
Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APBGiulio Benetti
Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09video: mxsfb: add enabling of "disp_axi" clockGiulio Benetti
Some SoC needs "disp_axi" clock to be enabled, so let's try to retrieve it and enabling. If it fails it gives only a debug(), but this clock as well as "axi" clock is not mandatory. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09video: mxsfb: add enabling of "axi" clock other than "per" clockGiulio Benetti
On some SoC mxsfb needs more than one clock gate(actual "per" clock). So let's introduce "axi" clock that can be provided but it's not mandatory. This is inspired from linux mxsfb driver. Also let's rename "per" clock to "pix" clock for compatibility with already existing .dts lcdif nodes implementation. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09timer: imx-gpt: Add timer support for i.MX SoCs familyGiulio Benetti
This timer driver uses GPT Timer (General Purpose Timer) available on a lot of i.MX SoCs family. This driver deals with both 24Mhz oscillator as well as peripheral clock. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> [Giulio: added the driver's stub and handled peripheral clock prescaler setting making driver to work correctly] Signed-off-by: Jesse Taube <mr.bossman075@gmail.com> [Jesse: added init, setting prescaler for 24Mhz support and enabling timer]
2021-06-09usb: dwc2: Avoid delay when initializing USB peripheral by dwc2João Loureiro
When `usb start` is called on the terminal, the dwc2 driver will try to start every USB device as host first, even if it is explicitly configured as peripheral in the device tree (dr_mode = "peripheral"). So to avoid an unwanted 15 seconds delay when initializing the usb (one second per channel = 1s x 15), this patch adds a check to the initialization, and will skip host initialization of the device is explicitly set as peripheral. The checking is already done similarly in the `drivers/usb/gadget/dwc2_udc_otg.c` driver. Signed-off-by: João Loureiro <joaofl@gmail.com>
2021-06-08usb: cdns3: cdns3-ti: Fix clk_get_by_name() to get the correct nameKishon Vijay Abraham I
Kernel device tree got updated to use clock name as "ref" instead of "usb2_refclk". Fix cdns3-ti.c to use the correct name. Fixes: 70e167495ab2 ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot") Fixes: 6239cc8c4e84 ("arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-Boot") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-06-07pinctrl: renesas: Synchronize R-Car Gen2/Gen3 tables with Linux 5.12Marek Vasut
Synchronize R-Car Gen2/Gen3 pinctrl tables with Linux 5.12, commit 9f4ad9e425a1 ("Linux 5.12") . This is a rather large commit, since the macros in sh-pfc.h also got updated, so all the PFC tables must be updated in lockstep. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-06-05net: luton: remove address translation after ofnode_read_resourcePatrick Delaunay
Removed call of ofnode_translate_address() after ofnode_read_resource in luton_switch.c:luton_probe(); it is unnecessary since the commit feb7ac457c20 ("dm: core: Add address translation in fdt_get_resource"). Fixes: feb7ac457c20 ("dm: core: Add address translation in fdt_get_resource") Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reported-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-06-05pwm: cros_ec: Rename "priv_auto_alloc_size" to "priv_auto"Alper Nebi Yasak
With commit 41575d8e4c33 ("dm: treewide: Rename auto_alloc_size members to be shorter") "priv_auto_alloc_size" was renamed to "priv_auto". This driver was sent to the mailing list before that change, merged after it, and still has the old form. Apply the rename here as well. Fixes: 1b9ee2882e6b ("pwm: Add a driver for Chrome OS EC PWM") Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-05of: addr: Remove call to dev_count_cells() in of_get_address()Bin Meng
In of_get_address(), there is: dev_count_cells(dev, &na, &ns); followed by: bus->count_cells(dev, &na, &ns); but no codes in between use na/ns, hence the first call is useless. By dropping the first call, dev_count_cells() is now useless too. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-05of: addr: Translate 'dma-ranges' for parent nodes missing 'dma-ranges'Bin Meng
'dma-ranges' frequently exists without parent nodes having 'dma-ranges'. While this is an error for 'ranges', this is fine because DMA capable devices always have a translatable DMA address. Also, with no 'dma-ranges' at all, the assumption is that DMA addresses are 1:1 with no restrictions unless perhaps the device itself has implicit restrictions. This keeps in sync with Linux kernel commit: 81db12ee15cb: of/address: Translate 'dma-ranges' for parent nodes missing 'dma-ranges' Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-04arm: a37xx: pci: Fix configuring PCIe resourcesPali Rohár
The `ranges` DT property of the PCIe node is currently ignored by Aardvark driver - all entries are used as transparent PCIe MEM, despite some of them being defined for IO in DT. This is because the driver does not setup PCIe outbound windows and thus a default configuration is used. This can cause an external abort on CPU when a device driver tries to access non-MEM space. Setup the PCIe windows according to the `ranges` property for all non-MEM resources (currently only IO) and also non-transparent MEM resources. Because Linux expects that bootloader does not setup Aardvark PCIe windows, disable them before booting Linux. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04arm: a37xx: pci: Fix DT compatible string to Linux' DT compatiblePali Rohár
Change DT compatible string for A3700 PCIe from 'marvell,armada-37xx-pcie' to 'marvell,armada-3700-pcie' to make U-Boot A3700 PCIe DT node compatible with Linux' DT node. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04arm: a37xx: pci: Disable bus mastering when unloading driverPali Rohár
Disable Root Bridge I/O space, memory space and bus mastering in Aardvark's remove method, which is called before booting Linux kernel. This ensures that PCIe device which was initialized and used by U-Boot cannot do new DMA transfers until Linux initializes PCI subsystem and loads appropriate drivers for the device. During initialization of PCI subsystem Linux in fact disables this bus mastering on Root Bridge (and later enables it when driver is loaded and configured), but there is a possibility of a small window after U-Boot boots Linux when bus mastering is enabled, which is not correct. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04arm: a37xx: pci: Don't put link into LTSSM Recovery state during probePali Rohár
During our debugging of the Aardvark driver in Linux we have discovered that the PCIE_CORE_LINK_CTRL_STAT_REG register in fact controls standard PCIe Link Control Register for PCIe Root Bridge. This led us to discover that the name of the PCIE_CORE_LINK_TRAINING macro and the corresponding comment by this macro's usage is misleading; this bit in fact controls Retrain Link, which, according to PCIe base spec is defined as: A write of 1b to this bit initiates Link retraining by directing the Physical Layer LTSSM to the Recovery state. If the LTSSM is already in Recovery or Configuration, re-entering Recovery is permitted but not required. Entering Recovery state is normally done from LTSSM L0, L0s and L1 states. But since the pci-aardvark.c driver enables Link Training just a few lines above, the controller is not in L0 ready state yet. So setting aardvark bit PCIE_CORE_LINK_TRAINING does not actually enter Recovery state at this place. Moreover, trying to enter LTSSM Recovery state without other configuration is causing issues for some cards (e.g. Atheros AR9xxx and QCA9xxx). Since Recovery state is not entered, these issues are not triggered. Remove code which tries to enter LTSSM Recovery state completely. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-05-31drivers: pci: pcie_dw_common: fix Werror compilation errorGreen Wan
Fix compilation error when Werror is turned on. The warning could possible break some CI builds. Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-05-31board: sifive: add HiFive Unmatched board supportGreen Wan
Add defconfig and board support for HiFive Unmatched. Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-31drivers: pci: add pcie support for fu740Green Wan
Add pcie driver for SiFive fu740, the driver depends on fu740 gpio, clk and reset driver to do init. Force running at Gen1 for better capatible enumeration. Several devices are tested: a) M.2 NVMe SSD b) USB-to-PCI adapter c) Ethernet adapter (E1000 compatible) Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
2021-05-31drivers: ram: sifive: rename fu540_ddr and add fu740 supportGreen Wan
Rename fu540_ddr.c to sifive_ddr.c and add fu740 support Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-31drivers: clk: add fu740 supportGreen Wan
Add fu740 support. One abstract layer is added for supporting multiple chips such as fu540 and fu740. Signed-off-by: Green Wan <green.wan@sifive.com>
2021-05-28reset: stm32: Fix bank and offset computationPatrice Chotard
BITS_PER_LONG is used to represent register's size which is 32. But when compiled on arch64, BITS_PER_LONG is then equal to 64. Fix bank and offset computation to make it work on arch32 and arch64 and ensure that register's size is always equal to 32. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Pankaj Dev <pankaj.dev@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-05-28dfu: dfu_mtd: remove the mtd_block_op error when mtd_lock is not supportedPatrick Delaunay
Fix the result of DFU_OP_WRITE operation in mtd_block_op function when mtd_lock is not supported (-EOPNOTSUPP) to avoid DFU stack error on the DFU manifestation of the MTD device, when dfu_flush_medium_mtd is called. Without this patch, dfu-util failed on dfuERROR state at the end of the write operation on the alternate even if MTD write opeartion is correctly performed. $> dfu-util -a 3 -D test.bin .... DFU mode device DFU version 0110 Device returned transfer size 4096 Copying data from PC to DFU device .... Download [=========================] 100% 225469 bytes Download done. state(10) = dfuERROR, status(14) = Something went wrong, but the device does not know what it was Done! Fixes: 65f3fc18fc1e ("dfu_mtd: Add provision to unlock mtd device") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2021-05-27Merge tag 'ti-v2021.07-rc4' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-ti - Fix reset for AM64 platforms - Enable networking PHY driver for AM64 - Fix default R5F cluster setting in J7
2021-05-27firmware: ti_sci: Update ti_sci_msg_req_reboot to include domainDave Gerlach
The ti_sci_msg_req_reboot message payload has been extended to include a domain field, but for the purposes of u-boot this should be zero to reset the entire SoC as it did before. Include domain for completeness and set to zero to ensure proper operation. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-26pinctrl: single: Fix probe failure getting register area sizeVignesh Raghavendra
If reg property of pinctrl-single node requires address translation then probe fails with following message: single-pinctrl pinctrl@4301c000: failed to get base register size This is because driver uses dev_read_addr_size() to get size which also tries to fetch untranslated addr and fails. Fix this by using dev_read_addr_size_index() which takes care of address translation and also makes following dev_read_addr() call redundant. This fixes Ethernet failures on TI's AM654 based EVMs due to lack of pinmux configuration. Fixes: 9fd8a430f3 ("pinctrl: single: get register area size by device API") Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-05-25net: Remove ne2000 driverTom Rini
With the last user of this driver removed, remove the driver. Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-05-24ata: ahci: fix ahci_link_up() type mismatch for LTOMarek Behún
When building highbank_defconfig with LTO, the compiler complains about type mismatch of function ahci_link_up(). The third parameter of this function is of type u8 in drivers/ata/ahci.c, but of type int in board/highbank/ahci.c. There is no reason in using u8, and the code using this function actually passes an int variable into the function (so it is implicitly converted to u8). Change the type of this parameter to int in drivers/ata/ahci.c. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-24ARM: fix LTO for apf27Marek Behún
When apf27_defconfig is built with LTO, linking complains about undefined reference to `nand_boot`. This is because it is referenced from inline assembly. Make it visible. Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-05-24treewide: Convert macro and uses of __section(foo) to __section("foo")Marek Behún
This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24regmap: fix a serious pointer casting bugMarek Behún
There is a serious bug in regmap_read() and regmap_write() functions where an uint pointer is cast to (void *) which is then cast to (u8 *), (u16 *), (u32 *) or (u64 *), depending on register width of the map. For example given a regmap with 16-bit register width the code int val = 0x12340000; regmap_read(map, 0, &val); only changes the lower 16 bits of val on little-endian machines. The upper 16 bits will remain 0x1234. Nobody noticed this probably because this bug can be triggered with regmap_write() only on big-endian architectures (which are not used by many people anymore), and on little endian this bug has consequences only if register width is 8 or 16 bits and also the memory place to which regmap_read() should store it's result has non-zero upper bits, which it seems doesn't happen anywhere in U-Boot normally. CI managed to trigger this bug in unit test of dm_test_devm_regmap_field when compiled for sandbox_defconfig using LTO. Fix this by utilizing an union { u8; u16; u32; u64; } and reading data into this union / writing data from this union. Signed-off-by: Marek Behún <marek.behun@nic.cz> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Pratyush Yadav <p.yadav@ti.com>
2021-05-23Merge https://source.denx.de/u-boot/custodians/u-boot-shTom Rini
- Various clk/pinctrl updates to re-sync with Linux and other fixes