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2021-07-28Makefile: Move drivers/i2c/ into drivers/MakefileSimon Glass
This rule should not be in the top-level Makefile. Now that we have a consistent set of I2C Kconfigs for U-Boot proper, SPL and TPL, we can move it. Make use of the existing SPL/TPL rule in drivers/Makefile instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28i2c: Rename SPL/TPL_I2C_SUPPORT to I2CSimon Glass
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-28i2c: Create a new Kconfig for I2CSimon Glass
At present we have CONFIG_SPL_I2C but not CONFIG_I2C. The reason CONFIG_I2C is not strictly necessary is that: a) We have CONFIG_SYS_I2C_LEGACY and CONFIG_DM_I2C for the two possible i2c stacks b) In U-Boot proper, we always build drivers/i2c/ regardless of the options Still, it is better to have CONFIG_I2C - it makes U-Boot proper similar to SPL/TPL, so we can (in a future commit) simplify the Makefile rules. Enable it by default, since as above, we have separate options (SYS_I2C_LEGACY and DM_I2C) to control whether it is 'really' enabled. Once we have migrated I2C to driver model, we can drop SYS_I2C_LEGACY and make DM_I2C become I2C. For now, this lets us simplify the Makefile rules. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-28i2c: Rename CONFIG_SYS_I2C to CONFIG_SYS_I2C_LEGACYSimon Glass
It is quite confusing that CONFIG_SYS_I2C selects the legacy I2C and CONFIG_DM_I2C selects the current I2C. The deadline to migrate I2C is less than a year away. Also we want to have a CONFIG_I2C for U-Boot proper just like we have CONFIG_SPL_I2C for SPL, so we can simplify the Makefile rules. Rename this symbol so it is clear it is going away. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-28Rename DRIVERS_MISC_SUPPORT to DRIVERS_MISCSimon Glass
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename GPIO_SUPPORT to GPIOSimon Glass
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_USB_HOST_SUPPORT to SPL_USB_HOSTSimon Glass
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_WATCHDOG_SUPPORT to SPL_WATCHDOGSimon Glass
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_MUSB_NEW_SUPPORT to SPL_MUSB_NEWSimon Glass
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_ETH_SUPPORT to SPL_ETHSimon Glass
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_CRYPTO_SUPPORT to SPL_CRYPTOSimon Glass
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-28Rename SPL_POWER_SUPPORT to SPL_POWERSimon Glass
Rename this option so that CONFIG_IS_ENABLED can be used with it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-28Makefile: Move phy rules into drivers/phySimon Glass
These don't belong in the drivers Makefile so move them down into the correct place. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Fixup some missing dependencies this exposed] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-28Use LIB_UUID with ACPIGEN and FS_BTRFSSimon Glass
Since the ACPI-generation code makes use of UUIDs we typically need to enabled UUID support for it to build. Add a new Kconfig condition. Use it for BTRFS also. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-27Merge tag 'u-boot-amlogic-20210727' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-amlogic - Add SMBIOS info for Khadas VIM boards - Fix meson-axg-mipi PHY build - Fix VIM3 board phy-names property setup - Return correct value for non emmc boot sources on VIM3 - add kernel compression vars
2021-07-27phy: meson-axg-mipi: Access parent ofnode through dev_ofnode()Alper Nebi Yasak
With commit 84a42ae36683 ("dm: core: Rename device node to indicate it is private") and commit f10643cf8a4c ("dm: core: Access device ofnode through functions") accesses to the "node" member were replaced with dev_ofnode(). Also apply that replacement here. Fixes: 4547551aa019 ("phy: Add Amlogic AXG MIPI PCIe Analog PHY driver") Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-07-27phy: meson-axg-mipi: Rename "priv_auto_alloc_size" to "priv_auto"Alper Nebi Yasak
With commit 41575d8e4c33 ("dm: treewide: Rename auto_alloc_size members to be shorter") "priv_auto_alloc_size" was renamed to "priv_auto". Apply the rename to these two drivers as well. Fixes: 4547551aa019 ("phy: Add Amlogic AXG MIPI PCIe Analog PHY driver") Fixes: 7ef19503bacf ("phy: Add Amlogic AXG MIPI D-PHY driver") Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-07-27clk: stm32mp1: add support of missing SPI clocksPatrick Delaunay
Add the missing SPI clock even if these instances are not available on STMicroelectronics boards: SPI2_K, SPI3_K, SPI4_K, SPI6_K. With this patch, the SPI2 / SPI3 / SPI4 / SPI6 instances can be used on customer design without the clock driver error: stm32mp1_clk_get_id: clk id 131 not found Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-26psci: Do not define do_poweroff() if CONFIG_SYSRESET_CMD_POWEROFF is enabledMichal Simek
CONFIG_SYSRESET_CMD_POWEROFF defines do_poweroff() in sysreset-uclass.c that's why don't define it twice when both CONFIG_SYSRESET_CMD_POWEROFF and CONFIG_CMD_POWEROFF are enabled. CONFIG_SYSRESET_CMD_POWEROFF depends on CONFIG_CMD_POWEROFF. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26net: xilinx: axi_mrmac: Add MRMAC driverAshok Reddy Soma
Add support for xilinx multirate(MRMAC) ethernet driver. This driver uses multichannel DMA(MCDMA) for data transfers of MRMAC. Added support for 4 ports of MRMAC for speeds 10G and 25G. MCDMA supports upto 16 channels but in this driver we have setup only one channel which is enough. Tested 10G and 25G on all 4 ports. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26clk: zynqmp: Add support for enabling clock on lpd_lsbusMichal Simek
lpd_lsbus is clock which is used by many IPs like dmas, gems, gpio, sdhcis, spis, ttcs, uarts, watchdog that's why make sense to also enable access to change this clock. For this clock you already get the rate. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Make variables/structure staticMichal Simek
All these variables/structure are local and should be static. Issues are reported by sparse: drivers/mmc/zynq_sdhci.c:49:11: warning: symbol 'zynqmp_iclk_phases' was not declared. Should it be static? drivers/mmc/zynq_sdhci.c:50:11: warning: symbol 'zynqmp_oclk_phases' was not declared. Should it be static? drivers/mmc/zynq_sdhci.c:53:11: warning: symbol 'versal_iclk_phases' was not declared. Should it be static? drivers/mmc/zynq_sdhci.c:54:11: warning: symbol 'versal_oclk_phases' was not declared. Should it be static? drivers/mmc/zynq_sdhci.c:546:24: warning: symbol 'arasan_ops' was not declared. Should it be static? Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-26mmc: zynq_sdhci: Fix kernel doc warningsMichal Simek
Fix these kernel doc warnings: drivers/mmc/zynq_sdhci.c:181: warning: contents before sections drivers/mmc/zynq_sdhci.c:236: warning: contents before sections drivers/mmc/zynq_sdhci.c:291: warning: contents before sections drivers/mmc/zynq_sdhci.c:297: warning: Function parameter or member 'degrees' not described in 'sdhci_versal_sdcardclk_set_phase' drivers/mmc/zynq_sdhci.c:354: warning: contents before sections drivers/mmc/zynq_sdhci.c:360: warning: Function parameter or member 'degrees' not described in 'sdhci_versal_sampleclk_set_phase' drivers/mmc/zynq_sdhci.c:467: warning: contents before sections Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-26mmc: zynq_sdhci: Split set_tapdelay function to in and outAshok Reddy Soma
Split arasan_zynqmp_set_tapdelay() to handle input and output tapdelays separately. This is required to handle zero values for ITAP and OTAP values. If we dont split, we will have to remove the if() in the function, which makes ITAP values to be overwritten when OTAP values are called to set and vice-versa. Restrict tap_delay value calculated to max allowed 8 bits for ITAP and 6 bits for OTAP for ZynqMP. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Use Mask writes for Tap delaysAshok Reddy Soma
Restrict tap_delay value to the allowed size(8bits for itap and 6 bits for otap) before writing to the tap delay register. Clear ITAP and OTAP delay bits before updating with the new tap value for Versal platform. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Allow configuring zero Tap valuesAshok Reddy Soma
Allow configuring ITAP and OTAP values with zero to avoid failures in some cases (one of them is SD boot mode). Legacy, SDR12 modes require to program the ITAP and OTAP values as zero, whereas for SDR50 and SDR104 modes ITAP value is zero. In SD boot mode firmware configures the SD ITAP and OTAP values and in this case u-boot has to re-configure required tap values(including zero) based on the operating mode. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Resolve uninitialized return valueAshok Reddy Soma
set_phase() functions are not modifying the ret value and returning the same uninitialized ret, return 0 instead. Keep the return type as int to return errors when the tapdelay's are set via xilinx_pm_request() in future. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-24serial: pl011: Enable DEBUG_UART_PL011 in SPLChen Baozi
Commit b81406db51a6 ("arm: serial: Add debug UART capability to the pl01x driver") add supports to use pl01x as a debug UART. However, due to CONFIG_IS_ENABLED macro requires CONFIG_SPL_* prefix, the _debug_uart_init() would not choose TYPE_PL011 in SPL build. This patch fixes the bug by judging CONFIG_DEBUG_UART_PL011 explicitly. Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-24reset: ast2600: Fix missing reference operatorChia-Wei Wang
Fix missing reference operator '&' to correctly get HW register addresses for writel(). Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-07-23serial: pl011: Resend the character if FIFO is full in debug uartChen Baozi
pl01x_putc() might return -EAGAIN if there was no space in FIFO. In that case, high-level caller should wait until there is space and resend the character. Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-23serial: serial_msm: Delay initialization to let pins stabilizeStephan Gerhold
For some reason, the DragonBoard 410c aborts autoboot immediately if U-Boot is started without LK. It looks like it picks up a single broken character via serial and therefore believes a key was pressed to abort autoboot. After some debugging, it seems like adding some delay after pinctrl setup but before UART initialization fixes the issue. It's also worth mentioning that unlike when booting from LK, the pinctrl setup is actually necessary when booting U-Boot without LK since UART is broken if the pinctrl line is removed. I suspect that reconfiguring the pins might take some time to stabilize and if the UART controller is enabled too quickly it will pick up some random noise. Adding a few milliseconds of delay fixes the issue and shouldn't have any other negative side effects. 3ms seems to be the minimum delay required in my tests, use 5ms instead just to be sure. Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-07-23board: synquacer: Initialize SCBM SMMU at board_init()Masami Hiramatsu
Since the SCBM SMMU is not only connected to the NETSEC but also shared with the F_SDH30 (eMMC controller), that should be initialized at board level instead of NETSEC. Move the SMMU initialization code into board support and call it from board_init(). Without this fix, if the NETSEC is disabled, the Linux eMMC ADMA cause an error because SMMU is not initialized. Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-07-23reboot-mode: read the boot mode from RTC memoryNandor Han
RTC devices could provide battery-backed memory that can be used for storing the reboot mode magic value. Add a new reboot-mode back-end that uses RTC to store the reboot-mode magic value. The driver also supports both endianness modes. Signed-off-by: Nandor Han <nandor.han@vaisala.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-23reboot-mode: read the boot mode from GPIOs statusNandor Han
A use case for controlling the boot mode is when the user wants to control the device boot by pushing a button without needing to go in user-space. Add a new backed for reboot mode where GPIOs are used to control the reboot-mode. The driver is able to scan a predefined list of GPIOs and return the magic value. Having the modes associated with the magic value generated based on the GPIO values, allows the reboot mode uclass to select the proper mode. Signed-off-by: Nandor Han <nandor.han@vaisala.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-23reboot-mode: add support for reboot mode controlNandor Han
A new driver uclass is created to handle the reboot mode control. The new uclass driver is updating an environment variable with the configured reboot mode. The mode is extracted from a map provided at initialization time. The map contains a list of modes and associated ids. Signed-off-by: Nandor Han <nandor.han@vaisala.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-23i2c: pcf8575: Add support for 8 bit I2C IO expanders (like pca8574)Lukasz Majewski
This patch add support for using NXP's pca8574 I2C IO expander, which has only 8 IO lines. After this change the .data member's information from struct udevice_id are used to either sent one or two bytes. Moreover, the '_le16' suffix from pcf8575_i2c_{write|read}_le16() functions have been removed as now we also sent 8 bit data. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-23i2c: pcf8575: Remove not used members of pcf8575_chip structureLukasz Majewski
Those members are not used anymore as ones from gpio_dev_priv structure (when DM_GPIO support is enabled) are used instead. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-23tee: optee: sync cache on pre-reloc OP-TEE invocationEtienne Carriere
This change ensures both U-Boot and OP-TEE see the same content from shared memory when OP-TEE is invoked prior U-Boot relocation. This change is required since U-Boot may execute with data cache off while OP-TEE always enables cache on memory shared with U-Boot. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-07-22Merge branch 'network_master' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-net
2021-07-22net: fsl-mc: fix logically dead codeCosmin-Florin Aluchenesei
The result of dpio_close() is actually taken into account. Signed-off-by: Cosmin-Florin Aluchenesei <aluchenesei.cosmin-florin@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-22drivers: net: aquantia: fix unsigned compared against 0Cosmin-Florin Aluchenesei
Change the reg variable to not be unsigned so that we not get into an unsigned compared against 0. Signed-off-by: Cosmin-Florin Aluchenesei <aluchenesei.cosmin-florin@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-22net: dwc_eth_qos: define LOG_CATEGORYPatrick Delaunay
Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-22net: eth-phy: define LOG_CATEGORYPatrick Delaunay
Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-22net: dwc: add a common empty ops eqos_null_opsPatrick Delaunay
Add a common empty ops: eqos_null_ops() to remove the duplicated empty functions and reduce the driver size for stm32 and imx config. This patch also aligns the prototype of ops 'eqos_stop_clks' with other eqos ops by adding return value. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-22net: dwc_eth_qos: use generic ethernet phy for stm32 variantPatrick Delaunay
Use the generic ethernet phy which already manages the correct binding for gpio reset, including the assert an deassert delays. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-22net: dwc_eth_qos: remove the field phyaddr of the struct eqos_privPatrick Delaunay
Since the commit commit 6a895d039ba7 ("net: Update eQos driver and FEC driver to use eth phy interfaces") the field phyaddr of driver private data struct eqos_priv is no more used in eqos_start() for the phy_connect() parameter. Now this variable is only initialized in eqos_probe_resources_stm32() it can be removed. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-22net: eth-phy: manage subnode mdio0Patrick Delaunay
Bind any subnode with name beginning by mdio, mdio0 for example, and not only the "mdio" as namei of subnode. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-22net: eth-phy: use dev_dbg and log_noticePatrick Delaunay
Replace debug trace and printf to log macros: - debug() replaced by dev_dbg() when device is available, this macro indicate the device name since commit ceb70bb870ac ("dm: Print device name in dev_xxx like Linux") - printf() replaced by log_notice() to allow dispatch to log backends. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-22net: eth-phy: add support of device tree configuration for gpio resetPatrick Delaunay
The gpio reset and the assert or deassert delay are defined in generic binding of the ethernet phy in Linux: Documentation/devicetree/bindings/net/ethernet-phy.yaml reset-gpios: maxItems: 1 description: The GPIO phandle and specifier for the PHY reset signal. reset-assert-us: description: Delay after the reset was asserted in microseconds. If this property is missing the delay will be skipped. reset-deassert-us: description: Delay after the reset was deasserted in microseconds. If this property is missing the delay will be skipped. See also U-Boot: doc/device-tree-bindings/net/phy.txt This patch adds the parsing of this common DT properties in the u-class "eth_phy_generic", used by default in the associated driver "eth_phy_generic_drv" This parsing function eth_phy_of_to_plat can be reused by other ethernet phy drivers for this uclass UCLASS_ETH_PHY. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-22net: Use phys_addr_t for SMC net device addressesPeter Hoyes
Use same type as eth_device->iobase and support addresses greater than INT_MAX. Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>