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2021-11-23tee: optee: remove unused duplicated login Id macrosEtienne Carriere
Remove unused OPTEE_MSG_LOGIN_* ID macros as suitable TEE_LOGIN_* ID macros are already defined tee.h. Cc: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2021-11-23firmware: scmi: smccc transport: simplify probe sequenceEtienne Carriere
Minor simplification in scmi_smccc_probe() exit sequence. Cc: Simon Glass <sjg@chromium.org> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-23firmware: scmi: smccc transport: use plat data, not priv dataEtienne Carriere
Change SCMI smccc transport drivers to use platform data rather than private data for channel reference since it only stores platform data retrieved from the DT. Consequently the probe handler is replaced with a of_to_plat handler. Cc: Simon Glass <sjg@chromium.org> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-23firmware: scmi: mailbox transport: use plat data, not priv dataEtienne Carriere
Change SCMI mailbox transport drivers to use platform data rather than private data for channel reference since it only stores platform data retrieved from the DT. Consequently the probe handler is replaced with a of_to_plat handler. Cc: Simon Glass <sjg@chromium.org> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-23firmware: scmi: mailbox transport: fix probe failure implementationEtienne Carriere
Correct scmi mailbox probe function that can't free the scmi channel instance since its auto-allocated by the device model framework. Cc: Simon Glass <sjg@chromium.org> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-23firmware: scmi: add configs to select the supported agentsPatrick Delaunay
Add two configs CONFIG_SCMI_AGENT_MAILBOX and CONFIG_SCMI_AGENT_SMCCC to select the supported agents as all the agents are not supported. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
2021-11-23power: regulator: scmi: define LOG_CATEGORYPatrick Delaunay
Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-11-23clk: scmi: define LOG_CATEGORYPatrick Delaunay
Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
2021-11-23reset: scmi: define LOG_CATEGORYPatrick Delaunay
Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
2021-11-23net: phy: realtek: Add tx/rx delay config for 8211eSamuel Holland
Some boards need to change the tx/rx delay config in order for gigabit Ethernet to work. In Linux commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx delay config"), Realtek documented the bits for overriding the delays from the hardware straps. Copy the logic from linux, so the delay config is set from the PHY's interface type (the phy-mode property in the device tree). This removes the need for a one-off workaround for the Pine A64+ board. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23drivers: net: add Aspeed MDIO driverDylan Hung
Add a driver for the MDIO interface for Aspeed AST2600 SOC. The driver only supports clause 22 for now. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
2021-11-23net: tsec: Make redundant_init() staticBin Meng
redundant_init() is only called in the tsec driver. Make it static. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23net: fec_mxc: Declare 'promisc' as boolBin Meng
priv->promisc is used as the parameter of the set_promisc() call which accepts a bool type instead of char. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23cmd: pxe_utils: Check fdtcontroladdr in label_bootPeter Hoyes
If using OF_CONTROL, fdtcontroladdr is set to the fdt used to configure U-Boot. When using PXE, if no fdt is defined in the menu file, and there is no fdt at fdt_addr, add fall back on fdtcontroladdr too. We are developing board support for the Armv8r64 FVP using config_distro_bootcmd. We are also using OF_BOARD and would like the PXE boot option to default to the fdt provided by board_fdt_blob_setup. Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23net: dsa: sja1105: add support for SGMIIVladimir Oltean
The list of ports which support SGMII depending on switch generation is available here: https://www.kernel.org/doc/html/latest/networking/dsa/sja1105.html#port-compatibility-matrix SGMII can either be used to connect to an external PHY or to the host port. In the first case, the use of in-band autoneg is expected, in the last, in-band autoneg is expected to be turned off (fixed-link). So the driver supports both cases. SGMII support means configuring the PCS and PMA. The PCS is a Synopsys Designware XPCS, in Linux this has a separate driver but here it is embedded within the sja1105 driver. If needed it can be taken out later, although we would need a UCLASS_PCS for it, which we don't have atm. Nonetheless, I did go all the way to export an internal MDIO bus for PCS access, because it is nice to be able to debug the PCS through commands such as: => mdio read ethernet-switch@1-pcs 4 1f.0 Reading from bus ethernet-switch@1-pcs PHY at address 4: 31.0 - 0x1140 The internal MDIO bus is not registered with DM because there is no udevice on it, as mentioned. But the XPCS code can still be ripped out, as needed. I did not add support for 2500base-x because I do not expect this interface type to be used as a boot source for anybody, it would just add unnecessary bloat. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23net: dsa: add driver for NXP SJA1105 L2 switchVladimir Oltean
The SJA1105 driver is largely reused from Linux. Its programming model is that it is blank out of reset, and it waits for a static configuration stream over SPI, which contains all runtime parameters (it has no notion of "default values"). Keeping a binary array for the configuration stream would have meant that aspects such as the CPU port and the MAC speeds could have not been configured easily, and would have been static and board-dependent. Live-patching the binary array means recalculating the static config table CRCs, which is not a fun process. So we create an abstraction over the static config tables, using the packing API, same as in Linux. The tables are kept as C structures, and the binary configuration stream is constructed on-the-go, with CRC and all. All static config tables instantiated in this driver are mandatory. The hardware reference manual can be found at: https://www.nxp.com/docs/en/user-guide/UM10944.pdf For tagging, a simplified version of tag_8021q from Linux is used. The VLAN EtherType is the same (0xdadb) but since we don't want switching in U-Boot, there is no reason to have a TX VLAN and an RX VLAN for each port. We just need the RX VLANs to act as the unique pvid of each front-panel port, to decode the switch port number. The RX VLAN is used for both RX and TX. The device tree bindings are the same as in Linux. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23net: dsa: felix: configure the in-band autoneg property based on OF node infoVladimir Oltean
Instead of trying to guess which operating modes need in-band negotiation to be active and which ones don't, parse the available information from the device tree. That will be correct in the cases we can already guess, and more. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23net: introduce a helper to determine whether to use in-band autonegVladimir Oltean
Certain serial SERDES protocols like 1000base-x, 2500base-x, SGMII, USXGMII can operate either in a mode where the PHY (be it on-board or inside an SFP module) passes the link parameters (speed, duplex, pause) to the MAC through in-band through control words standardized by IEEE 802.3 clause 37, or in a mode where the MAC must configure (force) its link parameters based on information obtained out-of-band (MDIO reads, guesswork etc). In Linux, the OF node property named "managed" is parsed by the phylink framework, and the convention is that if a driver uses phylink, then the presence of this property means that in-band autoneg should be enabled, otherwise it shouldn't. To be compatible with the OF node bindings of drivers that use phylink in Linux, introduce parsing support for this property in U-Boot too. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23net: tsec: add support for promiscuous modeVladimir Oltean
The Freescale TSEC can be a DSA master, and the ports of the attached DSA switch can have different MAC addresses compared to the TSEC. Nonetheless, the TSEC must receive the packets on behalf of those switch ports. Therefore, implement the promiscuous mode method to allow DSA to set this. Note that the init_registers() function called from eth_ops :: start overwrites this setting. There is no reason why the RCTRL register should be zero-initialized, so just stop clearing it so that the setting we applied in eth_ops :: set_promisc sticks. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-23net: phy: mscc: add support for VSC8502 in dual RGMII modeVladimir Oltean
The VSC8502 is a Microchip (formerly Microsemi, formerly Vitesse) dual port, gigabit Ethernet copper PHY which supports the MII, GMII and RGMII MAC-side interfaces. Of these, I could only test RGMII, and my board needed RGMII delays to be applied by software, so I am able to confirm that this patch handles that properly. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-11-18Revert "nvme: Enable FUA"Tom Rini
Unaddressed review comments. This reverts commit b6bfb8971dd039a60e1cff1895ab9be8be0915b3. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-18Revert "nvme: Fix error in nvme_setup_prps"Tom Rini
Dependent commit has unaddressed review comments. This reverts commit c4eef59faab6ae4ecb1beae6d4391b0889bc3ff3. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-17usb: cdns3: cdns3-ti: Add compatible for AM64 SoCAswath Govindraju
Add new compatible for AM64 SoC. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-11-17phy: cadence: phy-cadence-torrent: Change the name of subnode searchedAswath Govindraju
Search for "phy" in the subnode names, to syncup with kernel. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-11-17nvme: Fix error in nvme_setup_prpsJon Lin
Consulting to "NVM Express® Base Specification, revision 2.0". If more PRP List pages are required, then the last entry of the PRP List contains the Page Base Address of the next PRP List page. The next PRP List page shall be memory page aligned. Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
2021-11-17nvme: Enable FUAJon Lin
Most NVME devcies maintain data in internal cache for an uncertain times, and u-boot has no method to force NVME to flush cache. So this patch adds FUA to avoid data loss caused by power off after data programming. Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Reviewed-by: Stefan Agner <stefan@agner.ch>
2021-11-17RFC: arm: pci: Add PCI cam support to PCI-E ecam driverAlistair Delva
When booting U-Boot in crosvm, the virtual machine emulates a PCI cam device, not the PCI-E 'ecam' device normally seen on e.g. QEMU. This PCI device can be supported with only trivial changes to the ecam driver. Instead of adding a completely new driver which is identical besides the initialization step, add support for the PCI version to the existing driver. Signed-off-by: Alistair Delva <adelva@google.com> Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Cc: Ram Muthiah <rammuthiah@google.com>
2021-11-17crypto: aspeed: Add AST2600 ACRY supportChia-Wei Wang
ACRY is designed to accelerate ECC/RSA digital signature generation and verification. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-11-17clk: ast2600: Add RSACLK control for ACRYChia-Wei Wang
Add RSACLK enable for ACRY, the HW RSA/ECC crypto engine of ASPEED AST2600 SoCs. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-11-17crypto: aspeed: Add AST2600 HACE supportJohnny Huang
Hash and Crypto Engine (HACE) is designed to accelerate the throughput of hash data digest, and symmetric-key encryption. Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com> Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-17clk: ast2600: Add YCLK control for HACEJoel Stanley
Add YCLK enable for HACE, the HW hash engine of ASPEED AST2600 SoCs. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-11-17mmc: mtk-sd: implement waiting for DAT0 line stateJulien Masson
With the recent changes on mmc driver, we saw that the boot is ~5 secs longer compared to v2021.07 on mediatek platforms. This regression is seen during mmc_init and caused by the following patch [1]. Indeed since we did not support poll dat0, we fulfilled the condition of [1] and a delay of 500 ms was added for every __mmc_switch call. By adding the support of wait_dat0(), we now don't need to mdelay during mmc_init anymore. [1]: https://patchwork.ozlabs.org/project/uboot/patch/1629192034-64056-1-git-send-email-ye.li@nxp.com/ Signed-off-by: Julien Masson <jmasson@baylibre.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-11-17pci: Add standard PCIe ECAM macrosPali Rohár
Lot of PCIe controllers are using ECAM addressing. So add common ECAM macros into U-Boot's pci.h header file which can be suitable for most PCI controller drivers. Replace custom ECAM address macros in every PCI controller driver by new ECAM macros from U-Boot's pci.h header file. Similar macros are defined also in Linux kernel. There is a small difference between Linux and these new U-Boot macros. U-Boot's PCIE_ECAM_OFFSET() takes device and function numbers in separate arguments. Linux's PCIE_ECAM_OFFSET() takes device and function numbers encoded in one argument. The reason is that U-Boot's PCI_DEVFN() macro is different than Linux's PCI_SLOT() macro. So having device and function numbers in separate arguments makes code more straightforward. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-11-17pinctrl: Add Apple pinctrl driverMark Kettenis
This driver supports both pin muxing and GPIO support for the pin control logic found on Apple SoCs. Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2021-11-17aspeed: AST2600 Pinctrl DriverRyan Chen
This driver uses Pinctrl framework and is compatible with the Linux driver for AST2600. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
2021-11-15usb: Make USB_MUSB_PIO_ONLY selected by USB_MUSB_SUNXISamuel Dionne-Riel
This ensures the USB_MUSB_PIO_ONLY config is set to an apppropriate value from the changes enabling USB_MUSB_GADGET does. Namely, USB_MUSB_PIO_ONLY default to =y on USB_MUSB_SUNXI being y. Signed-off-by: Samuel Dionne-Riel <samuel@dionne-riel.com>
2021-11-13Merge tag 'dm-pull-13nov21' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-dm env tidy-ups test fixes binman fixes and ELF enhancements
2021-11-13Merge tag 'efi-2022-01-rc2-2' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2022-01-rc2-2 UEFI: * fix measurement of BootOrder variable for TCG2 protocol TPM: * TIS mmio driver. This driver supports QEMU's emulated TPM.
2021-11-13sandbox: fix sandbox_wdt_expire_now()Heinrich Schuchardt
With CONFIG_SYSRESET_WATCHDOG=y the sandbox can use a watchdog based system reset. To make this work calling sandbox_wdt_expire_now() must lead to a reset. With this change we can test the development suggested in [PATCH 0/4] Improved sysreset/watchdog uclass integration https://lists.denx.de/pipermail/u-boot/2021-August/458656.html Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-11-12Convert CONFIG_MACB to KconfigTom Rini
This converts the following to Kconfig: CONFIG_MACB Signed-off-by: Tom Rini <trini@konsulko.com>
2021-11-11rtc: ds1337: fix compatible string typoClemens Gruber
The driver supports the ds1339 as well, which was probably intended by the author but prevented by a typo. Fix the typo. Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
2021-11-11Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini
- device-tree sync-up with Linux for ls1028a - fixes/update in fsl-ddr driver, fsl-validate, lx2162a, fsl-mc, spintable code, configs, qspi node, pci - enable EFI_SET_TIME support in sl28 - powerpc: Drop -mstring
2021-11-10tpm: Use the new API on tpm2 spi driverIlias Apalodimas
Convert our SPI TPM driver and use the newly added API Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-10tpm2: Add a TPMv2 MMIO TIS driverIlias Apalodimas
Add support for devices that expose a TPMv2 though MMIO. Apart from those devices, we can use the driver in our QEMU setups and test TPM related code which is difficult to achieve using the sandbox driver (e.g test the EFI TCG2 protocol). It's worth noting that a previous patch added TPMv2 TIS core functions, which the current driver is consuming. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-10tpm2: Introduce TIS tpm coreIlias Apalodimas
There's a lot of code duplication in U-Boot right now. All the TPM TIS compatible drivers we have at the moment have their own copy of a TIS implementation. So let's create a common layer which implements the core TIS functions. Any driver added from now own, which is compatible with the TIS spec, will only have to provide the underlying bus communication mechanisms. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-10tpm: refactor function names for LPC based TPMsIlias Apalodimas
With the upcoming TPM2 API, some of the functions name are part of the new header file. So switch conflicting internal function names and defines. Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canaonical.com> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-10tpm: refactor function names and macros for infineon v1.2 TPMIlias Apalodimas
With the upcoming TPM2 API, some of the functions name are part of the new header file. So switch conflicting internal function names and defines. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-10Merge tag 'u-boot-stm32-20211110' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm - DHSOM update: - Remove nWP GPIO hog - Increase SF bus frequency to 50Mhz and enable SFDP - Disable video output for DHSOM - Disable EFI - Enable DFU_MTD support - Create include file for STM32 gpio driver private data - Split board and SOC STM32MP15 configuration - Device tree alignement with v5.15-rc6 for STM32MP15 - Add binman support for STM32MP15x - Normalise newlines for stm32prog - Update OTP shadow registers in SPL
2021-11-10stm32mp15: replace CONFIG_TFABOOT when it is possiblePatrick Delaunay
In some part of STM32MP15 support the CONFIG_TFABOOT can be replaced by other config: CONFIG_ARMV7_PSCI and CONFIG_ARM_SMCCC. This patch also simplifies the code in cpu.c, stm32mp1_ram.c and clk_stml32mp1.c as execution of U-Boot in sysram (boot without SPL and without TFA) is not supported: the associated initialization code is present only in SPL. This cleanup patch is a preliminary step to support SPL load of OP-TEE in secure world, with SPL in secure world and U-Boot in no-secure world. Reported-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-11-10gpio: stm32: create include file for driver private dataPatrick Delaunay
The stm32 gpio driver private data are not needed in arch include files, they are not used by code except for stm32 gpio and pincontrol drivers, using the same IP; the defines for this IP is moved in a new file "stm32_gpio_priv.h" in driver/gpio. This patch avoids to have duplicated file gpio.h for each SOC in MPU directory mach-stm32mp and in each MCU directory arch-stm32* and allows to remove CONFIG_GPIO_EXTRA_HEADER for all STM32. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>