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2021-04-12tee: optee: Change printing during optee_probeIlias Apalodimas
Right now the error messages when optee has a version mismatch or shared memory is not configured are done with a debug(). That's not very convenient since you have to enable debugging to figure out what's going on, although this is an actual error. So let's switch the debug() -> dev_err() and report those explicitly. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-04-12rtc: add support for rv3028 rtcHeiko Schocher
Add support for rtc3028 rtc from microcrystal. based on linux dirver: commit a38fd8748464: ("Linux 5.12-rc2") Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
2021-04-12firmware: scmi: fix inline comments and minor coding style issuesEtienne Carriere
Fix inline comments and empty line in scmi driver and test files. Remove test on IS_ENABLED(CONFIG_*_SCMI) in test/dm/scmi.c since these configuration are expected enabled when CONFIG_FIRMWARE_SCMI is enabled in sandbox configuration. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-12firmware: scmi: sandbox test for voltage regulatorEtienne Carriere
Implement sandbox regulator devices for SCMI voltage domains and test them in DM scmi tests. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-12firmware: scmi: voltage regulatorEtienne Carriere
Implement voltage regulators interfaced by the SCMI voltage domain protocol. The DT bindings are defined in the Linux kernel since SCMI voltage domain and regulators patches [1] and [2] integration in v5.11-rc7. Link: [1] https://github.com/torvalds/linux/commit/0f80fcec08e9c50b8d2992cf26495673765ebaba Link: [2] https://github.com/torvalds/linux/commit/2add5cacff3531e54c50b0832128299faa9f0563 Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-12pci: Mark 64bit Memory BARs as suchPhil Sutter
Just a bit more info to the reader. Signed-off-by: Phil Sutter <phil@nwl.cc> Reviewed-by: Stefan Roese <sr@denx.de>
2021-04-12mtd: Update fail_addr when erase fails due to bad blocksFarhan Ali
For all other erase failures, the fail_addr is updated with the failing address. Only in the case of erase failure due to bad block detection, the fail_addr is not updated. This change simply updates the fail_addr for this specific scenario so that it is consistent with the rest of the code. Signed-off-by: Farhan Ali <farhan.ali@broadcom.com>
2021-04-12power: pmic: remove pmic_max77696.c fileJaehoon Chung
Remove pmic_max77696.c file. The maintaining pmic_max77696.c file is useless. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-12test: pinmux: add test for 'pinctrl-single' driverDario Binacchi
The test adds two pinmux nodes to the device tree, one to test when a register changes only one pin's mux (pinctrl-single,pins), and the other to test when more than one pin's mux is changed (pinctrl-single,bits). This required replacing the controller's register access functions when the driver is used on sandbox. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-12pinctrl: single: add get_pin_muxing operationDario Binacchi
It allows to display the muxing of a given pin. Inspired by more recent versions of the Linux driver, in addition to the address and the value of the configuration register I added the pin function retrieved from the DT. In doing so, the information displayed does not depend on the platform, being a generic type driver, and it can be useful for debug purposes. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-12pinctrl: single: add get_pin_name operationDario Binacchi
It returns the name of the requested pin. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-12pinctrl: single: add get_pins_count operationDario Binacchi
It returns the number of selectable pins. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-12pinctrl: single: add register access functionsDario Binacchi
The configuration of pinmux registers was implemented with duplicate code which can be removed by adding two functions for read/write access. Access to 8-bit registers has also been added. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-12pinctrl: single: change function mask default valueDario Binacchi
The patch is inspired by more recent versions of the Linux driver. Replacing the default value 0xffffffff of the function mask with 0 is certainly more conservative in case the "pinctrl-single,function-mask" DT property is missing. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-12pinctrl: single: check "register-width" DT propertyDario Binacchi
In more recent versions of the Linux kernel the driver's probe function returns an error if the "pinctrl-single,register-width" DT property is missing. The lack of this information, in fact, does not allow to know whether to access the registers of the controller at 8, 16, ... bits. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-12pinctrl: single: get register area size by device APIDario Binacchi
Use dev_read_addr_size to get size of the controller's register area. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
2021-04-12pinctrl: single: fix debug messages formattingDario Binacchi
The dev_dbg(dev, " reg/val 0x%pa/0x%08x\n", &reg, val); prints the 'reg' address preceded by the prefix 0x0x instead of 0x. This because the printf '%pa' format specifier already prepends the prefix '0x' to the address displayed. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
2021-04-12pinctrl: single: fix offset managementDario Binacchi
The pinmux configuration DT node of a peripheral does not define a physical address but an offset. Only by adding it to the base address of the controller it is possible to calculate the physical address of the register to be configured. Printing an offset also requires a different formatting option than a physical address. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
2021-04-12pinctrl: single: fix the loop counter variable typeDario Binacchi
The 'n' variable is used as a loop counter, not as a physical address, and is used in a comparison with an int. So it makes sense to change its type from phys_addr_t to int. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
2021-04-12pinctrl: single: fix format of structure documentationDario Binacchi
U-Boot adopted the kernel-doc annotation style. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-11Merge branch '2021-04-11-remove-non-migrated-boards'Tom Rini
- Remove a large number of boards that have not migrated to DM_MMC, for which the migration deadline with 2 years ago at v2019.04.
2021-04-11Merge tag 'video-2021-07-rc1' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-video - rk3399 eDP support - pwm backlight without a known period_ns - add Chrome OS EC PWM driver - Kconfig SIMPLE_PANEL DM_GPIO dependency - remove mb862xx driver remnants - fix KiB format in reserve_video() debug trace - fix tegra124 sor CSTM LVDS_EN_ENABLE/DISABLE config - fix line padding calculation for 16 and 24 BPP bitmaps
2021-04-10video: Fix line padding calculation for 16 and 24 BPP bitmapsSylwester Nawrocki
Each row in the pixel array in the bitmap file is padded if necessary so the row size is always a multiple of 4 bytes. In current code the complement of row size to a multiple of 4 bytes is further unnecessarily multiplied by the pixel size. This results in incorrect displaying of bitmaps having row size that is not a multiple of 4 bytes. Fix this by removing the unnecessary multiplication. Tested with 24BPP bitmap and XRGB32 display. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-04-10tegra: video: fix tegra_dc_sor_config_panel()Heinrich Schuchardt
Bitwise OR has a higher operator precedence than the ternary conditional. Add the missing parentheses. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-04-10finish removing mb862xx video driverTrevor Woerner
drivers/video/mb862xx.c was removed in commit 9c1e098fb92de38f0017585658dd50c3009c84ab from December 2020, however, this last little remnant in drivers/video/cfb_console.c remained. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2021-04-10video: SIMPLE_PANEL depends on DM_GPIOAsherah Connor
SIMPLE_PANEL currently only depends on PANEL && BACKLIGHT, but the code makes references to dm_gpio_set_value and gpio_request_by_name. These are defined in drivers/gpio/gpio-uclass.c, so a dependency on DM_GPIO corrects these link errors: aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_set_backlight': /home/kameliya/u-boot/drivers/video/simple_panel.c:42: undefined reference to `dm_gpio_set_value' aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_enable_backlight': /home/kameliya/u-boot/drivers/video/simple_panel.c:27: undefined reference to `dm_gpio_set_value' aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_of_to_plat': /home/kameliya/u-boot/drivers/video/simple_panel.c:72: undefined reference to `gpio_request_by_name' This issue is only exposed if you have a board which enables CONFIG_DM_VIDEO without CONFIG_DM_GPIO; so far, none do, but soon a QEMU board may. Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
2021-04-10pwm: Add a driver for Chrome OS EC PWMAlper Nebi Yasak
This PWM is used in rk3399-gru-bob and rk3399-gru-kevin to control the display brightness. We can only change the duty cycle, so on set_config() we just try to match the duty cycle that dividing duty_ns by period_ns gives us. To disable, we set the duty cycle to zero while keeping the old value for when we want to re-enable it. The cros_ec_set_pwm_duty() function is taken from Depthcharge's cros_ec_set_bl_pwm_duty() but modified to use the generic pwm type. The driver itself is very loosely based on rk_pwm.c for the general pwm driver structure. The devicetree binding file is from Linux, before it was converted to YAML at 5df5a577a6b4 ("dt-bindings: pwm: Convert google,cros-ec-pwm.txt to YAML format") in their repo. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-10video: backlight: Support PWMs without a known period_nsAlper Nebi Yasak
The PWM device provided by Chrome OS EC doesn't really support anything other than setting a relative duty cycle. To support it as a backlight, this patch makes the PWM period optional in the device tree and pretends the valid brightness range is its period_ns. Also adds a sandbox test for a PWM channel that has a fixed period, checking that the resulting duty_cycle matches on a set_config() even if the requested period_ns can't be set. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-10ppc: Remove Cyrus_P5020 and P5040 boardsTom Rini
These boards have not been converted to CONFIG_DM_MMC by the deadline. Remove them. As the P5020 is the last ARCH_P5020 platform, remove that support as well. Cc: Andy Fleming <afleming@gmail.com> Cc: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-04-10ppc: Remove T2081QDS board and ARCH_T2081 supportTom Rini
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. It is also the only ARCH_T2081 board so remove that support as well. Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com> Cc: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10ppc: Remove TARGET_T1040QDS referencesTom Rini
The TARGET_T1040QDS platforms have been removed already, drop some remaining references in the code. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10arm: Remove s32v234evb boardTom Rini
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Eddy Petrișor <eddy.petrisor@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10arm: Remove vexpress_ca15_tc2 boardTom Rini
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10arm: Remove apf27 boardTom Rini
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Philippe Reynes <tremyfr@yahoo.fr> Cc: Eric Jarrige <eric.jarrige@armadeus.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10drivers: ata: Remove mvsata_ide driverTom Rini
The mvsata_ide driver was due for DM conversion by v2019.07. As that has long passed, remove the driver and disable it in the boards which had enabled it. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10ata: DWC_AHSATA depends on BLKTom Rini
The dwc ahsata driver is written such that CONFIG_BLK must be enabled, add this as a dependency in Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10rockchip: video: vop: Add reset supportArnaud Patard (Rtp)
In order to ensure that the VOP registers are in correct state, add missing support for the VOP reset lines found in the device-tree Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10rockchip: video: edp: Add missing reset supportArnaud Patard (Rtp)
In order to ensure that the eDP registers are in correct state, add missing support for the eDP reset lines found in the device-tree. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10rockchip: video: vop: Fix format of fbbase in debug stringArnaud Patard (Rtp)
The debug string printing the device name, framebuffer address and of node is using %lu as format for the framebuffer address, which is not so nice. Change it to %lx. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10rockchip: pwm: Fix default polarityArnaud Patard (Rtp)
In the code, the default polarity is set to positive/positive, which is neither normal polarity or inverted polarity. It's only the hardware default. This leads to booting linux with wrong polarity setting. Update the code to use PWM_DUTY_POSTIVE | PWM_INACTIVE_NEGATIVE by default instead. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10Rockchip: video: vop: Reserve efi fb memoryArnaud Patard (Rtp)
When booting with EFI and graphics, the memory used for framebuffer has to be reserved, otherwise it may leads to kernel memory overwrite. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10rockchip: video: edp: Add rk3399 supportArnaud Patard (Rtp)
According to linux commit "drm/rockchip: analogix_dp: add rk3399 eDP support" (82872e42bb1501dd9e60ca430f4bae45a469aa64), rk3288 and rk3399 eDP IPs are nearly the same, the difference is in the grf register (SOC_CON6 versus SOC_CON20). So, change the code to use the right register on each IP. The clocks don't seem to be the same, the eDP clock is not at index 1 on rk3399, so don't try changing the clock at index 1 to rate 0 on rk3399. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-10rockchip: video: vop: Use endpoint compatible string to find VOP modeArnaud Patard (Rtp)
The current code is using an hard coded enum and the of node reg value of endpoint to find out if the endpoint is mipi/hdmi/lvds/edp/dp. The order is different between rk3288, rk3399 vop little, rk3399 vop big. A possible solution would be to make sure that the rk3288.dtsi and rk3399.dtsi files have "expected" reg value or an other solution is to find the kind of endpoint by comparing the endpoint compatible value. This patch is implementing the more flexible second solution. Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
2021-04-09Merge tag 'u-boot-stm32-20210409' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm Add rt-thread art-pi board support based on STM32H750 SoC Add Engicam i.Core STM32MP1 SoM Add FIP header support for STM32programmer Update uart number when no serial device found for STM32MP1 Remove board_check_usb_power function when ADC flag is not set Update SPL size limitation for STM32MP1 Set soc_type, soc_pkg, soc_rev env variables for STM32MP1
2021-04-09Merge tag 'u-boot-imx-20210409' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20210409 ------------------- - Secure Boot : - HAB for MX8M / MX7ULP - CAAM fixes - Fixes for imxrt1020 - Fixes for USDHC driver - Fixes for Toradex (Colibri / Apalis) - Switch to DM for several boards - mx23 olinuxo - usbarmory - marsboard / riotboard - Gateworks GW Ventana - NXP upstream patches (LPDDR / CAAM / HAB) CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7089
2021-04-09ram: stm32: fix strsep failed on read only memorydillon min
strsep will change data from original memory address, in case the memory is in non-sdram/sram place, will run into a bug(hang at SDRAM: ) just add a temporary array to store bank_name[] to fix this bug. Signed-off-by: dillon min <dillon.minfei@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-04-08mmc: fsl_esdhc_imx: add extra delay for IO voltage switch if necessaryHaibo Chen
Some board like imx8mm-evkb, IO voltage switch from 3.3v to 1.8v need around 18ms, common code only delay 10ms, so need to delay extra 8ms. Otherwise voltage switch will timeout when wait for data0 line. This IO voltage switch time depends on board design, depend on the PMIC and capacitance. imx8mm-evkb board use PCA9450(PMIC) and 10uF capacitance. Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2021-04-08mmc: fsl_esdhc_imx: remove redundant cmd11 related code.Haibo Chen
Common code already handle the voltage switch sequence based on spec, so remove the redundant voltage switch code. Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2021-04-08mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock outputHaibo Chen
For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN, these are reserved bits. Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the card clock output. After commit b5874b552ffa ("mmc: fsl_esdhc_imx: add wait_dat0() support"), we meet SD3.0 card can't work at UHS mode, mmc_switch_voltage() fail because the second mmc_wait_dat0 return -ETIMEDOUT. According to SD spec, during voltage switch, need to gate off/on the card clock. If not set the FRC_SDCLK_ON, after CMD11, hardware will gate off the card clock automatically, so card do not detect the clock off/on behavior, so will draw the data0 line low until next command. Fixes: b5874b552ffa ("mmc: fsl_esdhc_imx: add wait_dat0() support") Tested-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2021-04-08spl: fit: nand: allow for non-page-aligned elementsTim Harvey
Add a weak nand_get_mtd function for nand drivers to provide mtd info and use this to set pagesize such that reading of non page-aligned elements can succeed. The spl_load_simple_fit already handles block block access so all we need to do is provide the nand writesize as the block length. Further cleanup of the drivers which use nand_spl_loaders.c such as am335x_spl_bch.c, atmel_nand.c, and nand_spl_simple.c could be done using info from mtd_info instead of statically defined details. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Tom Rini <trini@konsulko.com>