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2022-04-05net: phy: Fix rgmii-id phy reset timeout issueT Karthik Reddy
While creating a phy device using phy_device_create(), we need to provide a valid phyaddr instead of 0 causing phy address being registered as 0 with mdio bus and shows mdio phy list as below ZynqMP> mdio list eth0: 0 - TI DP83867 <--> ethernet@ff0b0000 eth1: 0 - TI DP83867 <--> ethernet@ff0c0000 Also PHY soft reset is being requested on 0 instead of valid address causing "PHY reset timed out" error. So add phyaddr argument to phy_connect_phy_id() and to its prototype to create phy device with valid phyaddress. Fixes: a744a284e354 ("net: phy: Add support for ethernet-phy-id with gpio reset") Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Link: https://lore.kernel.org/r/fe35fddb9faa5af577ffdfabaec6879c935a30f8.1648562755.git.michal.simek@xilinx.com
2022-04-05clk: zynqmp: Add support for for DP audio/video clocksMichal Simek
Add support for getting rate for DP audio and video clocks. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/8792efe1fd9715f7c8a2e1e24f0454fb5b25d833.1648552434.git.michal.simek@xilinx.com
2022-03-30pwm: Add driver for cadence TTCMichal Simek
TTC has three modes of operations. Timer, PWM and input counters. There is already driver for timer under CADENCE_TTC_TIMER which is used for ZynqMP R5 configuration. This driver is targeting PWM which is for example configuration which can be used for fan control. The driver has been tested on Xilinx Kria SOM platform where fan is connected to one PL pin. When TTC output is connected via EMIO to PL pin TTC pwm can be configured and tested for example like this: pwm config 0 0 10000 1200 pwm enable 0 0 pwm config 0 0 10000 1400 pwm config 0 0 10000 1600 Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Sean Anderson <sean.anderson@seco.com> Link: https://lore.kernel.org/r/915a662ddb88f7a958ca1f307e8fea59af9d7feb.1634303847.git.michal.simek@xilinx.com
2022-03-30timer: cadence: Add bind function to driverMichal Simek
When DT node has pwm-cells property it shouldn't be bind as timer driver but as PWM driver. That's why make sure that this property is checked. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/434ef195fbedea9f83672a12d1ace0da16e8832e.1634303847.git.michal.simek@xilinx.com
2022-03-29mmc: zynq_sdhci: Fix SDx_BASECLK configurationAshok Reddy Soma
The DLL mode supported SD reference clocks are 50 MHz, 100 MHz and 200 MHz. When user select SD frequency as 200MHz in the design, the actual frequency is going to come around ~187MHz (<= 200MHz considering the parent clock and divisor selection). We need to set SDx_BASECLK as 200 in this case, setting 187 will result in tuning failures in mmc. Set SDx_BASECLK to exact value of 200, 100 or 50 based on the frequency range. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Link: https://lore.kernel.org/r/6c1e5eeeedd2864a0c85e6b409d182031d8c6c1a.1648210268.git.michal.simek@xilinx.com
2022-03-29serial: zynq: Change fifo behavior in debug modeMichal Simek
Serial IP has output buffer which status is indicated by two bits. If fifo if empty or full. Default configuration is that chars are pushed to fifo till it is full. Time to time it is visible that chars are scambled and logs are not visible. Not sure what it is exactly happening but all the time it helps to change driver behavior to write only one char at a time. That's why enable this mode when debug uart is enabled not to see scrambled chars in debug by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/332b2106d7a8190dd1001b5387f8bd1fba2e061b.1648205405.git.michal.simek@xilinx.com
2022-03-29firmware: zynqmp: Do not bind PD driver in SPL if disabledMichal Simek
Change if condition to cover SPL flow. SPL needs to have CONFIG_SPL_POWER_DOMAIN enabled to be able to bind CONFIG_ZYNQMP_POWER_DOMAIN driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/8e1d381013a0ce39d736da166d2b401c4b12d38a.1646064792.git.michal.simek@xilinx.com
2022-03-28video: Drop formike driverSimon Glass
This is not used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28video: Convert CONFIG_VIDEO_BCM2835 to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_VIDEO_BCM2835 This is the final ad-hoc CONFIG_VIDEO_... to convert. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Matthias Brugger <mbrugger@suse.com>
2022-03-28video: mxs: Drop old video codeSimon Glass
This is no-longer used and is the last reference to video_hw_init(). Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28video: Drop FSL DIU driverSimon Glass
This does not use driver model and is more than two years past the migration date. Drop it. It can be added back later if needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28video: fsl: colibri_vf: Drop FSL DCU driverSimon Glass
This does not use driver model and is more than two years past the migration date. Drop it. It can be added back later if needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28video: Drop da8xx-fbSimon Glass
This is not used in U-Boot anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28video: Drop references to CONFIG_VIDEO et alSimon Glass
Drop the Kconfigs which are not used and all references to them. In particular, this drops CONFIG_VIDEO to avoid confusion and allow us to eventually rename CONFIG_DM_VIDEO to CONFIG_VIDEO. Also drop the prototype for video_get_info_str() which is no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jason Liu <jason.hui.liu@nxp.com>
2022-03-28video: Drop video_fb headerSimon Glass
This is not used now. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28video: nexell: Drop unused and invalid codeSimon Glass
Unfortunately this driver uses the old video structure to store things. This is not supported with driver model. Drop the old code and comment out the other pieces, so the maintainer can take a look. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28video: Drop cfg_consoleSimon Glass
The non-driver model video support was removed two years ago. Drop this driver, which is only used by nokia_rx51. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-28Merge tag 'v2022.04-rc5' into nextTom Rini
Prepare v2022.04-rc5
2022-03-28mtd: gpmi: fix the bch setting backward compatible issueHan Xu
Previous u-boot code changed the default bch setting behavior and caused backward compatible issue. This fix choose the legacy bch geometry back again as the default option. If the minimum ecc strength that NAND chips required need to be chosen, it can be enabled by either adding DT flag "fsl,use-minimum-ecc" or CONFIG_NAND_MXS_USE_MINIMUM_ECC in configs. The unused flag "fsl,legacy-bch-geometry" get removed. Fixes: 51cdf83eea (mtd: gpmi: provide the option to use legacy bch geometry) Fixes: 616f03daba (mtd: gpmi: change the BCH layout setting for large oob NAND) Tested-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Signed-off-by: Han Xu <han.xu@nxp.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2022-03-28Fix URLs to old freescale git reposPali Rohár
Freescale git repos are now on source.codeaurora.org. Signed-off-by: Pali Rohár <pali@kernel.org>
2022-03-25bootcount: Add pmic pfuze100 bootcount driverPhilip Oberfichtner
Use the MEMA - MEMD registers on the PFUZE100 as bootcount registers. Based on work from Heiko Schocher <hs@denx.de>. Signed-off-by: Philip Oberfichtner <pro@denx.de>
2022-03-25disk: Add an option for partitions in SPLSimon Glass
In some cases we do not want to enable partition support in SPL. Add an option to allow this. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-25pinctrl: Add the pinctrl setting for PWM.Billy Tsai
This patchs add the signal description array for PWM pinctrl settings. Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2022-03-25pwm: Add Aspeed ast2600 PWM supportBilly Tsai
This patch add the support of PWM controller which can be found at aspeed ast2600 soc. The pwm supoorts up to 16 channels and it's part function of multi-function device "pwm-tach controller". Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2022-03-25pci: Add defines for normal and subtractive PCI bridgesPali Rohár
Add following two new PCI class codes defines into pci_ids.h include file: PCI_CLASS_BRIDGE_PCI_NORMAL PCI_CLASS_BRIDGE_PCI_SUBTRACTIVE And use these defines in all U-Boot code for describing PCI class codes for normal and subtractive PCI bridges. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2022-03-25Convert CONFIG_LCD_INFO et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_LCD_INFO CONFIG_LCD_LOGO CONFIG_LCD_INFO_BELOW_LOGO CONFIG_LCD_IN_PSRAM Cc: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25Convert CONFIG_ATMEL_LCD et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_ATMEL_LCD CONFIG_ATMEL_LCD_BGR555 CONFIG_ATMEL_LCD_RGB565 CONFIG_GURNARD_SPLASH Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25Convert CONFIG_MII_INIT to KconfigTom Rini
This converts the following to Kconfig: CONFIG_MII_INIT Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25Convert CONFIG_PHY_RESET_DELAY to KconfigTom Rini
This converts the following to Kconfig: CONFIG_PHY_RESET_DELAY Cc: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25Convert CONFIG_LPC32XX_ETH to KconfigTom Rini
This converts the following to Kconfig: CONFIG_LPC32XX_ETH Cc: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-25Convert CONFIG_RMII to KconfigTom Rini
This converts the following to Kconfig: CONFIG_RMII Cc: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-23bootcount: clarify documentationMichael Opdenacker
- Grammar fixes - Clarify explanations Signed-off-by: Michael Opdenacker <michael.opdenacker@bootlin.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2022-03-23i2c: fix always-true condition in i2c_probe_chip()Nikita Yushchenko
Per dm_i2c_ops.probe_chip documentation, i2c_probe_chip() shall fallback to default probe method when .probe_chip() returns -ENOSYS. Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2022-03-23misc: atsha204a: fix i2c address readout from DTSAdrian Fiergolski
This patch replaces use fdtdec_get_addr with simpler dev_read_addr(). fdtdec_get_addr doesn't work properly on ZynqMP-based (64bit) system. Although not confirmed, it could be related to the fact, that quoting the documentation, "This variant hard-codes the number of cells used to represent the address and size based on sizeof(fdt_addr_t) and sizeof(fdt_size_t)". Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-03-23misc: atsha204a: add delay after sending the messageAdrian Fiergolski
Once request is sent, and before receiving a response, the delay is required. This patch fixes missing delay for before first response try. Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-03-23misc: atsha204a: return timeout from wakeup functionAdrian Fiergolski
If the maximum number of wake-up attempts is exceeded, return -ETIMEDOUT. Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Reviewed-by: Marek Behún <marek.behun@nic.cz>
2022-03-19Merge tag 'dm-pull-18mar22' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-dm into next binman FIT improvements various minor sandbox improvements
2022-03-18sandbox: Slow down the LCD sync rateSimon Glass
There is seldom a need to refresh at 100Hz and it uses a lot of CPU. Reduce the rate to 10Hz which seems to be adequate. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-18sandbox: Open host file for read-only access if neededSimon Glass
Some files cannot be written but read-only access is still useful for tests. Add a fallback to read-only access when needed. This is useful in CI when opening a large data file provided by docker, where read/write access would result in copying the file, thus needing a lot of extra disk space. Signed-off-by: Simon Glass <sjg@chromium.org>
2022-03-18net: fec_mxc: Drop CONFIG_FEC_XCV_TYPETom Rini
With all boards now using DM_ETH we determine the value for CONFIG_FEC_XCV_TYPE at run time, except in the case of the default fall-back. Set the fallback directly now. Cc: Fabio Estevam <festevam@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18net: fec_mxc: Remove non-DM_ETH codeTom Rini
Now that all boards have been converted, remove the non-DM_ETH code. Cc: Fabio Estevam <festevam@gmail.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2022-03-18rockchip: ram: sdram_rk3x88: replace comma by semicolonJohan Jonker
A comma at the end of a line gives sometimes strange effects in combination with some code formatters, so replace a comma by a semicolon in the sdram_rk3188.c and sdram_rk3288.c files. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-03-18rockchip: saradc: remove double semi-colonGiulio Benetti
Remove double semi-colon that has been forgotten while adding the driver. This is only a style fix since it doesn't change the functionality of the driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-03-16Merge tag 'xilinx-for-v2022.07-rc1' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2022.07-rc1 microblaze: - Add support for reserved memory xilinx: - Update FRU code with MAC reading zynqmp: - Remove double AMS setting - DT updates (mostly for SOMs) - Add support for zcu106 rev 1.0 zynq: - Update nand binding nand: - Aligned zynq_nand to upstream DT binding net: - Add support for ethernet-phy-id mmc: - Workaround CD in zynq_sdhci driver also for ZynqMP - Add support for dynamic/run-time SD config for SOMs gpio: - Add driver for slg7xl45106 firmware: - Add support for dynamic SD config power-domain: - Update zynqmp driver with the latest firmware video: - Add skeleton driver for DP and DPDMA i2c: - Fix i2c to work with QEMU pinctrl: - Add driver for zynqmp pinctrl driver
2022-03-16Merge https://source.denx.de/u-boot/custodians/u-boot-mmcTom Rini
- Rockchip, i.MX and xenon_sdhci updates
2022-03-16Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini
- k210 updates
2022-03-16rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3568Alper Nebi Yasak
On RK3568, a register bit must be set to enable Enhanced Strobe. However, it appears that the address of this register may differ from vendor to vendor and should be read from the underlying MMC IP. Let the Rockchip SDHCI driver read this address and set the relevant bit when Enhanced Strobe configuration is requested. The IP uses a custom mode select value (0x7) for HS400, use that instead of the common but non-standard SDHCI_CTRL_HS400 value (0x5). Also add some necessary DLL_STRBIN and DLL_TXCLK configuration for HS400. Additionally, a bit signifying that the connected hardware is an eMMC chip must be set to enable Data Strobe for HS400 and HS400ES modes. Also make the driver set this bit as appropriate. This is partly ported from Linux's Synopsys DWC MSHC driver which happens to be the underlying IP. (drivers/mmc/host/sdhci-of-dwcmshc.c in Linux tree). Co-developed-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-03-16rockchip: sdhci: Add HS400 Enhanced Strobe support for RK3399Alper Nebi Yasak
On RK3399, a register bit must be set to enable Enhanced Strobe. Let the Rockchip SDHCI driver set it when Enhanced Strobe configuration is requested. However, having it set makes the lower-speed modes stop working and makes reinitialization fail, so let it be unset as needed in set_control_reg(). This is mostly ported from Linux's Arasan SDHCI driver which happens to be the underlying IP. (drivers/mmc/host/sdhci-of-arasan.c in Linux tree). Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-03-16mmc: sdhci: Add HS400 Enhanced Strobe supportAlper Nebi Yasak
Delegate setting the Enhanced Strobe configuration to individual drivers if they set a function for it. Return -ENOTSUPP if they do not, like what the MMC uclass does. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-03-16mmc: xenon_sdhci: remove wait_dat0 SDHCI OPRobert Marko
Generic SDHCI driver received support for checking the busy status by polling the DAT[0] level instead of waiting for the worst MMC switch time. Unfortunately, it appears that this does not work for Xenon controllers despite being a part of the standard SDHCI registers and the Armada 3720 datasheet itself telling that BIT(20) is useful for detecting the DAT[0] busy signal. I have tried increasing the timeout value, but I have newer managed to catch DAT_LEVEL bits change from 0 at all. This issue appears to hit most if not all SoC-s supported by Xenon driver, at least A3720, A8040 and CN9130 have non working eMMC currently. So, until a better solution is found drop the wait_dat0 OP for Xenon. I was able to only test it on A3720, but it should work for others as well. Fixes: 40e6f52454fc ("drivers: mmc: Add wait_dat0 support for sdhci driver") Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Stefan Roese <sr@denx.de>
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-07 04:39:27 +0000