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2023-01-08mtd: rawnand: omap_gpmc: Add SPL NAND supportRoger Quadros
Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
2023-01-08mtd: rawnand: omap_gpmc: support u-boot driver modelRoger Quadros
Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
2023-01-08mtd: rawnand: nand_base: Allow base driver to be used in SPL without nand_bbtRoger Quadros
nand_bbt.c is not being built with the nand_base driver during SPL build. This results in build failures if we try to access any nand_bbt related functions. Don't use any nand_bbt functions for SPL build. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-3-rogerq@kernel.org
2023-01-08mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correctionRoger Quadros
The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
2023-01-02arm: s5p4418: dm_serial: switch to DM_SERIALStefan Bosch
Switch the S5P4418-SOC and therefore the s5p4418_nanopi2 board to DM_SERIAL. Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2023-01-02arm: s5p4418: dm_serial: add driver source codeStefan Bosch
Add dm_serial driver source code for S5P4418 SOC. Extend the "arm,pl011" driver by init of UART-clock and UART-reset. Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2023-01-02Add CONFIG_SYS_NAND_SELF_INIT to Kconfig for NAND DENALI driverLokanathan, Raaj
Add the CONFIG_SYS_NAND_SELF_INIT to the Kconfig to follow the changes from mainline. Signed-off-by: Lokanathan, Raaj <raaj.lokanathan@intel.com> Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
2023-01-02serial: Use -EAGAIN in getc and putcPali Rohár
U-Boot serial code already handles -EAGAIN value from getc and putc callbacks. So change drivers code to return -EAGAIN when HW is busy instead of doing its own busy loop and waiting until HW is ready. Signed-off-by: Pali Rohár <pali@kernel.org>
2023-01-02serial: Do not write additional \r before \n for dm_serial driversPali Rohár
serial-uclass.c code already puts \r before \n for all dm_serial drivers. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-02rtc: add ht1380 driverSergei Antonov
Support Holtek HT1380/HT1381 Serial Timekeeper Chip. It provides seconds , minutes, hours, day of the week, date, month and year information. Datasheet: https://www.holtek.com.tw/documents/10179/11842/ht1380_1v130.pdf Signed-off-by: Sergei Antonov <saproj@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-02pinctrl: uniphier: add ethernet TX pin data for PXs3Dai Okamura
PXs3 Ref boards need to change the strength of ethernet ports for stability, like LD20's one. This adds the table data and fixes the boot issue on PXs3 Ref board. Fixes: 0852033309 ("ARM: uniphier: sync with Linux 5.8-rc4") Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
2023-01-02pinctrl: uniphier: add check if pins are validDai Okamura
The pinctrl datas of uniphier SoCs are the minimal subsets of kernel's one, and some tables has no data to save the footprint size. If the board dts tries to match a pin name on no pins defined SoC, the footprint magic code causes "Synchronous Abort". This checks if the 'pins' data is valid, and if empty, avoids the abort with the warning as follows: WARNING at drivers/pinctrl/uniphier/pinctrl-uniphier-core.c:36/uniphier_pinctrl_get_pins_count()! pinctrl_select_state_full: pinctrl_config_one: err=-38 Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
2022-12-31cmd: source: Support specifying config nameSean Anderson
As discussed previously [1,2], the source command is not safe to use with verified boot unless there is a key with required = "images" (which has its own problems). This is because if such a key is absent, signatures are verified but not required. It is assumed that configuration nodes will provide the signature. Because the source command does not use configurations to determine the image to source, effectively no verification takes place. To address this, allow specifying configuration nodes. We use the same syntax as the bootm command (helpfully provided for us by fit_parse_conf). By default, we first try the default config and then the default image. To force using a config, # must be present in the command (e.g. `source $loadaddr#my-conf`). For convenience, the config may be omitted, just like the address may be (e.g. `source \#`). This also works for images (`source :` behaves exactly like `source` currently does). [1] https://lore.kernel.org/u-boot/7d711133-d513-5bcb-52f2-a9dbaa9eeded@prevas.dk/ [2] https://lore.kernel.org/u-boot/042dcb34-f85f-351e-1b0e-513f89005fdd@gmail.com/ Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-31treewide: Use NULL for script image nameSean Anderson
Two callers of image_source_script specify an image name. However, both use the deprecated @ syntax, indicating that they have not been updated in a while. If CONFIG_FIT_SIGNATURE is enabled, we will reject such names outright. Back in commit 152576a598c ("stm32mp: stm32prog: handle U-Boot script in flashlayout alternate"), we even renamed one of the nodes. Instead of hard-coding a script image name, just use the default image. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-12-23cf_spi.c: Rename CONFIG_SPI_IDLE_VAL to SPI_IDLE_VALTom Rini
This value is never changed by boards, so just rename it to SPI_IDLE_VAL to fit with the rest of the code. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23pci-rcar-gen3: Rename CONFIG_SEND_ENABLETom Rini
We rename the symbol CONFIG_SEND_ENABLE to just SEND_ENABLE, and remove the second whitespace following the define. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23post: Move CONFIG_SYS_POST to CFG_SYS_POSTTom Rini
Migrate the rest of the CONFIG_SYS_POST macros over to CFG_SYS_POST namespace. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23kbuild: Remove uncmd_spl logicTom Rini
At this point in the conversion there should be no need to have logic to disable some symbol during the SPL build as all symbols should have an SPL counterpart. The main real changes done here are that we now must make proper use of CONFIG_IS_ENABLED(DM_SERIAL) rather than many of the odd tricks we developed prior to CONFIG_IS_ENABLED() being available. Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_USB_ISP1301_I2C_ADDR to CFGTom Rini
Perform a simple rename of CONFIG_USB_ISP1301_I2C_ADDR to CFG_USB_ISP1301_I2C_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_USART_ID to CFGTom Rini
Perform a simple rename of CONFIG_USART_ID to CFG_USART_ID Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_USART_BASE to CFGTom Rini
Perform a simple rename of CONFIG_USART_BASE to CFG_USART_BASE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_TSEC_TBICR_SETTINGS to CFGTom Rini
Perform a simple rename of CONFIG_TSEC_TBICR_SETTINGS to CFG_TSEC_TBICR_SETTINGS Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_SYS_I2C_DIRECT_BUS to CFGTom Rini
Perform a simple rename of CONFIG_SYS_I2C_DIRECT_BUS to CFG_SYS_I2C_DIRECT_BUS Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_SH_ETHER_USE_PORT to CFGTom Rini
Perform a simple rename of CONFIG_SH_ETHER_USE_PORT to CFG_SH_ETHER_USE_PORT Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_SH_ETHER_PHY_ADDR to CFGTom Rini
Perform a simple rename of CONFIG_SH_ETHER_PHY_ADDR to CFG_SH_ETHER_PHY_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_SH_ETHER_CACHE_WRITEBACK to CFGTom Rini
Perform a simple rename of CONFIG_SH_ETHER_CACHE_WRITEBACK to CFG_SH_ETHER_CACHE_WRITEBACK Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_SH_ETHER_CACHE_INVALIDATE to CFGTom Rini
Perform a simple rename of CONFIG_SH_ETHER_CACHE_INVALIDATE to CFG_SH_ETHER_CACHE_INVALIDATE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_SH_ETHER_ALIGNE_SIZE to CFGTom Rini
Perform a simple rename of CONFIG_SH_ETHER_ALIGNE_SIZE to CFG_SH_ETHER_ALIGNE_SIZE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_SCSI_DEV_LIST to CFGTom Rini
Perform a simple rename of CONFIG_SCSI_DEV_LIST to CFG_SCSI_DEV_LIST Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_SCIF_A to CFGTom Rini
Perform a simple rename of CONFIG_SCIF_A to CFG_SCIF_A Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_POWER_PFUZE3000_I2C_ADDR to CFGTom Rini
Perform a simple rename of CONFIG_POWER_PFUZE3000_I2C_ADDR to CFG_POWER_PFUZE3000_I2C_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_POWER_PFUZE100_I2C_ADDR to CFGTom Rini
Perform a simple rename of CONFIG_POWER_PFUZE100_I2C_ADDR to CFG_POWER_PFUZE100_I2C_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_POWER_LTC3676_I2C_ADDR to CFGTom Rini
Perform a simple rename of CONFIG_POWER_LTC3676_I2C_ADDR to CFG_POWER_LTC3676_I2C_ADDR Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_PL01x_PORTS to CFGTom Rini
Perform a simple rename of CONFIG_PL01x_PORTS to CFG_PL01x_PORTS Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_PL011_CLOCK to CFGTom Rini
Perform a simple rename of CONFIG_PL011_CLOCK to CFG_PL011_CLOCK Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_PHY_ET1011C_TX_CLK_FIX to CFGTom Rini
Perform a simple rename of CONFIG_PHY_ET1011C_TX_CLK_FIX to CFG_PHY_ET1011C_TX_CLK_FIX Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_PCIE_IMX_POWER_GPIO to CFGTom Rini
Perform a simple rename of CONFIG_PCIE_IMX_POWER_GPIO to CFG_PCIE_IMX_POWER_GPIO Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_PCIE_IMX_PERST_GPIO to CFGTom Rini
Perform a simple rename of CONFIG_PCIE_IMX_PERST_GPIO to CFG_PCIE_IMX_PERST_GPIO Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_MXC_USB_FLAGS et al to CFGTom Rini
Perform simple renames of: CONFIG_MXC_USB_FLAGS to CFG_MXC_USB_FLAGS CONFIG_MXC_USB_PORT to CFG_MXC_USB_PORT CONFIG_MXC_USB_PORTSC to CFG_MXC_USB_PORTSC Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_MXC_UART_BASE to CFGTom Rini
Perform a simple rename of CONFIG_MXC_UART_BASE to CFG_MXC_UART_BASE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_MXC_NAND_REGS_BASE to CFGTom Rini
Perform a simple rename of CONFIG_MXC_NAND_REGS_BASE to CFG_MXC_NAND_REGS_BASE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_MXC_NAND_IP_REGS_BASE to CFGTom Rini
Perform a simple rename of CONFIG_MXC_NAND_IP_REGS_BASE to CFG_MXC_NAND_IP_REGS_BASE Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_MAX_MEM_MAPPED to CFGTom Rini
Perform a simple rename of CONFIG_MAX_MEM_MAPPED to CFG_MAX_MEM_MAPPED Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_LPC32XX_NAND_SLC_WWIDTH to CFGTom Rini
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_WWIDTH to CFG_LPC32XX_NAND_SLC_WWIDTH Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_LPC32XX_NAND_SLC_WSETUP to CFGTom Rini
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_WSETUP to CFG_LPC32XX_NAND_SLC_WSETUP Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_LPC32XX_NAND_SLC_WHOLD to CFGTom Rini
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_WHOLD to CFG_LPC32XX_NAND_SLC_WHOLD Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_LPC32XX_NAND_SLC_WDR_CLKS to CFGTom Rini
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_WDR_CLKS to CFG_LPC32XX_NAND_SLC_WDR_CLKS Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_LPC32XX_NAND_SLC_RWIDTH to CFGTom Rini
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_RWIDTH to CFG_LPC32XX_NAND_SLC_RWIDTH Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_LPC32XX_NAND_SLC_RSETUP to CFGTom Rini
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_RSETUP to CFG_LPC32XX_NAND_SLC_RSETUP Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23global: Migrate CONFIG_LPC32XX_NAND_SLC_RHOLD to CFGTom Rini
Perform a simple rename of CONFIG_LPC32XX_NAND_SLC_RHOLD to CFG_LPC32XX_NAND_SLC_RHOLD Signed-off-by: Tom Rini <trini@konsulko.com>
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