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2025-03-13Merge tag 'u-boot-imx-next-20250313' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/25142 - Support Toradex i.MX6 Apalis/Colibri v1.2 SoM. - Guard tee.bin inclusion on imx9, - Remove unneeded regulator entry on DH i.MX6 DHCOM DRC02 devicetree. - Add i.MX mailbox driver - Convert ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE to Kconfig. - Cope with existing optee node on imx8m.
2025-03-13memory: ti-gpmc: Alloc per driver private structVignesh Raghavendra
Driver uses dev_get_priv() but never allocates it in its declaration leading to various crashes. Fix this by explicitly allocating the storage. Fixes: 9b0b5648d6e4 ("memory: Add TI GPMC driver") Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-03-13mailbox: add i.MX Messaging Unit (MU) driverPeng Fan
This patch provides a driver for i.MX Messaging Unit (MU) using the commom mailbox framework. This is ported from Linux (v6.12.8) driver drivers/mailbox/imx-mailbox.c. Its commit SHA is: 39d7d6177f0c ("mailbox: imx: use device name in interrupt name") Signed-off-by: Viorel Suman <viorel.suman@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Alice Guo <alice.guo@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2025-03-13mmc: fsl_esdhc: Migrate ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE to KconfigTom Rini
The flag for enabling the ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE quirk can be handled easily enough in Kconfig. This lets us remove a function but not obviously correct usage of the IS_ENABLED() macro. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-03-12Merge tag 'u-boot-stm32-20250312' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-stm into next CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/25112 - Add drivers for MFD STM32 TIMERS and STM32 PWM and enable them on stm32mp135f-dk - Restrict _debug_uart_init() usage in STM32 serial driver - Add support for environment in eMMC on STM32MP13xx DHCOR SoM - Introduce DH STM32MP15xx DHSOM board specific defconfigs - Fix CONFIG_BOOTCOUNT_ALTBOOTCMD update on DH STM32MP1 DHSOM - Update maintainer for board stm32f746-disco - Fix Linux cmdline for stm32f769-disco - Cleanup in stm32f***-u-boot.dtsi and in board_late_init() by removing legacy led and button management.
2025-03-12Merge patch series "drivers: Driver support for ADI SC5xx SoCs"Tom Rini
Greg Malysa <malysagreg@gmail.com> says: This series adds all of the supported peripheral drivers for the sc5xx series of SoCs from Analog Devices and other drivers that are used by the evaluation kits, such as a GPIO expander used by the EZLITE carrier boards. This series passes gitlab CI tests. Link: https://lore.kernel.org/r/20250226173150.13198-1-malysagreg@gmail.com
2025-03-12mmc: Add support for ADI SC5XX-family processor SDHCI peripheralsNathan Barrett-Morrison
Co-developed-by: Greg Malysa <malysagreg@gmail.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com> Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
2025-03-12spi: Add support for ADI SC5XX-family processor SPI peripheralsNathan Barrett-Morrison
This adds support for the ADI-specific SPI driver present in the ADI SC5xx line of SoCs. This IP block is distinct from the QSPI/OSPI block that uses the Cadence driver. Both may be used at once with appropriate pin muxing configuration. Co-developed-by: Greg Malysa <malysagreg@gmail.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com> Co-developed-by: Angelo Dureghello <angelo.dureghello@timesys.com> Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Co-developed-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com> Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
2025-03-12remoteproc: Add in SHARC loading for ADI SC5XX-family processorsNathan Barrett-Morrison
This adds the ability to load ldr-formatted files to the SHARC coprocessors using the rproc interface. Only a minimal subset of rproc functionality is supported: loading and starting the remote core. Secure boot and signed ldr verification are not available at this time through the U-Boot interface. Co-developed-by: Greg Malysa <malysagreg@gmail.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com> Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Co-developed-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com> Signed-off-by: Piotr Wojtaszczyk <piotr.wojtaszczyk@timesys.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
2025-03-12dma: Add driver for ADI SC5xx-family SoC MDMA functionalityGreg Malysa
Add a rudimentary MDMA driver for the Analog Devices SC5xx SoCs, primarily intended for use with and tested against the QSPI/OSPI IP included in the SoC. Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com> Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
2025-03-12watchdog: Add support for ADI SC5XX-family watchdog peripheralNathan Barrett-Morrison
Co-developed-by: Greg Malysa <malysagreg@gmail.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com> Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Reviewed-by: Stefan Roese <sr@denx.de>
2025-03-12net: Add support for ADI SC5xx SoCs with DWC QoS ethernetGreg Malysa
The ADI SC598 includes a Designware QoS 5.20a IP block. This commit adds support for using the existing ethernet QoS driver with the SC598 SoC. Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com>
2025-03-12i2c: Add support for ADI SC5XX-family I2C peripheralNathan Barrett-Morrison
Co-developed-by: Greg Malysa <malysagreg@gmail.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com> Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Co-developed-by: Angelo Dureghello <angelo.dureghello@timesys.com> Signed-off-by: Angelo Dureghello <angelo.dureghello@timesys.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2025-03-12usb: musb-new: Add support for Analog Devices SC5xx SoCsNathan Barrett-Morrison
This adds support for the MUSB-based USB controller found in the Analog Devices SC57x and SC58x SoCs. Co-developed-by: Greg Malysa <malysagreg@gmail.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com> Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
2025-03-12gpio: Add support for ADI ADP5588 GPIO expander chipsNathan Barrett-Morrison
This adds support for the ADP588 GPIO expander from Analog Devices. It is accessed over I2C and provides up to 18 pins. It is largely a port of the Linux driver developed by Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
2025-03-12gpio: Add support for SC5XX-family processor GPIO driverGreg Malysa
This adds support for using the GPIO pins on the SC5XX family of SoCs from Analog Devices. Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com>
2025-03-12pinctrl: Add support for ADI SC5XX-family pinctrlGreg Malysa
This adds support for pin configuration on the Analog Devices SC5XX SoC family. This commit is largely a port of the Linux driver, which has not yet been submitted upstream. Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com> Co-developed-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Ian Roberts <ian.roberts@timesys.com> Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com> Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com> Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com> Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com> Signed-off-by: Greg Malysa <malysagreg@gmail.com>
2025-03-12Merge patch series "pci_auto: Downgrade prefetch if necessary"Tom Rini
This series from Patrick Rudolph <patrick.rudolph@9elements.com> fixes an issue with how we treat PCIe vs PCI in some cases and fixes the qemu-arm-sbsa reference platform support. Link: https://lore.kernel.org/r/20250226135647.194842-1-patrick.rudolph@9elements.com
2025-03-12pci_auto: Downgrade prefetch if necessaryPatrick Rudolph
Legacy PCI devices, like qemu's Bochs VGA device, are allowed to have prefetchable 32-bit BARs, while PCIe devices are not allowed to have 32-bit prefetchable BARs. Typically prefetchable BARs are 64-bit and typically the prefetch MMIO window is also 64-bit and placed above 4GiB, as it's the case on qemu sbsa-ref. Currently the U-Boot code assumes that prefetchable BARs are 64-bit BARs and always tries to assign them into the prefetch MMIO window. When a 32-bit BAR is marked as prefetch, but the prefetch area is not within the first 4GiB of the address space, then downgrade the BAR and place it in the non-prefetch MMIO window. For prefetch BARs there's no downside on being placed in non prefetch MMIO areas, besides the possible slower performance when a driver tries to map it Write-Combine. TEST: Fixes pci_auto on QEMU sbsa-ref fails to autoconfigure BAR0. Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2025-03-12serial: stm32: restrict _debug_uart_init() usagePatrice Chotard
Since commit 948da7773e34 ("arm: Add new config option ARCH_VERY_EARLY_INIT") debug_uart_init() is called respectively in crt0.S and crt0_64.S. That means that _debug_uart_init() is called for all STM32MP platforms even for those which doesn't support SPL_BUILD. So restrict _debug_uart_init() execution for platforms which can have SPL_BUILD enabled (STM32MP1 platform only). It's more needed to call debug_uart_init() in stm32mp1/cpu.c. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-03-12pwm: stm32: add driver to support pwm with timerCheick Traore
Add driver to support pwm on STM32MP1X SoCs. The PWM signal is generated using a multifuntion timer which provide a pwm feature. Clock rate and addresses are retrieved from the multifunction timer driver. Signed-off-by: Cheick Traore <cheick.traore@foss.st.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-03-12Merge branch 'staging' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-tegra into next
2025-03-12Merge branch 'graph' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-tegra into next
2025-03-11net: ravb: Fix RX frame size limitPaul Barker
The value written to the RFLR register includes the length of the CRC data at the end of each Ethernet frame. So we need to increase the value written to this register to ensure that we can receive full size frames. While we're here we can also copy the improved comment from the Linux kernel. Fixes: 8ae51b6f324e ("net: ravb: Add Renesas Ethernet RAVB driver") Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Fix comment Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-03-11net: ravb: Add dependency on CONFIG_BITBANGMIIPaul Barker
The Renesas RAVB driver always requires bitbang MDIO bus support. Fixes: 8ae51b6f324e ("net: ravb: Add Renesas Ethernet RAVB driver") Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-03-11clk: rzg2l: Ignore disable for core clocksPaul Barker
Following on from commit 9a699a0a0d62 ("clk: rzg2l: Ignore enable for core clocks"), we also need to ignore attempts to disable core clocks to avoid the need for conditionals around clk_disable_bulk() calls in drivers which support both RZ/G2L and other Renesas SoCs. Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-03-11net: miiphybb: Drop bb_miiphy_alloc()/bb_miiphy_free() and struct bb_miiphy_busMarek Vasut
These functions are no longer necessary, remove them. The struct bb_miiphy_bus is no longer necessary either, remove it as well. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11net: sh_eth: Switch back to mdio_alloc()Marek Vasut
Use mdio_alloc() again to allocate MDIO bus. This is possible because all the miiphybb parameters and ops passing is handled in at bb_miiphy_read()/bb_miiphy_write() level. This also fixes previously missed bb_miiphy_free() in .remove callback of this driver. which does not pose a problem anymore. Fixes: 08eefb5e792d ("net: sh_eth: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11net: ravb: Switch back to mdio_alloc()Marek Vasut
Use mdio_alloc() again to allocate MDIO bus. This is possible because all the miiphybb parameters and ops passing is handled in at bb_miiphy_read()/bb_miiphy_write() level. This also fixes previously missed bb_miiphy_free() in .remove callback of this driver. which does not pose a problem anymore. Fixes: 079eaca6e7b4 ("net: ravb: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11net: designware: Switch back to mdio_alloc()Marek Vasut
Use mdio_alloc() again to allocate MDIO bus. This is possible because all the miiphybb parameters and ops passing is handled in at bb_miiphy_read()/bb_miiphy_write() level. This also fixes previously missed bb_miiphy_free() in .remove callback of this driver. which does not pose a problem anymore. Fixes: cbb69c2fafcc ("net: designware: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11net: miiphybb: Drop priv from struct bb_miiphy_busMarek Vasut
Remove the priv member from struct bb_miiphy_bus and its assignment from drivers. This turns struct bb_miiphy_bus int struct mii_dev wrapper, to be cleaned up next. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11net: miiphybb: Pass struct mii_dev directly to bb_miiphy_read/write()Marek Vasut
Access to MDIO bus private data can be provided by both struct mii_dev .priv member and struct bb_miiphy_bus .priv member, use the former directly and remove .priv from the later. Drop unused bb_miiphy_getbus(). This removes any dependency on struct bb_miiphy_bus from the miiphybb code, except for helper functions which will be removed later. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11net: miiphybb: Pass struct bb_miiphy_bus_ops directly to bb_miiphy_read/write()Marek Vasut
The access to struct bb_miiphy_bus_ops via ops pointer in struct bb_miiphy_bus is not necessary with wrappers added in previous patch. Pass the ops pointer directly to both bb_miiphy_read() and bb_miiphy_write() functions. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11net: miiphybb: Wrap driver side bb_miiphy_read/write() accessorsMarek Vasut
Do not call bb_miiphy_read()/bb_miiphy_write() accessors directly in drivers, instead call them through wrapper functions. Those are meant to be used as function parameter adaptation layer between struct mii_dev callback function parameters and what the miiphybb does expect and will soon expect. This is a preparatory patch, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11net: miiphybb: Split off struct bb_miiphy_bus_opsMarek Vasut
Move miiphybb operations into separate struct bb_miiphy_bus_ops structure, add pointer to struct bb_miiphy_bus_ops into the base struct bb_miiphy_bus and access the ops through this pointer in miiphybb generic code. The variable reshuffling in miiphybb.c cannot be easily avoided. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11pinctrl: renesas: Drop special RZN1 entry from MakefileMarek Vasut
The RZN1 symbol name is CONFIG_RZN1, there is no CONFIG_ARCH_RZN1. Since RZN1 enables CONFIG_ARCH_RENESAS as well, remove the special RZN1 entry from Makefile, the RZN1 pinctrl driver will still be pulled in via CONFIG_ARCH_RENESAS. Fixes: e4aea57fa773 ("pinctrl: renesas: add R906G032 driver") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-10Merge tag 'v2025.04-rc4' into nextTom Rini
This uses Heinrich's merge of lib/efi_loader/efi_net.c which results in no changes.
2025-03-10usb: gadget: Remove the legacy usbtty driverTom Rini
The lone user of this driver has been removed for some time. Remove this driver as well. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Link: https://lore.kernel.org/r/20250227205101.4127604-2-trini@konsulko.com Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-03-10usb: gadget: Remove final remnants of CONFIG_USB_DEVICETom Rini
The lone user of the legacy USB device framework have been removed for some time. Remove the final parts of the code that were missed. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Link: https://lore.kernel.org/r/20250227205101.4127604-1-trini@konsulko.com Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-03-08video: bridge: add transparent LVDS de/encoder bridgeSvyatoslav Ryhel
Add a simple and transparent LVDS de/encoder driver with a powerdown gpio and a power supply. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2025-03-08video: bridge-uclass: add get_display_timing opsSvyatoslav Ryhel
Add get_display_timing ops for internal bridges linked to panels that do not support EDID (MIPI-DSI panels for example) or have EDID not routed. Tested-by: Dang Huynh <danct12@riseup.net> (PineTab 2) Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2025-03-08core: ofnode: add of_graph parsing helpersSvyatoslav Ryhel
Add a mostly complete list of ofnode analogs of of_graph parsing helpers. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-03-05Merge tag 'xilinx-for-v2025.04-rc4' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze AMD/Xilinx changes for v2025.04-rc4 Zynq: - Guard code around SPL_FS_LOAD_PAYLOAD_NAME Versal*: - Remove tftp block size 4096 Versal: - Use clocks per DT binding - Store driver data in data section Versal Gen 2: - Fix major/minor version decoding
2025-03-04led: Fix next Coverity scan errorHeiko Schocher
The following was reported by Coverity scan: *** CID 542488: Control flow issues (NO_EFFECT) /drivers/led/led-uclass.c: 277 in led_get_function_name() 271 return uc_plat->label; 272 273 /* Now try to detect function label name */ 274 func = dev_read_string(dev, "function"); 275 cp = dev_read_u32(dev, "color", &color); 276 // prevent coverity scan error CID 541279: (TAINTED_SCALAR) >>> CID 542488: Control flow issues (NO_EFFECT) >>> This less-than-zero comparison of an unsigned value is never true. "color < 0U". 277 if (color < LED_COLOR_ID_WHITE || color >= LED_COLOR_ID_MAX) 278 cp = -EINVAL; 279 Fix it. Addresses-Coverity-ID: 542488 Link: https://lists.denx.de/pipermail/u-boot/2025-February/581567.html Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-03-04gpio: 74x146: depend on DM_SPIJ. Neuschäfer
Currently, Kconfig allows building CONFIG_DM_74X164 without CONFIG_DM_SPI, which results in linker errors because this driver actually uses dm_spi_* functions: drivers/gpio/74x164_gpio.o: in function `gen_74x164_write_conf': undefined reference to `dm_spi_claim_bus' undefined reference to `dm_spi_xfer' undefined reference to `dm_spi_release_bus' Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
2025-03-04Revert "dm: core: Simplify dm_probe_devices()"Simon Glass
Unfortunately this change was not safe as some devices are bound before relocation, but we don't want to probe them. It causes 'raise: Signal # 8 caught' on jerry. Move the bootstage timer to after autoprobe in initf_dm() since the trace test does not tolerate any variance. This reverts commit 21dd873572a01d74bfdfceb7a30b056f8ccba187. Signed-off-by: Simon Glass <sjg@chromium.org>
2025-03-03arm64: versal2: Show major and minor silicon versionMichal Simek
ES1 silicon is 0x10 (16) and production is 0x20 (32) but correct number to see are v1.0 or v2.0 instead of v16 or v32. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20095339334fe07f373ffae3bdbfec51f5a00dc7.1739882585.git.michal.simek@amd.com
2025-03-03clk: versal: Store driver data in data sectionPadmarao Begari
Line 171 in README is describing that before relocation no code should use global variable because global variables are placed to BSS section which is initialized to 0 after relocation. On Versal platforms clock driver is initialized before relocation (via using dm,bootph-all flag in DT) and global variables are initialized which works if this is used only before relocation. But the variables are used after relocation too but values are zeroed which is ending up incorrect behavior. That's why place variables to data section to ensure that values are not cleared which is for now the quickest temporary solution. The correct way to do it is to move all global variables to private data to avoid it. Signed-off-by: Padmarao Begari <padmarao.begari@amd.com> Link: https://lore.kernel.org/r/20250218052419.1141139-1-padmarao.begari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-03-03clk: versal: Update the reference clocks as per bindingsVenkatesh Yadav Abbarapu
As per the bindings the reference clocks naming has changed from "pl_alt_ref_clk" to "pl_alt_ref" and "ref_clk" to "ref". Update the same in the clock driver. Also add the fallback option for older DT bindings. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20250206091533.1447234-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-03-03crypto: fsl_hash: fix flush dcache alignment in caam_hash()Benjamin Lemouzy
Loading a FIT kernel image with hash hardware acceleration enabled (CONFIG_SHA_HW_ACCEL=y) displays the following CACHE warning: [...] Trying 'kernel-1' kernel subimage [...] Verifying Hash Integrity ... sha256CACHE: Misaligned operation at range [16000128, 1673fae8] [...] Trying 'ramdisk-1' ramdisk subimage [...] Verifying Hash Integrity ... sha256CACHE: Misaligned operation at range [1676d6d4, 1737a5d4] [...] Trying 'fdt-imx6q-xxx.dtb' fdt subimage [...] Verifying Hash Integrity ... sha256CACHE: Misaligned operation at range [1673fbdc, 1674b0dc] [...] This patch fixes it. Tested on: - i.MX 6 custom board - LS1021A custom board Signed-off-by: Benjamin Lemouzy <blemouzy@centralp.fr> Signed-off-by: Peng Fan <peng.fan@nxp.com>
generated by cgit v1.2.3 (git 2.0.4) at 2025-08-07 09:30:34 +0000