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2024-10-14Merge tag 'u-boot-ufs-next-20241014' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-ufs - Set of fixes/updated on UFS core - Fix dcache/flush - Update & Sync Quirks - Backport fixes from Linux - Add missing memory barriers - Remove link_startup_again logic - Add Neil to UFS maintainers - Add UFS DesignWare Controller for AMD vers2 platforms - Add UFS Qualcomm controller driver
2024-10-14Merge tag 'u-boot-amlogic-next-20241014' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-amlogic - Add Libre Computer boards into proper libre-computer board directory - Add new Boards: - Libre Computer aml-s905d3-cc - Libre Computer aml-a311d-cc - Add capsule update to libretech-ac and the new boards since they have an onboard SPI nor flash - Fix HDMI support after sync to v6.11 and regulator enable from Marek - Fix khadas-vim3 android config for android-mainline kernel - Disable meson64 boot targets when configs are not eavailable
2024-10-14Merge branch 'u-boot-nand-20241012' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-nand-flash This merge request add support for BCMBCA raw nand driver for bcm96846 board that switch using OF_UPSTREAM and allow use onfi ecc params when they are available in the atmel nand controller The patches pass the pipeline CI: https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/22638
2024-10-14power/domain: meson-ee-pwrc: make sure to not enable a domain twiceNeil Armstrong
The upstream Device Tree for GXBB/GXL/G12A was updated with VPU domain shared between the VPU and HDMI node, causing a double enable. Simply store the enable state and avoid enabling twice, fixing HDMI output on all platforms. Link: https://lore.kernel.org/r/20241009-u-boot-topic-fix-hdmi-v1-2-2479cd90c4ea@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14clk: meson: gxbb: add HDMI clocksNeil Armstrong
Align with g12a driver to handle the CLKID_HDMI, CLKID_HDMI_SEL and CLKID_HDMI_DIV clocks since they were added to the upstream GXBB/GXL Devicetree on v6.11 with [1] [1] https://lore.kernel.org/all/20240626152733.1350376-1-jbrunet@baylibre.com/ Link: https://lore.kernel.org/r/20241009-u-boot-topic-fix-hdmi-v1-1-2479cd90c4ea@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14video: meson: dw-hdmi: do not fail probe if HDMI regulator is already enabledNeil Armstrong
If the regulator is already enabled, this happens if the regulator is set in regulator-always-on, regulator_set_enable() return -EALREADY. Ignore the -EALREADY return since it's not an error. Suggested-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20241009-u-boot-video-fix-hdmi-supply-already-on-v2-1-4478a28d1f49@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: Add Support for Qualcomm UFS HC driverBhupesh Sharma
Add Support for the Host Controller driver for UFS HC present on Qualcomm Snapdragon SoCs. It has been successfully tested on SDM845, SM8250, SM8550 ant SM8650 SoCs. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Tested-by: Julius Lehmann <lehmanju@devpi.de> Tested-by: Caleb Connolly <caleb.connolly@linaro.org> #rb3gen2 Link: https://lore.kernel.org/r/20240910-topic-ufs-qcom-controller-v1-4-54c0d2231b10@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: allow UFSHCI version 4.0Neil Armstrong
Add UFSHCI version 4.0 found on the recent Qualcomm UFS Controllers. Tested-by: Julius Lehmann <lehmanju@devpi.de> Tested-by: Caleb Connolly <caleb.connolly@linaro.org> #rb3gen2 Link: https://lore.kernel.org/r/20240910-topic-ufs-qcom-controller-v1-3-54c0d2231b10@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: add get_max_pwr_mode callbackNeil Armstrong
Add a new get_max_pwr_mode callback to permit the UFS controller driver manipulate the max_pwr_mode struct right before setting the new pwr_mode to the UFS device. It can be used to limit the HS Gear with errata and hardware limitations on some UFS controllers. Tested-by: Julius Lehmann <lehmanju@devpi.de> Tested-by: Caleb Connolly <caleb.connolly@linaro.org> #rb3gen2 Link: https://lore.kernel.org/r/20240910-topic-ufs-qcom-controller-v1-2-54c0d2231b10@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: add device_reset callbackNeil Armstrong
Add device_reset op to permit resetting the UFS device if the UFS controller drivers supports the operation. Tested-by: Julius Lehmann <lehmanju@devpi.de> Tested-by: Caleb Connolly <caleb.connolly@linaro.org> #rb3gen2 Link: https://lore.kernel.org/r/20240910-topic-ufs-qcom-controller-v1-1-54c0d2231b10@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: ufs-amd-versal2: Add support for AMD UFS controllerVenkatesh Yadav Abbarapu
Add UFS AMD platform support on top of the UFS DWC and UFS platform driver. UFS AMD platform requires some platform specific configurations like M-PHY/RMMI/UniPro and vendor specific registers programming before doing the LINKSTARTUP. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240920041651.18173-3-venkatesh.abbarapu@amd.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: add support for DesignWare ControllerVenkatesh Yadav Abbarapu
This patch has the goal to add support for DesignWare UFS Controller specific operations. This is based on linux kernel commit: "drivers/scsi/ufs/ufshcd-dwc.c: ufs: add support for DesignWare Controller" (sha1: 4b9ffb5a353bdee49f1f477ffe2b95ab3f9cbc0c) It is ported from linux kernel 6.11-rc1. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240920041651.18173-2-venkatesh.abbarapu@amd.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: core: remove link_startup_again logicNeil Armstrong
The link_startup_again logic was added in Linux to handle device that were set in LinkDown state, which should not be the case since U-boot doesn't set LinkDown state are init, and Linux sets the device active in ufshcd_init() for the first link startup. ufshcd_set_ufs_dev_active(hba) is called at ufshcd_init() right before scheduling an ufshcd_async_scan that will call ufshcd_device_init() then ufshcd_link_startup(). The comment in probe says: /* * We are assuming that device wasn't put in sleep/power-down * state exclusively during the boot stage before kernel. * This assumption helps avoid doing link startup twice during * ufshcd_probe_hba(). */ we can assume the same from U-Boot. While it worked to far, it breaks link startup for Qualcomm Controllers v5, let's just remove the logic. Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-12-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: Fix debug message in 'ufs_start'Bhupesh Sharma
Minor typo fix and rewording of printf message inside 'ufs_start' which announces the availability of the UFS device. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-11-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: Add missing memory barriersBhupesh Sharma
Add missing wmb() and mb() barriers in the u-boot UFS core framework driver to allow registers updates to happen before follow-up read operations. This makes the barrier placement similar to the Linux UFS driver, synced from the Linux v6.9 release. Starting from the v6.10 release, the barriers were replaced with a register read-back in [1], this will ported to u-boot in a second time. [1] https://lore.kernel.org/all/20240329-ufs-reset-ensure-effect-before-delay-v5-0-181252004586@redhat.com/ Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-10-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: Sync possible UFS Quirks with Linux UFS driverBhupesh Sharma
Sync u-boot UFS driver to add all possible UFS Quirks as supported by Linux UFS driver as well. Synced with include/ufs/ufshcd.h from Linux v6.11 release Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-9-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: Clear UECPA once due to LINERESET has happened during LINK_STARTUPBhupesh Sharma
Clear UECPA once in u-boot UFS driver due to LINERESET has happened during LINK_STARTUP. This makes the u-boot ufs driver behavior related to UECPA similar to Linux UFS driver. Ported from Linux kernel commit: 2355b66ed20c ("scsi: ufs: Handle LINERESET indication in err handler") Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-8-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs/ufs.h: Add definition of 'ufshcd_rmwl()'Bhupesh Sharma
Add definition of 'ufshcd_rmwl()' helper function which would be later used by Qualcomm UFS driver to read-modify-write registers. Ported from Linux kernel commits: e785060ea3a1 ("ufs: definitions for phy interface") cff91daf52d3 ("scsi: ufs: Fix kernel-doc syntax in ufshcd.h") Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-7-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: Add UFSHCD_QUIRK_HIBERN_FASTAUTOMarek Vasut
Add UFSHCD_QUIRK_HIBERN_FASTAUTO quirk for host controllers which supports auto-hibernate the capability but only FASTAUTO mode. Ported from Linux kernel commit 2f11bbc2c7f3 ("scsi: ufs: core: Add UFSHCD_QUIRK_HIBERN_FASTAUTO") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-6-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESSMarek Vasut
Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS for host controllers which do not support 64-bit addressing. Ported from Linux kernel commit 6554400d6f66 ("scsi: ufs: core: Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS") with ufs_scsi_buffer_aligned() based on U-Boot generic bounce buffer. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-5-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: use dcache helpers for scsi_cmd data and only invalidate if necessaryNeil Armstrong
Now we have proper flush and invalidate helpers, we can use them directly to operate on the scsi_cmd data. Likewise, we do not need to flush then invalidate, just flush _or_ invalidate depending on the data direction. Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-4-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: split flush and invalidate to only invalidate when requiredNeil Armstrong
There is no need to flush and invalidate all data updated by the driver, mainly because on ARM platforms flush also invalidates the cachelines. Split the function in two and add the appropriate cacheline invalidates after the UFS DMA operation finishes to make sure we read from memory. Flushing then invalidating cacheline unaligned data causes data corruption issues on Qualcomm platforms, and is largely unnecessary anyway, so let's cleanup the cache operations. Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-3-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: fix dcache flush and invalidate range calculationNeil Armstrong
The current calculation will omit doing a flush/invalidate on the last cacheline if the base address is not aligned with DMA_MINALIGN. This causes commands failures and write corruptions on Qualcomm platforms. Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-2-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-14ufs: allocate descriptors with size aligned with DMA_MINALIGNNeil Armstrong
Align the allocation size with DMA_MINALIGN to make sure we do not flush/invalidate data from following allocations. Reviewed-by: Neha Malcom Francis <n-francis@ti.com> Tested-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Tested-by: Julius Lehmann <lehmanju@devpi.de> Link: https://lore.kernel.org/r/20240930-topic-ufs-enhancements-v3-1-58234f84ab89@linaro.org Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2024-10-13Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
This switches all boards with the Allwinner H616/H618/H313/H700 SoCs over to use OF_UPSTREAM. We are doing it for this SoC family only since the DTs between the U-Boot and the kernel repo are exactly identical, whereas other families have one compatibility fix in U-Boot to allow booting older kernels. Other will follow if this plays out well. The biggest chunk otherwise is adding support for an Anbernic game console, using the H700 SoC. For that we need to enhance the DRAM support code, and pick two DT commits from the mainline kernel/DT rebasing repo, followed by the defconfig patch. On top of that two small fixes for the old Allwinner A80. Gitlab CI passed, and I booted that briefly on some boards, including an H616 and an H618 one (with LPDDR4).
2024-10-13Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-shTom Rini
2024-10-13Merge tag 'u-boot-imx-master-20241013' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/22644 - Add fast authentication method for i.MX8M signing. - Migrate imx8mp-debix-model-a to OF_UPSTREAM. - Update MAINTAINERS file globs for i.MX6/i.MX8MP DHSOM. - Improve ELE driver. - Add i.MX8MP Dummy clk to fix regression.
2024-10-13clk: renesas: Synchronize R-Car R8A779H0 V4M clock tables with Linux 6.10.9Marek Vasut
Synchronize R-Car R8A779H0 V4M clock tables with Linux 6.10.9, commit 1611860f184a2c9e74ed593948d43657734a7098 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-10-13clk: renesas: Synchronize R-Car R8A779G0 V4H clock tables with Linux 6.10.9Marek Vasut
Synchronize R-Car R8A779G0 V4H clock tables with Linux 6.10.9, commit 1611860f184a2c9e74ed593948d43657734a7098 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-10-13clk: renesas: Synchronize R-Car R8A779F0 S4 clock tables with Linux 6.10.9Marek Vasut
Synchronize R-Car R8A779F0 S4 clock tables with Linux 6.10.9, commit 1611860f184a2c9e74ed593948d43657734a7098 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-10-13clk: renesas: Synchronize R-Car R8A779A0 V3U clock tables with Linux 6.10.9Marek Vasut
Synchronize R-Car R8A779A0 V3U clock tables with Linux 6.10.9, commit 1611860f184a2c9e74ed593948d43657734a7098 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-10-13pinctrl: renesas: Synchronize R-Car R8A779H0 V4M PFC tables with Linux 6.10.9Marek Vasut
Synchronize R-Car R8A779H0 V4M PFC tables with Linux 6.10.9, commit 1611860f184a2c9e74ed593948d43657734a7098 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-10-13pinctrl: renesas: Synchronize R-Car R8A779G0 V4H PFC tables with Linux 6.10.9Marek Vasut
Synchronize R-Car R8A779G0 V4H PFC tables with Linux 6.10.9, commit 1611860f184a2c9e74ed593948d43657734a7098 . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2024-10-13Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegraTom Rini
Assorted Tegra enhancements. Merged with the recent XPL_BUILD changes, resolve some whitespace issues and fix the name of the new apalis-tk1 env file by Tom. Signed-off-by: Tom Rini <trini@konsulko.com>
2024-10-13video: panel: add Sharp LQ101R1SX01 MIPI DSI panel driverSvyatoslav Ryhel
This module is a color active matrix LCD module incorporating Oxide TFT (Thin Film Transistor). It is composed of a color TFT-LCD panel, driver ICs, a control circuit and power supply circuit, and a backlight unit. Graphics and texts can be displayed on a 2560×1600 dots panel with (16,777,216) colors by using MIPI DUAL DSI interface, supplying +3.3V DC supply voltage for TFT-LCD panel driving and supplying DC supply voltage for LED Backlight. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13video: tegra20: dsi: add ganged mode supportSvyatoslav Ryhel
Implement ganged mode support for the Tegra DSI driver. The DSI host controller to gang up with is specified via a phandle in the device tree and the resolved DSI host controller used for the programming of the ganged-mode registers. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13video: tegra20: dc: remove DECLARE_GLOBAL_DATA_PTR useSvyatoslav Ryhel
It seems that DECLARE_GLOBAL_DATA_PTR use is not needed and video system works perfectly fine without it. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13usb: host: tegra: get usb phy configuration from phy nodeSvyatoslav Ryhel
Obtain USB phy configuration from phy node if such exists and is enabled. If no, set default values. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13drivers: tegra_gpio: add early SPL functionsSvyatoslav Ryhel
In some cases access to GPIOs is needed so early that DM is not ready even nearly. These functions are exactly for this case. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13Tegra30: Add funcmux for UART over SD slotJonas Schwöbel
Tegra 3 has UART-E exposable via SD card slot which may be handy for debugging. This change only adds funcmux part, to use UART-E on the device you additionally would need: - set stdout-path to serial@70006400 (uarte) - configure sdmmc1_dat3_py4 and sdmmc1_dat2_py5 pinmux for uarte - disable or remove sdhci@7800000 node - enable CONFIG_TEGRA_ENABLE_UARTE in defconfig - set CFG_SYS_NS16550_COM to NV_PA_APB_UARTE_BASE in device header Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13clk: imx8mp: Add i.MX8MP Dummy clkPeng Fan
i.MX8MP SDHC use CLK_IMX8MP_DUMMY clk entry. Without the clk, the bulk api will return failure. The correct entry should be replaced with IMX8MP_IPG_ROOT clk in device tree. This will be done in Kernel device tree and sync to U-Boot in future: https://lore.kernel.org/all/20241012025221.1728438-1-peng.fan@oss.nxp.com/ Fixes: 76332fae769 ("mmc: fsl_esdhc_imx: Enable AHB/IPG clk with clk bulk API") Reported-by: Gilles Talis <gilles.talis@nxp.com> Tested-by: Gilles TALIS <gilles.talis@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13misc: fuse: Update fuse driverYe Li
When OSCCA is enabled, FSB fuse shadow (offset 0x8000) access is disabled for SOC. So update the driver to read fuse from ELE API. The ELE has supported to read all shadow fuses like FSB, reuse the table of FSB for the word index used by ELE API. Add ELE shadow fuse read and write to current ELE fuse driver. But when LC is OEM closed, the ELE read/write shadow fuse APIs are forbidden. Reading from any fuse will return error. This causes problem to u-boot which must read out some fuse no matter whatever LC. So we have to change back to read from FSB and ELE common fuse read API. For using ELE shadow read API for development purpose like checking the ELE shadow fuse write result, user can set env variable "enable_ele_shd" to y to switch it. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13misc: fuse: Fix FSB redundancy fuse word check and clear resYe Li
There is a bug when checking fuse word with redundancy fuse in FSB table. The redundancy fuses are combined into 4 words, so we can't directly use word index to do the check, otherwise the high 4 words will fail to match. And When calling ELE API, res parameter will pass to ELE API to get ELE response value for failure. So most of usage does not initialize this variable and print it after calling ELE API. However, when ELE API returns failure, we can't ensure this res is always set because there may be other failure like MU failure. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13misc: ele_api: Add read/write shadow fuse APIsYe Li
Add ELE APIs to support read and write shadow fuses Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13misc: ele_api: Update ELE read common fuse APIPeng Fan
On iMX8ULP, the word index 1 is used to read OTP_UNIQ_ID with 4 words data responsed. However this special index does not apply others. So restrict the check to i.MX8ULP to avoid problem when reading from fuse word 1 for others, such as i.MX93. Also update header order Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13misc: ele_mu: Clear RR when initialize MUPeng Fan
When OS is doing ELE API call, before OS get the response, OS is force reseted, then it is possible that MU RR has data during initialization in SPL stage. So clear the RR registers, otherwise SPL ELE API call will work abnormal. Cc: Alice Guo <alice.guo@nxp.com> Cc: Marek Vasut <marex@denx.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-10-13misc: ele_mu: Update ELE MU to get TR/RR number from HWYe Li
The MU parameter register can provide the TR and RR number. For i.MX95 which has 8 RR is different with i.MX93 and i.MX8ULP, so update the driver to read the PAR for exact TR and RR number. Also update compatible string for i.MX95 ELE MU. Cc: Alice Guo <alice.guo@nxp.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
2024-10-12mtd: rawnand: brcmnand: Add BCMBCA RAW NAND driverLinus Walleij
The Broadcom BCA platforms are broadband access SoCs. This is a port of the upstream Linux driver to U-Boot. It was based on drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c from Linux v6.11. Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-10-12mtd: nand: raw: atmel: Use ONFI ECC params if availableZixun LI
When ECC parameters are not specified in DT, first try ONFI ECC parameters before fallback to maximum strength. It's the Linux driver behavior since the driver rewriting in f88fc12. From then 2 nand system refactors have been done in 6a1b66d6 and 53576c7b, chip->ecc_strength_ds and chip->ecc_step_ds became nanddev_get_ecc_requirements(). U-Boot didn't follow the refactor and always use these 2 fields. v2: Fix formatting, add upstream commit hash. Signed-off-by: Zixun LI <zli@ogga.fr> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: Balamanikandan Gunasundar
2024-10-11Merge patch series "Tidy up use of 'SPL' and CONFIG_SPL_BUILD"Tom Rini
Simon Glass <sjg@chromium.org> says: When the SPL build-phase was first created it was designed to solve a particular problem (the need to init SDRAM so that U-Boot proper could be loaded). It has since expanded to become an important part of U-Boot, with three phases now present: TPL, VPL and SPL Due to this history, the term 'SPL' is used to mean both a particular phase (the one before U-Boot proper) and all the non-proper phases. This has become confusing. For a similar reason CONFIG_SPL_BUILD is set to 'y' for all 'SPL' phases, not just SPL. So code which can only be compiled for actual SPL, for example, must use something like this: #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) In Makefiles we have similar issues. SPL_ has been used as a variable which expands to either SPL_ or nothing, to chose between options like CONFIG_BLK and CONFIG_SPL_BLK. When TPL appeared, a new SPL_TPL variable was created which expanded to 'SPL_', 'TPL_' or nothing. Later it was updated to support 'VPL_' as well. This series starts a change in terminology and usage to resolve the above issues: - The word 'xPL' is used instead of 'SPL' to mean a non-proper build - A new CONFIG_XPL_BUILD define indicates that the current build is an 'xPL' build - The existing CONFIG_SPL_BUILD is changed to mean SPL; it is not now defined for TPL and VPL phases - The existing SPL_ Makefile variable is renamed to SPL_ - The existing SPL_TPL Makefile variable is renamed to PHASE_ It should be noted that xpl_phase() can generally be used instead of the above CONFIGs without a code-space or run-time penalty. This series does not attempt to convert all of U-Boot to use this new terminology but it makes a start. In particular, renaming spl.h and common/spl seems like a bridge too far at this point. The series is fully bisectable. It has also been checked to ensure there are no code-size changes on any commit.
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