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2023-01-27usb: xhci: Fix root hub descriptorMark Kettenis
When a system has multiple XHCI controllers, some of the properties described in the descriptor of the root hub (such as the number of ports) might differ between controllers. Fix this by switching from a single global hub descriptor to a hub descriptor per controller. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Marek Vasut <marex@denx.de>
2023-01-27pci: Add Apple PCIe controller driverMark Kettenis
This driver supports the PCIe controller on the Apple M1 and M2 SoCs. The code is adapted from the Linux driver. Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-01-27iommu: Implement mapping IOMMUs for PCI devicesMark Kettenis
Systems such as Apple's M1 and M2 SoCs may have separate IOMMUs for each PCIe root port. In this case the right IOMMU for a PCI device behind a particular root port is described by an "iommu-map" property in the device tree. Parse this property and use it to find the right IOMMU device for PCI devices. Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-01-27usb: xhci: Implement DMA mappingMark Kettenis
An XHCI controller that sits behind an IOMMU needs to map and unmap its memory buffers to do DMA. Implement this by inroducing new xhci_dma_map() and xhci_dma_unmap() helper functions. The xhci_dma_map() function replaces the existing xhci_virt_to_bus() function in the sense that it returns the bus address in the case of simple address translation in the absence of an IOMMU. The xhci_bus_to_virt() function is eliminated by storing the CPU address of the allocated scratchpad memory in struct xhci_ctrl. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Marek Vasut <marex@denx.de>
2023-01-27iommu: apple: Implement DMA mapping operations for Apple DARTMark Kettenis
Implement translation table support for all the variations of Apple's DART IOMMU that can be found on Apple's M1 and M2 SoCs. Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-01-27test: Add test for IOMMU uclass map/unmap opsMark Kettenis
Test that the map and unmap operations work for devices that have DMA translated by an IOMMU and devices that don't have DMA translated by an IOMMU. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-27iommu: Add DMA mapping operationsMark Kettenis
In order to support IOMMUs in non-bypass mode we need device ops to map and unmap DMA memory. The map operation enters a mapping for a region specified by CPU address and size into the translation table of the IOMMU and returns a DMA address suitable for programming the device to do DMA. The unmap operation removes this mapping from the translation table of the IOMMU. Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
2023-01-27serial: s5p: Use IS_ENABLED where appropriateMark Kettenis
There are no SPL/TPL variants of CONFIG_CLK_EXYNOS and CONFIG_ARCH_APPLE, so switch from CONFIG_IS_ENABLED to IS_ENABLED. Signed-off-by: Mark Kettenis <kettenis@openbsd.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-27pinctrl: fix docstringMichael Walle
Fix the copy and paste error. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-27pinctrl: get rid of some ifdefferyMichael Walle
Don't define an empty version for pinconfig_post_bind(). Just guard the call and let the linker garbage collection do the rest. This way, we also don't have to do any guesswork. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Marek Vasut <marex@denx.de>
2023-01-27pinctrl: don't fall back to pinctrl_select_state_simple()Michael Walle
If CONFIG_PINCTRL_FULL is enabled, never fall back to the simple implementation. pinctrl_select_state() is called for each device and it is expected to fail. A fallback to the simple imeplementation doesn't make much sense. To keep the return code consistent, we need to change the -EINVAL (which was ignored before) to -ENOSYS. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-27Merge tag 'xilinx-for-v2023.04-rc1' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx chnages for v2023.04-rc1 makefile: - Add multi_dtb_fit dependency clk: - Handle error cases microblaze: - Disable falcon mode and cleanup code around xilinx: - Enable regular expression matching in board_fit_config_name_match() - Fix FRU handling for 0xC1 format - Fix Xilinx legacy format eeprom parsing zynqmp: - Some DT updates/cleanups - Fix IDcode for xck24 - Remove empty mini config files - Add support for k24 versal: - Remove empty mini config files versal_net: - Setup timer when runs in EL3 - Build u-boot.elf for mini configurations zynq-gem: - Add support for new compatible strings - Remove support for Avnet Ultrazedev SOM - Handle SGMII with PCS phy spi: - Add support for gigadevice parts misc: - Remove CONFIG_TARGET_VENUS ifdef - Add missing headers to remove sparse warnings
2023-01-27net: zynq_gem: Wait for SGMII PCS link in zynq_gem_init()Stefan Roese
In our system using ZynqMP with an external SGMII PHY it's necessary to wait for the PCS link and auto negotiation to finish before the xfer starts. Otherwise the first packet(s) might get dropped, resulting in a delay at the start of the ethernet transfers. This is only done when the PHY link is already up, which is done in phy_startup(). As waiting for the PHY link bits via pcsstatus does not make much sense, when the link is not available in general (e.g. no cable connected). This patch adds the necessary code including a minimal delay of 1 ms which fixes problems of dropped first packages. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Michal Simek <michal.simek@amd.com> Cc: Katakam Harini <harini.katakam@amd.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Sean Anderson <sean.anderson@seco.com> Link: https://lore.kernel.org/r/20230125070908.1343256-1-sr@denx.de Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-27drivers: mmc: Change datatype of tuning_loop_counter to intAlgapally Santosh Sagar
tuning_loop_counter is of char type, which is not capable of handling the entire data range of this variable. This is pointed by below sparse warning. Change datatype to int to fix this. warning: comparison is always false due to limited range of data type. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230120053617.32463-5-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-27gpio: zynqmp: Handle error from get_gpio_modepinAlgapally Santosh Sagar
There is a unused variable ret, due to which we are getting sparse warning as below. warning: variable 'ret' set but not used [-Wunused-but-set-variable]. Return ret incase of error. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230120053617.32463-3-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-26Merge tag 'dm-pull-26jan23' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-dm FIT improvements with split-elf, especially for Rockchip Binman positioning by ELF symbol
2023-01-26Merge https://source.denx.de/u-boot/custodians/u-boot-spiTom Rini
- fix return code of sf command (Heinrich) - fix register reads in STIG Mode (Dhruva) - Infineon s25fs256t support (Takahiro)
2023-01-26dm: core: Use full printf() format when possibleSamuel Holland
Use a more accurate check for determining if the full format string will be handled correctly, since SPL_USE_TINY_PRINTF can be disabled. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-26mtd: spi-nor: Add support for Infineon s25fs256tTakahiro Kuwano
Infineon S25FS256T is 256Mbit Quad SPI NOR flash. The key features and differences comparing to other Spansion/Cypress flash familes are: - 4-byte address mode by factory default - Quad mode is enabled by factory default - Supports mixture of 128KB and 64KB sectors by OTP configuration (this patch supports uniform 128KB only) Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26mtd: spi-nor: Rename s25hx_t prefixTakahiro Kuwano
Rename s25hx_t prefix to s25 so that the single set of fixup hooks can support all other S25 families. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Acked-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26spi: cadence_qspi: use STIG mode for small readsDhruva Gole
Fix the issue where some flash chips like cypress S25HS256T return the value of the same register over and over in DAC mode. For example in the TI K3-AM62x Processors refer [0] Technical Reference Manual there is a layer of digital logic in front of the QSPI/OSPI Drive when used in DAC mode. This is part of the Flash Subsystem (FSS) which provides access to external Flash devices. The FSS0_0_SYSCONFIG Register (Offset = 4h) has a BIT Field for OSPI_32B_DISABLE_MODE which has a Reset value = 0. This means, OSPI 32bit mode enabled by default. Thus, by default controller operates in 32 bit mode causing it to always align all data to 4 bytes from a 4byte aligned address. In some flash chips like cypress for example if we try to read some regs in DAC mode then it keeps sending the value of the first register that was requested and inorder to read the next reg, we have to stop and re-initiate a new transaction. This causes wrong register values to be read than what is desired when registers are read in DAC mode. Hence if the data.nbytes is very less then prefer STIG mode for such small reads. [0] https://www.ti.com/lit/ug/spruiv7a/spruiv7a.pdf Tested-by: Vaishnav Achath <vaishnav.a@ti.com> Signed-off-by: Dhruva Gole <d-gole@ti.com> [jagan: add tab space for comments] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26spi: cadence_qspi: setup ADDR Bits in cmd readsDhruva Gole
Setup the Addr bit field while issuing register reads in STIG mode. This is needed for example flashes like cypress define in their transaction table that to read any register there is 1 cmd byte and a few more address bytes trailing the cmd byte. Absence of addr bytes will obviously fail to read correct data from flash register that maybe requested by flash driver because the controller doesn't even specify which address of the flash register the read is being requested from. Signed-off-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Pratyush Yadav <pratyush@kernel.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26mtd: spi-nor-core: Make CFRx reg fields genericTakahiro Kuwano
Cypress defines two flavors of configuration registers, volatile and non volatile, and both use the same bit fields. Rename the bitfields in the configuration registers so that they can be used for both flavors. Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26spi: Add Socionext F_OSPI SPI flash controller driverKunihiko Hayashi
Introduce Socionext F_OSPI controller driver. This controller is used to communicate with slave devices such as SPI flash memories. It supports 4 slave devices and up to 8-bit wide bus, but supports master mode only. This driver uses spi-mem framework for SPI flash memory access, and can only operate indirect access mode and single data rate mode. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26drivers: spi: sh_qspi.c: Use log_warning() instead of printf()Pengfei Fan
Use log_warning() instead of printf() to print out driver information Signed-off-by: Pengfei Fan <fanpengfei1@eswincomputing.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26drivers: spi: fix some typosPengfei Fan
Fix some typos in spi drivers Signed-off-by: Pengfei Fan <fanpengfei1@eswincomputing.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-01-26ddr: marvell: a38x: Add support for DDR4 from Marvell mv-ddr-marvell repositoryTony Dinh
This syncs drivers/ddr/marvell/a38x/ with the master branch of repository https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git up to the commit "mv_ddr: a3700: Use the right size for memset to not overflow" d5acc10c287e40cc2feeb28710b92e45c93c702c This patch was created by following steps: 1. Replace all a38x files in U-Boot tree by files from upstream github Marvell mv-ddr-marvell repository. 2. Run following command to omit portions not relevant for a38x, ddr3, and ddr4: files=drivers/ddr/marvell/a38x/* unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_APN806 \ -UCONFIG_MC_STATIC -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \ -UCONFIG_PHY_STATIC_PRINT -UCONFIG_CUSTOMER_BOARD_SUPPORT \ -UCONFIG_A3700 -UA3900 -UA80X0 -UA70X0 -DCONFIG_ARMADA_38X -UCONFIG_ARMADA_39X \ -UCONFIG_64BIT $files 3. Manually change license to SPDX-License-Identifier (upstream license in upstream github repository contains long license texts and U-Boot is using just SPDX-License-Identifier. After applying this patch, a38x, ddr3, and ddr4 code in upstream Marvell github repository and in U-Boot would be fully identical. So in future applying above steps could be used to sync code again. The only change in this patch are: 1. Some fixes with include files. 2. Some function return and basic type defines changes in mv_ddr_plat.c (to correct Marvell bug). 3. Remove of dead code in newly copied files (as a result of the filter script stripping out everything other than a38x, dd3, and ddr4). Reference: "ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository" https://source.denx.de/u-boot/u-boot/-/commit/107c3391b95bcc2ba09a876da4fa0c31b6c1e460 Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2023-01-24Merge https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
This contains some fixes, and the first bunch of some clean up patches to get rid of legacy GPIO and PMIC code. Highlight is the DM AXP PMIC driver, which is required to convert some drivers over to use DM regulators, and also is required to get rid of some less optimal PMIC setup code in Trusted Firmware. This isn't enabled by any defconfig yet, but can be enabled manually and works. For the full glory some patches are still missing, and this requires more testing, which would be simpler if the core code is upstream.
2023-01-24soc: zynqmp: Fix IDcode for xck24Michal Simek
ID code was added by commit ddf8deabc39d ("arm64: zynqmp: Add support for SVD devices") based on documentation but after receiving part new ID code came up. That's why fix IDcode to match xck24 module. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/7b39aeeec211458ba4132a10beb7ad295eedb87f.1674030324.git.michal.simek@amd.com
2023-01-23bootstd: Add a new pre-scan priority for bootdevsSimon Glass
We need extensions to be set up before we start trying to boot any of the bootdevs. Add a new priority before all the others for tht sort of thing. Also add a 'none' option, so that the first one is not 0. While we are here, comment enum bootdev_prio_t fully and expand the test for the 'bootdev hunt' command. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23bootstd: Add a SPI flash bootdevSimon Glass
Add a bootdev for SPI flash so that these devices can be used with standard boot. It only supports loading a script. Add a special case for the label, since we want to use "spi", not "spi_flash". Enable the new bootdev on sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23ata: Don't try to use non-existent portsSimon Glass
The controller indicates the number of ports but also has a port map which specifies which ports are actually valid. Make use of this to avoid trying to send commands to an invalid port. This avoids a crash on some controllers. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23bootstd: Add a virtio bootdevSimon Glass
Add a bootdev for virtio so that these devices can be used with standard boot. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23virtio: Add a block deviceSimon Glass
The test code for virtio is fairly simplistic and does not actually create a block device. Add a way to specify the device type in the device tree. Add a block device so that we can do more testing. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23virtio: Avoid strange behaviour on removalSimon Glass
This device does a check on removal which is better handled in the actual test. Move it. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23virtio: Fix returning -ENODEVSimon Glass
This has a special meaning in driver model. There is clearly a device, so it does not make sense to return this error code. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23virtio: Avoid repeating a long expressionSimon Glass
Use a local variable to hold this name, to reduce the amount of code that needs to be read. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23bootstd: Add an NVMe bootdevSimon Glass
Add a bootdev for NVMe so that these devices can be used with standard boot. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23bootstd: Add an IDE bootdevSimon Glass
Add a bootdev for IDE so that these devices can be used with standard boot. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23bootstd: Add a SCSI bootdevSimon Glass
Add a bootdev for SCSI so that these devices can be used with standard boot. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23scsi: Remove all children of SCSI devices before rescanningSimon Glass
At present this only unbinds block devices of a certain type. But SCSI device can have different types of children, including bootdevs. Unbind all children so tht everything is clean and ready for a new scan. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23scsi: Correct allocation of block-device nameSimon Glass
This should be allocated so that it does not go out of scope. Fix this and set the log category while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23bootstd: Add an MMC hunterSimon Glass
Add a hunter for MMC. This doesn't do anything at present, since MMC is currently set up when U-Boot starts. If MMC moves to lazy init then we can add a hunter function. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23bootstd: Add a USB hunterSimon Glass
Add a hunter for USB which enumerates the bus to find new bootdevs. Update the tests and speed up bootdev_test_prio() while we are here, by dropping the USB delays. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23dm: usb: Mark the device name as alloced when bindingSimon Glass
Since usb_find_and_bind_driver() allocates the device name it should tell driver about that, to avoid memory leaks. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23bootstd: Add a default method to get bootflowsSimon Glass
The code in these functions turns out to often be the same. Add a default get_bootflow() function and allow the drivers to select it by setting the method to NULL. This saves a little code space. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23dm: mmc: Use bootdev_setup_sibling_blk()Simon Glass
At present MMC uses the bootdev_setup_for_dev() function to set up the bootdev. This is because MMC only has one block-device child, so does not need to worry about naming of the bootdev. However this inconsistency with other bootdevs that use block devices is a bit annoying. The only real reason for it is to have a name like 'mmc0.bootdev' instead of 'mmc0.blk.bootdev'. Update bootdev_setup_sibling_blk() to drop '.blk' from the name where it appears, thus removing the only reason to use the bootdev_setup_for_dev(). Switch MMC over to the subling function. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23ide: Drop non-DM code for BLKSimon Glass
We require CONFIG_BLK to be enabled now, so this code is unused. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23sandbox: mmc: Start off with a zeroed fileSimon Glass
When running multiple tests the mmc emulator calls malloc() to obtain the memory for its disk image. Since the memory is not cleared, it is possible that it happens to contain a partition table. The dm_test_part() test (for one) relies on mmc0 being empty on startup. Zero the memory to ensure that it is. Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-23dm: core: Support sorting devices with dm treeSimon Glass
Add a -s flag to sort the top-level devices in order of uclass ID. Signed-off-by: Simon Glass <sjg@chromium.org>
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