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2023-04-16Merge branch 'master_sh/gen4/rswitch' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-sh
2023-04-16net: rswitch: Add Renesas Ethernet SwitchPhong Hoang
This patch adds Ethernet Switch support that found on R-Car S4 (r8a779f0) SoC. This is extracted from multiple patches from downstream BSP, with additional rework of the network device registration. Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [Marek: Rework the driver to support all ports via subdrivers. Split the driver up, add generic PHY framework support. Generic code clean ups.] Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-04-16phy: renesas: Add Renesas Ethernet SERDES driver for R-Car S4-8Marek Vasut
Add Renesas Ethernet SERDES driver for R-Car S4-8 (r8a779f0). The datasheet describes initialization procedure without any information about registers' name/bits. So, this is all black magic to initialize the hardware. Especially, all channels should be initialized at once. This driver is imported and adjusted from Linux 6.3-rc1 commit: 50133cd3e8dd1 ("phy: renesas: r8a779f0-eth-serdes: Remove retry code in .init()") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-04-16mmc: tmio: Use IS_ENABLED() to check for CONFIG_ optionMarek Vasut
Use IS_ENABLED() instead of CONFIG_IS_ENABLED() to check for CONFIG_ option which is identical across all of U-Boot and xPL builds. Fixes: 2769ddc99fd ("mmc: tmio: Replace ifdeffery with IS_ENABLED/CONFIG_IS_ENABLED macros") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-04-16nand: raw: octeontx: Make list staticBin Meng
octeontx_bch_devices and octeontx_pci_nand_deferred_devices are only referenced in the files where they are defined. Make them static. Signed-off-by: Bin Meng <bmeng@tinylab.org> Acked-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20230405143837.785082-1-bmeng@tinylab.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-04-16nand: brcmnand: add iproc supportLinus Walleij
Add support for the iproc Broadcom NAND controller, used in Northstar SoCs for example. Based on the Linux driver. Cc: Philippe Reynes <philippe.reynes@softathome.com> Cc: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/all/20230308214231.378013-1-linus.walleij@linaro.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-04-16mtd: rawnand: nand_base: Handle algorithm selectionLinus Walleij
For BRCMNAND with 1-bit BCH ECC (BCH-1) such as used on the D-Link DIR-885L and DIR-890L routers, we need to explicitly select the ECC like this in the device tree: nand-ecc-algo = "bch"; nand-ecc-strength = <1>; nand-ecc-step-size = <512>; This is handled by the Linux kernel but U-Boot core does not respect this. Fix it up by parsing the algorithm and preserve the behaviour using this property to select software BCH as far as possible. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/all/20230308212851.370939-1-linus.walleij@linaro.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-04-14Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- mvebu: Boot support for 4K Native disks (Pali) - a38x: Perform DDR training sequence again for 2nd boot (Tony)
2023-04-13ddr: marvell: a38x: Perform DDR training sequence again for 2nd bootTony Dinh
- DDR Training sequence happens very fast. The speedup in boot time is negligible by skipping the training sequence during 2nd boot or after. So remove the check and skip. - This change improves the robustness of DDR training. If u-boot crashed during DDR training, the training could be left in a limbo state, where the BootROM has recorded that it is already in a 2nd boot. The training must be repeated in this scenario to get out of this limbo state, but due to the check it cannot be performed. Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
2023-04-12net: sun8i-emac: Remove the SoC variant IDSamuel Holland
Now that all differences in functionality are covered by individual flags, remove the enumeration of SoC variants. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12net: sun8i-emac: Use common syscon setup for R40Samuel Holland
While R40 puts the EMAC syscon register at a different address from other variants, the relevant portion of the register's layout is the same. Factor out the register offset so the same code can be shared by all variants. This matches what the Linux driver does. This change provides two benefits beyond the simplification: - R40 boards now respect the RX delays from the devicetree - This resolves a warning on architectures where readl/writel expect the address to have a pointer type, not phys_addr_t. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12net: sun8i-emac: Add a flag for the internal PHY switchSamuel Holland
Describe this feature instead of using the SoC ID. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12net: sun8i-emac: Add a flag for RMII supportSamuel Holland
Describe this feature instead of using the SoC ID. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12net: sun8i-emac: Add a structure for variant dataSamuel Holland
Currently, EMAC variants are distinguished by their identity, but this gets unwieldy as more overlapping variants are added. Add a structure so we can describe the individual feature differences between the variants. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-04-12video: sunxi: dw-hdmi: Use DM for HVCC regulatorSamuel Holland
The HDMI PHY depends on the HVCC supply being enabled. So far we have relied on it being enabled by an earlier firmware stage (SPL or TF-A). Attempt to enable the regulator here, so we can remove that dependency. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-04-12video: sunxi: dw-hdmi: Use DM for clock gates and resetsSamuel Holland
This abstracts away the CCU register layout, which is necessary for supporting new SoCs like H6 with a reorganized CCU. One of the resets is referenced from the PHY node instead of the controller node, so it will have to wait until the PHY code is factored out to a separate driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-04-11i2c: fsl_i2c: fix m68k transfertsAngelo Dureghello
This driver is actually used for powerpc and m68k/ColdFire. On ColdFire SoC's, interrupt flag get not set if IIEN flag (mbcr bit6, interrupt enabled) is not set appropriately before each transfert. As a result, the transfert hangs forever waiting for IIEN. This patch set IIEN before each transfert, while considering this fix as not harming powerpc arch. Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2023-04-11i2c: imx_lpi2c: Fix misuse the IS_ENABLED for DM clockYe Li
The IS_ENABLED, which does not consider SPL build, should be replaced by CONFIG_IS_ENABLED. For the case that we only enable DM CLK for u-boot but not in SPL, the IS_ENABLED(CONFIG_CLK) still returns true, then cause clock failure. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-04-11i2c: correct I2C deblock logicHaibo Chen
Current code use dm_gpio_get_value() to get SDA and SCL value, and the value depends on whether DTS file config the GPIO_ACTIVE_LOW. In ususal case for i2c GPIO, DTS need to set GPIO_ACTIVE_LOW for SCL/SDA pins. So here the logic is not correct. And we must not use GPIOD_ACTIVE_LOW in client code include the dm_gpio_set_dir_flags(), it is DTS's responsibility for this flag. So remove GPIOD_ACTIVE_LOW here. Fixes: aa54192d4a87 ("dm: i2c: implement gpio-based I2C deblock") Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Alexander Kochetkov <al.kochet@gmail.com <mailto:al.kochet@gmail.com>>
2023-04-11i2c: designware_i2c: remove apparently redundant read of 'i2c, speeds' DT ↵Rasmus Villemoes
property This code first figures out if there is an i2c,speeds property, if so its size in u32s, and then reads the value into the local speeds[] array. Both 'size' and 'speeds' are completely unused thereafter. It's not at all clear what this is supposed to do. Of course, it could be seen as a sanity check that the DT node does have an i2c,speeds property with an appropriate number of elements, but for that one wouldn't actually need to read it into speeds[]. Also, I can't find anywhere else in the U-Boot code which makes use of values from that property (this is is the only C code referencing "i2c,speeds"), so it seems pointless to insist that it's there. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2023-04-10mmc: mv_sdhci: Depend on DM_MMCStefan Roese
All build targets using this driver already use DM_MMC. So let's depend this driver on this Kconfig symbol and remove the non-DM driver part. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-04-10mmc: mv_sdhci: Remove CONFIG_MMC_SDHCI_IO_ACCESSORS supportStefan Roese
CONFIG_MMC_SDHCI_IO_ACCESSORS is not supported and/or used by this driver so let's remove these unused parts completely. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-04-10mmc: mv_sdhci: Simplify call to sdhci_mvebu_mbus_config()Stefan Roese
This driver already depends on CONFIG_ARCH_MVEBU, so there is no need to have some checks for this Kconfig symbol in the driver itself. Let's remove these superfluous checks. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-04-10mmc: erase: Use TRIM erase when availableLoic Poulain
The default erase command applies on erase group unit, and simply round down to erase group size. When the start block is not aligned to erase group size (e.g. erasing partition) it causes unwanted erasing of the previous blocks, part of the same erase group (e.g. owned by other logical partition, or by the partition table itself). To prevent this issue, a simple solution is to use TRIM as argument of the Erase command, which is usually supported with eMMC > 4.0, and allow to apply erase operation to write blocks instead of erase group Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-10mmc: Check support for TRIM operationsLoic Poulain
When secure/insecure TRIM operations are supported. When used as erase command argument it applies the erase operation to write blocks instead of erase groups. Signed-off-by: Loic Poulain <loic.poulain@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-04-08Merge branch 'master_regulator/fixes' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-sh - Fix usage of CONFIG_IS_ENABLED and DM_REGULATOR
2023-04-08Merge tag 'video-20230407' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-video - fix building sandbox without SDL - improve tegra DC driver to work with panel ops and implement native 180 degree panel rotation support - add T30 support to tegra DC driver - add DSI driver (based on mainline Linux one with minor adjustments, only T30 tested) - add get_display_timing ops to simple panel driver - extend simple panel driver to use it for MIPI DSI panels which do not require additional DSI commands for setup
2023-04-08video: tl070wsh30: Fix use of CONFIG_IS_ENABLED on DM_REGULATORMarek Vasut
The DM_REGULATOR symbol has SPL counterpart in: drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR Use CONFIG_IS_ENABLED() macro to match on the correct variant depending on the build stage. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-08video: simple-panel: Fix use of CONFIG_IS_ENABLED on DM_REGULATORMarek Vasut
The DM_REGULATOR symbol has SPL counterpart in: drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR Use CONFIG_IS_ENABLED() macro to match on the correct variant depending on the build stage. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-08video: rm68200: Fix use of CONFIG_IS_ENABLED on DM_REGULATORMarek Vasut
The DM_REGULATOR symbol has SPL counterpart in: drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR Use CONFIG_IS_ENABLED() macro to match on the correct variant depending on the build stage. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-08video: otm8009a: Fix use of CONFIG_IS_ENABLED on DM_REGULATORMarek Vasut
The DM_REGULATOR symbol has SPL counterpart in: drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR Use CONFIG_IS_ENABLED() macro to match on the correct variant depending on the build stage. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-08mmc: npcm_sdhci: Fix use of CONFIG_IS_ENABLED on DM_REGULATORMarek Vasut
The DM_REGULATOR symbol has SPL counterpart in: drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR Use CONFIG_IS_ENABLED() macro to match on the correct variant depending on the build stage. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-08misc: ub251xb: Fix use of CONFIG_IS_ENABLED on DM_REGULATORMarek Vasut
The DM_REGULATOR symbol has SPL counterpart in: drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR Use CONFIG_IS_ENABLED() macro to match on the correct variant depending on the build stage. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-07Merge branch 'master_sh/gen4/initial' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-sh - Initial R-Car Generation 4 support
2023-04-07simple_panel: support simple MIPI DSI panelsSvyatoslav Ryhel
Re-use simple panel driver for MIPI DSI panels which do not require additional DSI commands for setup. Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00 Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF700T T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07simple_panel: add support for get_display_timingSvyatoslav Ryhel
Some cases may require passing display timings from panel driver. To handle such cases support parsing device tree panel node for timing subnode. Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Google Nexus 7 2012 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07video: tegra20: add DSI controller driverSvyatoslav Ryhel
Adds support for both DSI outputs found on Tegra. Only very minimal functionality is implemented, so advanced features like ganged mode won't work. Driver is heavily based on mainline Tegra DSI and re-uses much of its features. Only T30 is supported for now but T20 support can be added if any supported devices will be found. Driver is wrapped as panel driver since Tegra DC driver supports only panel drivers calls. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF600T T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07video: tegra-dc: pass DC regmap to internal devicesSvyatoslav Ryhel
Internal video devices like DSI and HDMI controllers require sending commands into DC register field. To make this available, lets create platform data, which is restricted to pass DC regmap only to pre-defined devices. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00 Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07video: tegra-dc: add panel_set_backlight callSvyatoslav Ryhel
Tegra DC driver does not call panel_set_backlight, which can result in absence of backlight on device. Fix this by calling panel_set_backlight with BACKLIGHT_DEFAULT just after panel_enable_backlight. Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00 Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07video: tegra-dc: add 180 degree panel rotationSvyatoslav Ryhel
Unlike 90 and 270 degree rotation, 180 degree rotation is more common and does not require scaling. Implement it for correct grouper support. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # Google Nexus 7 2012 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Google Nexus 7 2012 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07video: tegra-dc: assign regmap directlySvyatoslav Ryhel
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00 Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07video: tegra-dc: request timings from panel driver firstSvyatoslav Ryhel
Check if panel driver has display timings and get those. If panel driver does not pass timing, try to find timing under rgb node for backwards compatibility. Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00 Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07video: tegra-dc: get clocks from device treeSvyatoslav Ryhel
DISP1 clock may use PLLP, PLLC and PLLD as parents. Instead of hardcoding, lets pass clock and its parent from device tree. Default parent is PLLP. Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20 Tested-by: Nicolas Chauvet <kwizart@gmail.com> # Paz00 Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # HTC One X T30 Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07video: move tegra dc driver into own folderSvyatoslav Ryhel
Move tegra dc driver to tegra20 directory and also mention T30 in description of the driver's config option. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> [agust: add commit description] Signed-off-by: Anatolij Gustschin <agust@denx.de>
2023-04-07tegra: lcd: video: integrate display driver for t30Marcel Ziswiler
On popular request make the display driver from T20 work on T30 as well. Turned out to be quite straight forward. However a few notes about some things encountered during porting: Of course the T30 device tree was completely missing host1x as well as PWM support but it turns out this can simply be copied from T20. The only trouble compiling the Tegra video driver for T30 had to do with some hard-coded PWM pin muxing for T20 which is quite ugly anyway. On T30 this gets handled by a board specific complete pin muxing table. The older Chromium U-Boot 2011.06 which to my knowledge was the only prior attempt at enabling a display driver for T30 for whatever reason got some clocking stuff mixed up. Turns out at least for a single display controller T20 and T30 can be clocked quite similar. Enjoy. Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30 Tested-by: Jonas Schwöbel <jonasschwoebel@yahoo.de> # Surface RT T30 Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30 Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-04-07pinctrl: renesas: Add R8A779G0 V4H PFC tablesHai Pham
Add pinctrl tables for R8A779G0 V4H SoC. Based on Linux next 20230228 PFC tables tables up to commit 058f4df42121 ("Add linux-next specific files for 20230228") Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Sync with Linux next 20230228, sort sh_pfc_pinconf_set voltage args]
2023-04-07clk: renesas: Add R8A779G0 V4H clock tablesHai Pham
Add clock tables for R8A779G0 V4H SoC from Linux next commit 058f4df42121 ("Add linux-next specific files for 20230228") There is an adjustment to the clock tables to make them easier suitable for U-Boot, PLL2 is not treated as GEN4 PLL type PLL2_VAR, but rather a plain PLL2. This should be sufficient until PLL2_VAR is implemented in the clock core. Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Sync with Linux next 20230228 . Update from CLK to CPG core driver Treat PLL2 as non-PLL2_VAR for now]
2023-04-07pinctrl: renesas: Add R8A779F0 S4 PFC tablesLUU HOAI
Add pinctrl tables for R8A779F0 S4 SoC. Based on Linux next 20230228 PFC tables tables up to commit 058f4df42121 ("Add linux-next specific files for 20230228") Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Use RCAR_64 Kconfig, sync with Linux next 20230228]
2023-04-07clk: renesas: Add R8A779F0 S4 clock tablesHai Pham
Add clock tables for R8A779F0 S4 SoC Based on Linux commit 24aaff6a6ce4 ("clk: renesas: cpg-mssr: Add support for R-Car S4-8") by Yoshihiro Shimoda and sync the tables up to Linux next commit 058f4df42121 ("Add linux-next specific files for 20230228") Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> [Marek: Sync with Linux next 20230228 . Update from CLK to CPG core driver]
2023-04-07clk: renesas: Update R-Car Gen3 driver Gen4 supportMarek Vasut
Update R-Car Gen4 support in Gen3 clock driver. This patch renames the V3U clock parts to Gen4 and extends them by new PLL2, PLL3, PLL4, PLL6 as well as SDSRC clock which use undocumented bits so far, and RPCSRC clock which uses its own more capable divider table. The Gen4 module standby and reset tables are also updated. This patch makes use of union to alias Gen3 and more extensive Gen4 PLL tables, as the driver cannot ever be instantiated on hardware that would identify itself as both Gen3 and Gen4. The V3U clock driver is updated to match Gen4 clock driver behavior, it is augmented with a more extensive PLL table and a valid MODEMR register offset. This supersedes "clk: renesas: Introduce R-Car Gen4 CPG driver" from Hai Pham as the R-Car Gen3 and Gen4 clock core drivers are extremely similar. That implementation was in turn based on Linux commit 470e3f0d0b15 ("clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver") by Yoshihiro Shimoda . Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
generated by cgit v1.2.3 (git 2.0.4) at 2025-10-17 09:53:38 +0000