| Age | Commit message (Expand) | Author |
|---|---|---|
| 2024-08-19 | clk: mediatek: mt7622: add missing A1/2SYS clock ID | Christian Marangi |
| 2024-08-19 | clk: mediatek: mt7622: add missing clock PERIBUS_SEL clock | Christian Marangi |
| 2024-08-19 | clk: mediatek: mt7622: add missing clock PERI_UART4_PD | Christian Marangi |
| 2024-08-19 | clk: mediatek: mt7622: add missing clock MUX1_SEL | Christian Marangi |
| 2024-08-19 | clk: mediatek: mt7622: add missing clock define for MAIN_CORE_EN | Christian Marangi |
| 2024-08-19 | clk: mediatek: mt7622: move INFRA_TRNG to the bottom | Christian Marangi |
| 2024-08-19 | clk: mediatek: mt7622: rename AUDIO_AWB3 to AUDIO_AWB2 | Christian Marangi |
| 2021-09-30 | WS cleanup: remove trailing empty lines | Wolfgang Denk |
| 2020-01-16 | clk: mediatek: add driver for MT7622 | Sam Shih |
