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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
#include <dt-bindings/gpio/gpio.h>
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
phy-handle = <&phy>;
phy-mode = "rgmii-id";
/*
* The PHY seems to require a long-enough reset duration to avoid
* some rare issues where the PHY gets stuck in an inconsistent and
* non-functional state at boot-up. 10ms proved to be fine .
*/
phy-reset-duration = <10>;
phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethernet-phy@0 {
status = "disabled";
};
ethernet-phy@1 {
status = "disabled";
};
ethernet-phy@4 {
status = "disabled";
};
phy: ethernet-phy@ffffffff {
/*
* The PHY can appear either:
* - AR8035: at address 0 or 4
* - ADIN1300: at address 1
* Actual address being detected at runtime.
*/
reg = <0xffffffff>;
qca,clk-out-frequency = <125000000>;
qca,smarteee-tw-us-1g = <24>;
adi,phy-output-clock = "125mhz-free-running";
};
};
};
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