arch/arm/dts/imx8mp-navqp-u-boot.dtsi


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// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2019, 2021 NXP
 * Copyright 2024 Gilles Talis <gilles.talis@gmail.com>
 */

#include "imx8mp-u-boot.dtsi"

/ {
	wdt-reboot {
		compatible = "wdt-reboot";
		wdt = <&wdog1>;
		bootph-pre-ram;
	};

	firmware {
		optee {
			compatible = "linaro,optee-tz";
			method = "smc";
		};
	};
};

&{/soc@0/bus@30800000/i2c@30a20000/pmic@25} {
	bootph-all;
};

&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
	bootph-all;
};

&gpio1 {
	bootph-pre-ram;
};

&gpio2 {
	bootph-pre-ram;
};

&gpio3 {
	bootph-pre-ram;
};

&gpio4 {
	bootph-pre-ram;
};

&gpio5 {
	bootph-pre-ram;
};

&i2c1 {
	bootph-all;
};

&pinctrl_i2c1 {
	bootph-pre-ram;
};

&pinctrl_pmic {
	bootph-pre-ram;
};

&pinctrl_uart2 {
	bootph-pre-ram;
};

&pinctrl_usdhc2_gpio {
	bootph-pre-ram;
};

&pinctrl_usdhc2 {
	bootph-pre-ram;
};

&pinctrl_usdhc3 {
	bootph-pre-ram;
};

&pinctrl_wdog {
	bootph-pre-ram;
};

&reg_usdhc2_vmmc {
	u-boot,off-on-delay-us = <20000>;
};

&reg_usdhc2_vmmc {
	bootph-pre-ram;
};

&uart2 {
	bootph-pre-ram;
};

&usdhc1 {
	bootph-pre-ram;
};

&usdhc2 {
	bootph-pre-ram;
};

&usdhc3 {
	bootph-pre-ram;
};

&wdog1 {
	bootph-pre-ram;
};