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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2020-2023 Texas Instruments Incorporated - https://www.ti.com/
*/
/dts-v1/;
#include "k3-j7200-common-proc-board.dts"
#include "k3-j7200-ddr-evm-lp4-2666.dtsi"
#include "k3-j721e-ddr.dtsi"
#include "k3-j7200-common-proc-board-u-boot.dtsi"
/ {
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a72_0;
};
a72_0: a72@0 {
compatible = "ti,am654-rproc";
reg = <0x0 0x00a90000 0x0 0x10>;
power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 202 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 4 TI_SCI_PD_EXCLUSIVE>;
resets = <&k3_reset 202 0>;
clocks = <&k3_clks 61 1>, <&k3_clks 202 2>, <&k3_clks 4 1> ;
clock-names = "gtc", "core", "msmc";
assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>, <&k3_clks 4 1>,
<&k3_clks 323 0>;
assigned-clock-parents= <0>, <0>, <0>, <&k3_clks 323 2>;
assigned-clock-rates = <2000000000>, <200000000>, <1000000000>;
ti,sci = <&dmsc>;
ti,sci-proc-id = <32>;
ti,sci-host-id = <10>;
bootph-pre-ram;
};
dm_tifs: dm-tifs {
compatible = "ti,j721e-dm-sci";
ti,host-id = <3>;
ti,secure-host;
mbox-names = "rx", "tx";
mboxes = <&secure_proxy_mcu 21>,
<&secure_proxy_mcu 23>;
bootph-pre-ram;
};
};
&memorycontroller {
power-domains = <&k3_pds 8 TI_SCI_PD_SHARED>,
<&k3_pds 90 TI_SCI_PD_SHARED>;
clocks = <&k3_clks 8 5>, <&k3_clks 30 9>;
bootph-pre-ram;
};
&mcu_timer0 {
/delete-property/ clocks;
/delete-property/ clocks-names;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
clock-frequency = <250000000>;
bootph-pre-ram;
};
&secure_proxy_mcu {
bootph-pre-ram;
status = "okay";
};
&cbass_mcu_wakeup {
sysctrler: sysctrler {
compatible = "ti,am654-system-controller";
mboxes= <&secure_proxy_mcu 4>,
<&secure_proxy_mcu 5>;
mbox-names = "tx", "rx";
bootph-pre-ram;
};
};
&dmsc {
mboxes = <&secure_proxy_mcu 8>,
<&secure_proxy_mcu 6>, <&secure_proxy_mcu 5>;
mbox-names = "tx", "rx", "notify";
ti,host-id = <4>;
ti,secure-host;
bootph-pre-ram;
};
&wkup_vtm0 {
bootph-pre-ram;
};
&ospi0 {
reg = <0x0 0x47040000 0x0 0x100>,
<0x0 0x50000000 0x0 0x8000000>;
};
&fss {
/* enable ranges missing from the FSS node */
ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x00068400>,
<0x0 0x50000000 0x0 0x50000000 0x0 0x08000000>;
};
&hbmc {
reg = <0x0 0x47040000 0x0 0x100>,
<0x0 0x50000000 0x0 0x8000000>;
ranges = <0x0 0x0 0x0 0x50000000 0x4000000>,
<0x1 0x0 0x0 0x54000000 0x800000>;
};
&mcu_ringacc {
ti,sci = <&dm_tifs>;
};
&mcu_udmap {
ti,sci = <&dm_tifs>;
};
&wkup_vtm0 {
vdd-supply-2 = <&buckb1>;
bootph-pre-ram;
};
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