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// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source extras for U-Boot on R-Car R8A779G0 SoC
*
* Copyright (C) 2021 Renesas Electronics Corp.
*/
/ {
binman: binman {
section {
filename = "flash.bin";
pad-byte = <0xff>;
renesas-rcar4-sa0 {
filename = "sa0.bin";
pad-byte = <0xff>;
renesas,loader-address = <CONFIG_SPL_TEXT_BASE>;
/*
* This section starts after 0x40000 Bytes long
* header added by the renesas-rcar4-sa0 binman
* etype. That means u-boot-spl {} below starts
* at offset 0x40000 in flash.bin .
*/
u-boot-spl {
offset = <0x40000>;
align-end = <4>;
};
};
u-boot {
offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>;
filename = "u-boot.itb";
fit {
description = "U-Boot mainline";
fit,fdt-list = "of-list";
#address-cells = <1>;
images {
uboot {
arch = "arm64";
compression = "none";
description = "U-Boot (64-bit)";
type = "standalone";
/*
* This is in DRAM. We cannot
* use TEXT_BASE here because
* this system uses PIE build
* and TEXT_BASE=0x0 .
*/
entry = <0x44100000>;
load = <0x44100000>;
uboot-blob {
filename = "u-boot-nodtb.bin";
type = "blob-ext";
};
};
@fdt-SEQ {
compression = "none";
description = "NAME";
type = "flat_dt";
uboot-fdt-blob {
filename = "u-boot.dtb";
type = "blob-ext";
};
};
};
configurations {
default = "@config-DEFAULT-SEQ";
@config-SEQ {
description = "NAME";
fdt = "fdt-SEQ";
firmware = "uboot";
};
};
};
};
};
};
};
&hscif0_pins {
bootph-all;
};
&otp {
bootph-all;
};
&rpc {
bank-width = <2>;
num-cs = <1>;
};
&soc {
apmu@e6170000 { /* Remoteproc */
compatible = "renesas,r8a779g0-cr52";
reg = <0 0xe6170000 0 0x80000>;
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
status = "okay";
};
ram@e6780000 { /* DBSC5 */
compatible = "renesas,r8a779g0-dbsc";
reg = <0 0xe6780000 0 0x80000>;
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
status = "okay";
bootph-all;
};
ram@ffec0000 { /* RT-VRAM */
compatible = "renesas,r8a779g0-rtvram";
reg = <0 0xffec0000 0 0xf000>;
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
status = "okay";
bootph-all;
};
};
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