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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
*/
#include "rk3399-u-boot.dtsi"
/ {
chosen {
u-boot,spl-boot-order = &spi_flash;
};
config {
u-boot,spl-payload-offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>;
};
};
#if defined(CONFIG_ROCKCHIP_SPI_IMAGE)
&binman {
simple-bin-spi {
size = <0x800000>;
};
};
#endif
&cros_ec {
ec-interrupt = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>;
};
&edp {
rockchip,panel = <&edp_panel>;
};
&emmc_phy {
/delete-property/ bootph-pre-ram;
};
&gpio0 {
bootph-pre-ram;
};
&pp1500_ap_io {
bootph-pre-ram;
};
&pp1800_audio {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
&pp1500_en {
bootph-pre-ram;
};
&pp3000 {
bootph-pre-ram;
};
&pp3000_en {
bootph-pre-ram;
};
&ppvar_bigcpu_pwm {
regulator-init-microvolt = <900000>;
};
&ppvar_centerlogic_pwm {
regulator-init-microvolt = <900000>;
};
&ppvar_gpu_pwm {
regulator-init-microvolt = <900000>;
};
&ppvar_litcpu_pwm {
regulator-init-microvolt = <900000>;
};
&ppvar_sd_card_io {
enable-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
};
&sdhci {
/delete-property/ bootph-pre-ram;
};
&sdmmc {
/delete-property/ bootph-pre-ram;
};
&sdmmc_bus4 {
/delete-property/ bootph-pre-ram;
};
&sdmmc_cd {
/delete-property/ bootph-pre-ram;
};
&sdmmc_clk {
/delete-property/ bootph-pre-ram;
};
&sdmmc_cmd {
/delete-property/ bootph-pre-ram;
};
&spi1 {
spi_flash: flash@0 {
bootph-pre-ram;
bootph-some-ram;
};
};
&spi5 {
spi-activate-delay = <100>;
spi-max-frequency = <3000000>;
spi-deactivate-delay = <200>;
};
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