arch/arm/dts/socfpga_agilex5-u-boot.dtsi


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// SPDX-License-Identifier: GPL-2.0+
/*
 * U-Boot additions
 *
 * Copyright (C) 2024 Intel Corporation <www.intel.com>
 */

#include "socfpga_soc64_fit-u-boot.dtsi"

/{
	memory {
		#address-cells = <2>;
		#size-cells = <2>;
		bootph-all;
	};
};

&clkmgr {
	bootph-all;
};

&i2c0 {
	reset-names = "i2c";
};

&i2c1 {
	reset-names = "i2c";
};

&i2c2 {
	reset-names = "i2c";
};

&i2c3 {
	reset-names = "i2c";
};

&mmc {
	resets = <&rst SDMMC_RESET>, <&rst SDMMC_OCP_RESET>;
};

&porta {
	bank-name = "porta";
};

&portb {
	bank-name = "portb";
};

&qspi {
	bootph-all;
};

&rst {
	compatible = "altr,rst-mgr";
	altr,modrst-offset = <0x24>;
	bootph-all;
};

&sysmgr {
	compatible = "altr,sys-mgr", "syscon";
	bootph-all;
};

&uart0 {
	bootph-all;
};

&watchdog0 {
	bootph-all;
};