blob: 0a87df806cafc8e726aacc07a772ca478d0ee3df (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
|
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2022, Linaro Ltd.
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/qcom,camcc-sdm845.h>
#include <dt-bindings/gpio/gpio.h>
/ {
reserved-memory {
linux,cma {
compatible = "shared-dma-pool";
size = <0x0 0x8000000>;
reusable;
linux,cma-default;
};
};
};
&camss {
vdda-phy-supply = <&vreg_l1a_0p875>;
vdda-pll-supply = <&vreg_l26a_1p2>;
status = "okay";
ports {
port@0 {
csiphy0_ep: endpoint {
data-lanes = <0 1 2 3>;
remote-endpoint = <&ov8856_ep>;
};
};
};
};
&cci {
status = "okay";
};
&cci_i2c0 {
#address-cells = <1>;
#size-cells = <0>;
camera@10 {
compatible = "ovti,ov8856";
reg = <0x10>;
/* CAM0_RST_N */
reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&cam0_default>;
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clock-names = "xvclk";
clock-frequency = <19200000>;
/*
* The &vreg_s4a_1p8 trace is powered on as a,
* so it is represented by a fixed regulator.
*
* The 2.8V vdda-supply and 1.2V vddd-supply regulators
* both have to be enabled through the power management
* gpios.
*/
dovdd-supply = <&vreg_lvs1a_1p8>;
avdd-supply = <&cam0_avdd_2v8>;
dvdd-supply = <&cam0_dvdd_1v2>;
port {
ov8856_ep: endpoint {
link-frequencies = /bits/ 64
<360000000 180000000>;
data-lanes = <1 2 3 4>;
remote-endpoint = <&csiphy0_ep>;
};
};
};
};
&cci_i2c1 {
#address-cells = <1>;
#size-cells = <0>;
camera@60 {
compatible = "ovti,ov7251";
/* I2C address as per ov7251.txt linux documentation */
reg = <0x60>;
/* CAM3_RST_N */
enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&cam3_default>;
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clock-names = "xclk";
clock-frequency = <24000000>;
/*
* The &vreg_s4a_1p8 trace always powered on.
*
* The 2.8V vdda-supply regulator is enabled when the
* vreg_s4a_1p8 trace is pulled high.
* It too is represented by a fixed regulator.
*
* No 1.2V vddd-supply regulator is used.
*/
vdddo-supply = <&vreg_lvs1a_1p8>;
vdda-supply = <&cam3_avdd_2v8>;
status = "disabled";
port {
ov7251_ep: endpoint {
data-lanes = <0 1>;
/* remote-endpoint = <&csiphy3_ep>; */
};
};
};
};
|
