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path: root/drivers/gpu/drm/amd/include/asic_reg/gca
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2025-04-07drm/amdgpu: add missing GFX6 definesAlexandre Demers
They will be used later when switching away from sid.h/si_enums.h. v2: fix whitespace (Alex) Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amd/amdgpu: add SI defines/registersTom St Denis
Add missing gca MMIO registers and defines necessary for the next patch which re-works a lot of gfx v6 to use the new SI headers. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11drm/amd/amdgpu: Introduction of SI registers (v2)Tom St Denis
This introduces the SI registers in the amdgpu driver style. v2: squash duplicates fix Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07drm/amd/powerplay: add shared definitions for di/dt feature.Rex Zhu
v1: delete some comflict definitions between polaris and fiji. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07drm/amdgpu: remove gfx8 registers that vary between asicsKen Wang
those register mask definitions are different in polaris compare to former gfx 8 gpus, so remove them from misusing. Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-07-07drm/amdgpu/gfx80: Add QUICK_PG bit to GFX header and use it.Tom St Denis
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-05-04drm/amdgpu: add mmRLC_CGCG_CGLS_CTRL_3D & mmRLC_CGCG_RAMP_CTRL_3DFlora Cui
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-17drm/amdgpu/gfx7: add MTYPE definitionFlora Cui
Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-12-02drm/amd: add new gfx8 register definitions for EDCAlex Deucher
EDC is a RAS feature for on chip memory. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-28drm/amdgpu: add GFX 8.1 register headersAlex Deucher
Minor differences compared to GFX 8.0 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03drm/amdgpu: add GCA 8.0 register headersAlex Deucher
These are register headers for the GCA (Graphics and Compute Array) block on the GPU. Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03drm/amdgpu: add GCA 7.2 register headersAlex Deucher
These are register headers for the GCA (Graphics and Compute Array) block on the GPU. Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03drm/amdgpu: add GCA 7.0 register headersAlex Deucher
These are register headers for the GCA (Graphics and Compute Array) block on the GPU. Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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