diff options
| author | Tom Rini <trini@konsulko.com> | 2022-03-02 13:59:33 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-03-02 13:59:33 -0500 |
| commit | 2dfdba4a5a48de33a3cedc908c183b86b6ff7bd5 (patch) | |
| tree | da9d57e285034143ed1e9cd4dfc30577792275ad /arch/arm/include/asm/macro.h | |
| parent | f861ffa660dc47c4017c220b94d10a64439d46a7 (diff) | |
| parent | 5ff4857d3569710c0f1ce1848f1e7486e3a4cfbe (diff) | |
Merge branch '2022-03-02-armv8-fixes-and-cleanups' into next
To quote the author:
I was looking into the arm64 boot code lately and stumbled upon some
issues. Also Nishanth brought back memories of a lengthy debug session,
which was caused due to U-Boot keeping SErrors masked. As the resulting
patches are all somewhat related, I gathered this series here to address
those problems.
Patches 1 to 3 address exception handling issues, with the SError
enablement being the most prominent fix here.
Patch 4 cleans up asm/io.h. This was on the list before[1], but was
somehow lost when it was intercepted by a shorter version of itself.
Patches 5 and 6 clean up some unnecessarily complicated AArch64 assembly
code.
Diffstat (limited to 'arch/arm/include/asm/macro.h')
| -rw-r--r-- | arch/arm/include/asm/macro.h | 37 |
1 files changed, 11 insertions, 26 deletions
diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h index ec0171e0e6c..1a1edc98703 100644 --- a/arch/arm/include/asm/macro.h +++ b/arch/arm/include/asm/macro.h @@ -69,12 +69,10 @@ lr .req x30 */ .macro switch_el, xreg, el3_label, el2_label, el1_label mrs \xreg, CurrentEL - cmp \xreg, 0xc - b.eq \el3_label - cmp \xreg, 0x8 + cmp \xreg, #0x8 + b.gt \el3_label b.eq \el2_label - cmp \xreg, 0x4 - b.eq \el1_label + b.lt \el1_label .endm /* @@ -123,19 +121,10 @@ lr .req x30 */ .macro branch_if_slave, xreg, slave_label #ifdef CONFIG_ARMV8_MULTIENTRY - /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */ mrs \xreg, mpidr_el1 - tst \xreg, #0xff /* Test Affinity 0 */ - b.ne \slave_label - lsr \xreg, \xreg, #8 - tst \xreg, #0xff /* Test Affinity 1 */ - b.ne \slave_label - lsr \xreg, \xreg, #8 - tst \xreg, #0xff /* Test Affinity 2 */ - b.ne \slave_label - lsr \xreg, \xreg, #16 - tst \xreg, #0xff /* Test Affinity 3 */ - b.ne \slave_label + and \xreg, \xreg, 0xffffffffff /* clear bits [63:40] */ + and \xreg, \xreg, ~0x00ff000000 /* also clear bits [31:24] */ + cbnz \xreg, \slave_label #endif .endm @@ -143,16 +132,12 @@ lr .req x30 * Branch if current processor is a master, * choose processor with all zero affinity value as the master. */ -.macro branch_if_master, xreg1, xreg2, master_label +.macro branch_if_master, xreg, master_label #ifdef CONFIG_ARMV8_MULTIENTRY - /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */ - mrs \xreg1, mpidr_el1 - lsr \xreg2, \xreg1, #32 - lsl \xreg2, \xreg2, #32 - lsl \xreg1, \xreg1, #40 - lsr \xreg1, \xreg1, #40 - orr \xreg1, \xreg1, \xreg2 - cbz \xreg1, \master_label + mrs \xreg, mpidr_el1 + and \xreg, \xreg, 0xffffffffff /* clear bits [63:40] */ + and \xreg, \xreg, ~0x00ff000000 /* also clear bits [31:24] */ + cbz \xreg, \master_label #else b \master_label #endif |