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author | Tom Rini <trini@konsulko.com> | 2018-02-04 08:30:13 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2018-02-04 08:30:13 -0500 |
commit | ab1af91093e3a5e3e86b77ebaf568facd386a1df (patch) | |
tree | aa005b3bd0fd5716d8dd3b69c1c55f14a34f5f9e /arch/arm/mach-imx/imx_bootaux.c | |
parent | b2153075f42c2d46d310778e226bcb11f0af47f5 (diff) | |
parent | d1ceb0c4881332cb0586920f0a40f8e4a48d99a9 (diff) |
Merge git://git.denx.de/u-boot-imx
Diffstat (limited to 'arch/arm/mach-imx/imx_bootaux.c')
-rw-r--r-- | arch/arm/mach-imx/imx_bootaux.c | 46 |
1 files changed, 38 insertions, 8 deletions
diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c index b62dfbf6bf6..6256b3a778f 100644 --- a/arch/arm/mach-imx/imx_bootaux.c +++ b/arch/arm/mach-imx/imx_bootaux.c @@ -5,21 +5,51 @@ */ #include <common.h> +#include <asm/io.h> +#include <asm/mach-imx/sys_proto.h> #include <command.h> +#include <imx_sip.h> #include <linux/compiler.h> -/* Allow for arch specific config before we boot */ -int __weak arch_auxiliary_core_up(u32 core_id, u32 boot_private_data) +int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data) { - /* please define platform specific arch_auxiliary_core_up() */ - return CMD_RET_FAILURE; + ulong stack, pc; + + if (!boot_private_data) + return -EINVAL; + + stack = *(ulong *)boot_private_data; + pc = *(ulong *)(boot_private_data + 4); + + /* Set the stack and pc to M4 bootROM */ + writel(stack, M4_BOOTROM_BASE_ADDR); + writel(pc, M4_BOOTROM_BASE_ADDR + 4); + + /* Enable M4 */ +#ifdef CONFIG_MX8M + call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0); +#else + clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET, + SRC_M4C_NON_SCLR_RST_MASK, SRC_M4_ENABLE_MASK); +#endif + + return 0; } -/* Allow for arch specific config before we boot */ -int __weak arch_auxiliary_core_check_up(u32 core_id) +int arch_auxiliary_core_check_up(u32 core_id) { - /* please define platform specific arch_auxiliary_core_check_up() */ - return 0; +#ifdef CONFIG_MX8M + return call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0); +#else + unsigned int val; + + val = readl(SRC_BASE_ADDR + SRC_M4_REG_OFFSET); + + if (val & SRC_M4C_NON_SCLR_RST_MASK) + return 0; /* assert in reset */ + + return 1; +#endif } /* |