diff options
| author | Michal Simek <michal.simek@amd.com> | 2024-05-29 16:47:58 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2024-06-17 16:02:29 +0200 |
| commit | 40f5046c221a7b2719c49b51acefe12914b213e5 (patch) | |
| tree | d5751509f929dd31ce62c4545819ee65b6835e7a /arch/arm/mach-versal2/clk.c | |
| parent | efff3976e3a68c922bb7f7730e2c15ead442e60d (diff) | |
arm64: versal2: Add support for AMD Versal Gen 2
Add support for AMD Versal Gen 2. SoC is based on Cortex-a78ae 4 cluster/2
cpu core each. A lot of IPs are shared with previous families. There are
couple of new IP blocks where the most interesting from user point of view
is UFS.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bc2b70831ce1031bd0fac32357bff84936e1310f.1716994063.git.michal.simek@amd.com
Diffstat (limited to 'arch/arm/mach-versal2/clk.c')
| -rw-r--r-- | arch/arm/mach-versal2/clk.c | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/mach-versal2/clk.c b/arch/arm/mach-versal2/clk.c new file mode 100644 index 00000000000..e73ae9af076 --- /dev/null +++ b/arch/arm/mach-versal2/clk.c @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2016 - 2022, Xilinx, Inc. + * Copyright (C) 2022 - 2024, Advanced Micro Devices, Inc. + * + * Michal Simek <michal.simek@amd.com> + */ + +#include <init.h> +#include <time.h> +#include <asm/global_data.h> + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_CLOCKS +/** + * set_cpu_clk_info - Initialize clock framework + * + * Return: 0 always. + * + * This function is called from common code after relocation and sets up the + * clock framework. The framework must not be used before this function had been + * called. + */ +int set_cpu_clk_info(void) +{ + gd->cpu_clk = get_tbclk(); + + gd->bd->bi_arm_freq = gd->cpu_clk / 1000000; + gd->bd->bi_dsp_freq = 0; + + return 0; +} +#endif |