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authorCaleb Connolly <caleb.connolly@linaro.org>2023-11-07 12:41:05 +0000
committerCaleb Connolly <caleb.connolly@linaro.org>2024-01-16 12:26:24 +0000
commitd5db46cf93fd19cbbd61ee34a5743c1c7e61f212 (patch)
treed08cb4a56c084619b239d3bfdef8072affa954bd /doc/sphinx/kerneldoc.py
parent6acc44319bba5e4f5bcdacaa6412d617815472ed (diff)
clk/qcom: fix rcg divider value
The RCG divider field takes a value of (2*h - 1) where h is the divisor. This allows fractional dividers to be supported by calculating them at compile time using a macro. However, the clk_rcg_set_rate_mnd() function was also performing the calculation. Clean this all up and consistently use the F() macro to calculate these at compile time and properly support fractional divisors. Additionally, improve clk_bcr_update() to timeout with a warning rather than hanging the board, and make the freq_tbl struct and helpers common so that they can be reused by future platforms. Reviewed-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
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