diff options
author | Tingting Meng <tingting.meng@altera.com> | 2025-08-03 18:24:58 -0700 |
---|---|---|
committer | Tien Fong Chee <tien.fong.chee@intel.com> | 2025-08-08 22:20:54 +0800 |
commit | 4face059c1ea1d7eb10470307526de7a9a3aecd4 (patch) | |
tree | 5e2ce31455aeb3536d7c7c1218e984b8a3a66d14 /drivers/ddr/altera/sdram_soc64.h | |
parent | e5bc1aee5e3b5f90697ff528e05a6a8ff481f15b (diff) |
ddr: altera: soc64: Fix dram size calculation in clamshell mode
Fix wrong memory size calculation in clamshell mode
Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Diffstat (limited to 'drivers/ddr/altera/sdram_soc64.h')
-rw-r--r-- | drivers/ddr/altera/sdram_soc64.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/ddr/altera/sdram_soc64.h b/drivers/ddr/altera/sdram_soc64.h index 5336ce3991c..6031cef560e 100644 --- a/drivers/ddr/altera/sdram_soc64.h +++ b/drivers/ddr/altera/sdram_soc64.h @@ -88,6 +88,8 @@ struct altera_sdram_plat { #define CTRLCFG0 0x28 #define CTRLCFG1 0x2c #define CTRLCFG3 0x34 +#define CTRLCFG5 0x3c +#define CTRLCFG6 0x40 #define DRAMTIMING0 0x50 #define CALTIMING0 0x7c #define CALTIMING1 0x80 @@ -128,6 +130,9 @@ struct altera_sdram_plat { #define CTRLCFG1_CFG_CTRL_EN_ECC(x) \ (((x) >> 7) & 0x1) +#define CTRLCFG6_CFG_CS_CHIP(x) \ + ((x) & 0xFFFF) + #define DRAMTIMING0_CFG_TCL(x) \ ((x) & 0x7f) |