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| author | Chee Hong Ang <chee.hong.ang@intel.com> | 2020-07-10 20:55:23 +0800 |
|---|---|---|
| committer | Ley Foon Tan <ley.foon.tan@intel.com> | 2020-10-09 17:53:10 +0800 |
| commit | d24f2bc1481323b37b056522b3b246ee2d59a943 (patch) | |
| tree | 91bfc556a3da45728269bdf3eb44506b5d10f9a5 /drivers/fpga/altera.c | |
| parent | 35d847ed908d3b1d6e58d95b3b9f326111343df5 (diff) | |
clk: agilex: Additional membus writes for HPS PLL
Add additional membus writes to configure main and peripheral PLL
for Agilex's clock manager.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Diffstat (limited to 'drivers/fpga/altera.c')
0 files changed, 0 insertions, 0 deletions